.name           = "ck_ref",
        .rate           = 12000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         ALWAYS_ENABLED,
+                         CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
 };
        .name           = "ck_dpll1",
        .parent         = &ck_ref,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         RATE_PROPAGATES | ALWAYS_ENABLED,
+                         CLOCK_IN_OMAP310 | RATE_PROPAGATES | ALWAYS_ENABLED,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
 };
        .name           = "arm_ck",
        .parent         = &ck_dpll1,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED,
+                         CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES |
+                         ALWAYS_ENABLED,
        .rate_offset    = CKCTL_ARMDIV_OFFSET,
        .recalc         = &omap1_ckctl_recalc,
        .enable         = &omap1_clk_enable_generic,
                .name           = "armper_ck",
                .parent         = &ck_dpll1,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                                 RATE_CKCTL | CLOCK_IDLE_CONTROL,
+                                 CLOCK_IN_OMAP310 | RATE_CKCTL |
+                                 CLOCK_IDLE_CONTROL,
                .enable_reg     = (void __iomem *)ARM_IDLECT2,
                .enable_bit     = EN_PERCK,
                .rate_offset    = CKCTL_PERDIV_OFFSET,
 static struct clk arm_gpio_ck = {
        .name           = "arm_gpio_ck",
        .parent         = &ck_dpll1,
-       .flags          = CLOCK_IN_OMAP1510,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
        .enable_reg     = (void __iomem *)ARM_IDLECT2,
        .enable_bit     = EN_GPIOCK,
        .recalc         = &followparent_recalc,
                .name           = "armxor_ck",
                .parent         = &ck_ref,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                                 CLOCK_IDLE_CONTROL,
+                                 CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
                .enable_reg     = (void __iomem *)ARM_IDLECT2,
                .enable_bit     = EN_XORPCK,
                .recalc         = &followparent_recalc,
                .name           = "armtim_ck",
                .parent         = &ck_ref,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                                 CLOCK_IDLE_CONTROL,
+                                 CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
                .enable_reg     = (void __iomem *)ARM_IDLECT2,
                .enable_bit     = EN_TIMCK,
                .recalc         = &followparent_recalc,
                .name           = "armwdt_ck",
                .parent         = &ck_ref,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                                 CLOCK_IDLE_CONTROL,
+                                 CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
                .enable_reg     = (void __iomem *)ARM_IDLECT2,
                .enable_bit     = EN_WDTCK,
                .recalc         = &omap1_watchdog_recalc,
                .name           = "tc_ck",
                .parent         = &ck_dpll1,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                                 CLOCK_IN_OMAP730 | RATE_CKCTL |
-                                 RATE_PROPAGATES | ALWAYS_ENABLED |
-                                 CLOCK_IDLE_CONTROL,
+                                 CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
+                                 RATE_CKCTL | RATE_PROPAGATES |
+                                 ALWAYS_ENABLED | CLOCK_IDLE_CONTROL,
                .rate_offset    = CKCTL_TCDIV_OFFSET,
                .recalc         = &omap1_ckctl_recalc,
                .enable         = &omap1_clk_enable_generic,
 static struct clk arminth_ck1510 = {
        .name           = "arminth_ck",
        .parent         = &tc_ck.clk,
-       .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
+                         ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
        /* Note: On 1510 the frequency follows TC_CK
         *
        /* No-idle controlled by "tc_ck" */
        .name           = "tibp_ck",
        .parent         = &tc_ck.clk,
-       .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
+                         ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
        .name           = "dma_ck",
        .parent         = &tc_ck.clk,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         ALWAYS_ENABLED,
+                         CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
        .recalc         = &followparent_recalc,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
                .name           = "api_ck",
                .parent         = &tc_ck.clk,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                                 CLOCK_IDLE_CONTROL,
+                                 CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
                .enable_reg     = (void __iomem *)ARM_IDLECT2,
                .enable_bit     = EN_APICK,
                .recalc         = &followparent_recalc,
        .clk = {
                .name           = "lb_ck",
                .parent         = &tc_ck.clk,
-               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IDLE_CONTROL,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
+                                 CLOCK_IDLE_CONTROL,
                .enable_reg     = (void __iomem *)ARM_IDLECT2,
                .enable_bit     = EN_LBCK,
                .recalc         = &followparent_recalc,
        .clk = {
                .name           = "lcd_ck",
                .parent         = &ck_dpll1,
-               .flags          = CLOCK_IN_OMAP1510 | RATE_CKCTL |
-                                 CLOCK_IDLE_CONTROL,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
+                                 RATE_CKCTL | CLOCK_IDLE_CONTROL,
                .enable_reg     = (void __iomem *)ARM_IDLECT2,
                .enable_bit     = EN_LCDCK,
                .rate_offset    = CKCTL_LCDDIV_OFFSET,
        /* Direct from ULPD, no real parent */
        .parent         = &armper_ck.clk,
        .rate           = 12000000,
-       .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT |
-                         ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
+                         ENABLE_REG_32BIT | ALWAYS_ENABLED |
+                         CLOCK_NO_IDLE_PARENT,
        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
        .enable_bit     = 29,   /* Chooses between 12MHz and 48MHz */
        .set_rate       = &omap1_set_uart_rate,
        .parent         = &armper_ck.clk,
        .rate           = 12000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         ENABLE_REG_32BIT | ALWAYS_ENABLED |
-                         CLOCK_NO_IDLE_PARENT,
+                         CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
+                         ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
        .enable_bit     = 30,   /* Chooses between 12MHz and 48MHz */
        .set_rate       = &omap1_set_uart_rate,
        /* Direct from ULPD, no real parent */
        .parent         = &armper_ck.clk,
        .rate           = 12000000,
-       .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT |
-                         ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
+                         ENABLE_REG_32BIT | ALWAYS_ENABLED |
+                         CLOCK_NO_IDLE_PARENT,
        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
        .enable_bit     = 31,   /* Chooses between 12MHz and 48MHz */
        .set_rate       = &omap1_set_uart_rate,
        /* Direct from ULPD, no parent */
        .rate           = 6000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         RATE_FIXED | ENABLE_REG_32BIT,
+                         CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT,
        .enable_reg     = (void __iomem *)ULPD_CLOCK_CTRL,
        .enable_bit     = USB_MCLK_EN_BIT,
        .enable         = &omap1_clk_enable_generic,
        .name           = "usb_hhc_ck",
        /* Direct from ULPD, no parent */
        .rate           = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
-       .flags          = CLOCK_IN_OMAP1510 |
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
                          RATE_FIXED | ENABLE_REG_32BIT,
        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
        .enable_bit     = USB_HOST_HHC_UHOST_EN,
        .name           = "mclk",
        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
        .rate           = 12000000,
-       .flags          = CLOCK_IN_OMAP1510 | RATE_FIXED,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
+       .enable_reg     = (void __iomem *)SOFT_REQ_REG,
+       .enable_bit     = 6,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
 };
        .name           = "bclk",
        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
        .rate           = 12000000,
-       .flags          = CLOCK_IN_OMAP1510 | RATE_FIXED,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
 };
        .parent         = &armper_ck.clk,
        .rate           = 48000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+                         CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT |
+                         CLOCK_NO_IDLE_PARENT,
        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
        .enable_bit     = 23,
        .enable         = &omap1_clk_enable_generic,
 static struct clk virtual_ck_mpu = {
        .name           = "mpu",
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         VIRTUAL_CLOCK | ALWAYS_ENABLED,
+                         CLOCK_IN_OMAP310 | VIRTUAL_CLOCK | ALWAYS_ENABLED,
        .parent         = &arm_ck, /* Is smarter alias for */
        .recalc         = &followparent_recalc,
        .set_rate       = &omap1_select_table_rate,