#define ETH_MAX_WIN            6
 #define ETH_MAX_REMAP_WIN      4
 
-/*
- * SATA Address Decode Windows registers
- */
-#define SATA_WIN_CTRL(win)     ORION_SATA_REG(0x30 + ((win) * 0x10))
-#define SATA_WIN_BASE(win)     ORION_SATA_REG(0x34 + ((win) * 0x10))
-#define SATA_MAX_WIN           4
-
 
 struct mbus_dram_target_info orion_mbus_dram_info;
 
                }
        }
 }
-
-void __init orion_setup_sata_wins(void)
-{
-       int i;
-
-       /*
-        * First, disable and clear windows
-        */
-       for (i = 0; i < SATA_MAX_WIN; i++) {
-               orion_write(SATA_WIN_BASE(i), 0);
-               orion_write(SATA_WIN_CTRL(i), 0);
-       }
-
-       /*
-        * Setup windows for DDR banks.
-        */
-       for (i = 0; i < DDR_MAX_CS; i++) {
-               u32 base, size;
-               size = orion_read(DDR_SIZE_CS(i));
-               base = orion_read(DDR_BASE_CS(i));
-               if (size & DDR_BANK_EN) {
-                       base = DDR_REG_TO_BASE(base);
-                       size = DDR_REG_TO_SIZE(size);
-                       orion_write(SATA_WIN_CTRL(i),
-                                       ((size-1) & 0xffff0000) |
-                                       (ATTR_DDR_CS(i) << 8) |
-                                       (TARGET_DDR << 4) | WIN_EN);
-                       orion_write(SATA_WIN_BASE(i),
-                                       base & 0xffff0000);
-               }
-       }
-}
 
 #include <linux/mbus.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/mv643xx_i2c.h>
+#include <linux/ata_platform.h>
 #include <asm/page.h>
 #include <asm/setup.h>
 #include <asm/timex.h>
 
 void __init orion_sata_init(struct mv_sata_platform_data *sata_data)
 {
+       sata_data->dram = &orion_mbus_dram_info;
        orion_sata.dev.platform_data = sata_data;
        platform_device_register(&orion_sata);
 }
         */
        orion_setup_cpu_wins();
        orion_setup_eth_wins();
-       if (dev == MV88F5182_DEV_ID)
-               orion_setup_sata_wins();
 
        /*
         * REgister devices
 
 void orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, int remap);
 void orion_setup_cpu_wins(void);
 void orion_setup_eth_wins(void);
-void orion_setup_sata_wins(void);
 
 /*
  * Shared code used internally by other Orion core functions.
 
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/ata_platform.h>
+#include <linux/mbus.h>
 #include <scsi/scsi_host.h>
 #include <scsi/scsi_cmnd.h>
 #include <scsi/scsi_device.h>
 #define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
 #define HAS_PCI(host) (!((host)->ports[0]->flags & MV_FLAG_SOC))
 
+#define WINDOW_CTRL(i)         (0x20030 + ((i) << 4))
+#define WINDOW_BASE(i)         (0x20034 + ((i) << 4))
+
 enum {
        /* DMA boundary 0xffff is required by the s/g splitting
         * we need on /length/ in mv_fill-sg().
        return 0;
 }
 
+static void mv_conf_mbus_windows(struct mv_host_priv *hpriv,
+                                struct mbus_dram_target_info *dram)
+{
+       int i;
+
+       for (i = 0; i < 4; i++) {
+               writel(0, hpriv->base + WINDOW_CTRL(i));
+               writel(0, hpriv->base + WINDOW_BASE(i));
+       }
+
+       for (i = 0; i < dram->num_cs; i++) {
+               struct mbus_dram_window *cs = dram->cs + i;
+
+               writel(((cs->size - 1) & 0xffff0000) |
+                       (cs->mbus_attr << 8) |
+                       (dram->mbus_dram_target_id << 4) | 1,
+                       hpriv->base + WINDOW_CTRL(i));
+               writel(cs->base, hpriv->base + WINDOW_BASE(i));
+       }
+}
+
 /**
  *      mv_platform_probe - handle a positive probe of an soc Marvell
  *      host
                                   res->end - res->start + 1);
        hpriv->base -= MV_SATAHC0_REG_BASE;
 
+       /*
+        * (Re-)program MBUS remapping windows if we are asked to.
+        */
+       if (mv_platform_data->dram != NULL)
+               mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
+
        rc = mv_create_dma_pools(hpriv, &pdev->dev);
        if (rc)
                return rc;
 
 /*
  * Marvell SATA private data
  */
+struct mbus_dram_target_info;
+
 struct mv_sata_platform_data {
+       struct mbus_dram_target_info    *dram;
        int     n_ports; /* number of sata ports */
 };