/* free all tx skbuff */
        for (i = 0; i < TX_RING_SIZE; i++) {
+               np->tx_ring[i].next_desc = 0;
+
                skb = np->tx_skbuff[i];
                if (skb) {
                        pci_unmap_single(np->pci_dev,
        }
        np->cur_tx = np->dirty_tx = 0;
        np->cur_task = 0;
+
+       np->last_tx = 0;
+       iowrite8(127, ioaddr + TxDMAPollPeriod);
+
        iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
        return 0;
 }
                                                sundance_reset(dev, (NetworkReset|FIFOReset|TxReset) << 16);
                                                /* No need to reset the Tx pointer here */
                                        }
-                                       /* Restart the Tx. */
-                                       iowrite16 (TxEnable, ioaddr + MACCtrl1);
+                                       /* Restart the Tx. Need to make sure tx enabled */
+                                       i = 10;
+                                       do {
+                                               iowrite16(ioread16(ioaddr + MACCtrl1) | TxEnable, ioaddr + MACCtrl1);
+                                               if (ioread16(ioaddr + MACCtrl1) & TxEnabled)
+                                                       break;
+                                               mdelay(1);
+                                       } while (--i);
                                }
                                /* Yup, this is a documentation bug.  It cost me *hours*. */
                                iowrite16 (0, ioaddr + TxStatus);