[ARM] S3C64XX: Set GPIO pin when select IRQ_EINT type

Set the GPIO pin mode to external interrupt when configuring
an IRQ_EINT's IRQ type.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
index 1f7cc0067f5cdd19fad4c487b2a2821687de3b92..5d62f2799ea9dad39bcf5378ff857c492e17154f 100644 (file)
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -14,12 +14,15 @@
 
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
+#include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 
 #include <asm/hardware/vic.h>
 
 #include <plat/regs-irqtype.h>
+#include <plat/regs-gpio.h>
+#include <plat/gpio-cfg.h>
 
 #include <mach/map.h>
 #include <plat/cpu.h>
@@ -74,6 +77,7 @@ static void s3c_irq_eint_maskack(unsigned int irq)
 static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
 {
        int offs = eint_offset(irq);
+       int pin;
        int shift;
        u32 ctrl, mask;
        u32 newvalue = 0;
@@ -125,6 +129,15 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
        ctrl |= newvalue << shift;
        __raw_writel(ctrl, reg);
 
+       /* set the GPIO pin appropriately */
+
+       if (offs < 23)
+               pin = S3C64XX_GPN(offs);
+       else
+               pin = S3C64XX_GPM(offs - 23);
+
+       s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2));
+
        return 0;
 }