.upper_margin   = 0,
        .lower_margin   = 0,
 
-       .lcdcon1        = 0x00008225,
        .lcdcon5        = 0x00000001,
 };
 
 
                .lower_margin   = 32,
                .vsync_len      = 3,
 
-               .lcdcon1        = 0x00000176,
                .lcdcon5        = 0x00014b02,
        },
        {
                .lower_margin   = 32,
                .vsync_len      = 3,
 
-               .lcdcon1        = 0x00000176,
                .lcdcon5        = 0x00014b02,
        },
        {
                .lower_margin   = 32,
                .vsync_len      = 3,
 
-               .lcdcon1        = 0x00000176,
                .lcdcon5        = 0x00014b02,
        },
 };
 
  * Set lcd on or off
  **/
 static struct s3c2410fb_display h1940_lcd __initdata = {
-       .lcdcon1=       S3C2410_LCDCON1_TFT16BPP | \
-                       S3C2410_LCDCON1_TFT | \
-                       S3C2410_LCDCON1_CLKVAL(0x0C),
-
        .lcdcon5=       S3C2410_LCDCON5_FRM565 | \
                        S3C2410_LCDCON5_INVVLINE | \
                        S3C2410_LCDCON5_HWSWP,
 
 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
        {
                /* Configuration for 640x480 SHARP LQ080V3DG01 */
-               .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
-                          S3C2410_LCDCON1_TFT |
-                          S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
-
                .lcdcon5 = S3C2410_LCDCON5_FRM565 |
                           S3C2410_LCDCON5_INVVLINE |
                           S3C2410_LCDCON5_INVVFRAME |
        },
        {
                /* Configuration for 480x640 toppoly TD028TTEC1 */
-               .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
-                          S3C2410_LCDCON1_TFT |
-                          S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
-
                .lcdcon5 = S3C2410_LCDCON5_FRM565 |
                           S3C2410_LCDCON5_INVVLINE |
                           S3C2410_LCDCON5_INVVFRAME |
        },
        {
                /* Config for 240x320 LCD */
-               .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
-                          S3C2410_LCDCON1_TFT |
-                          S3C2410_LCDCON1_CLKVAL(0x04),
-
                .lcdcon5 = S3C2410_LCDCON5_FRM565 |
                           S3C2410_LCDCON5_INVVLINE |
                           S3C2410_LCDCON5_INVVFRAME |
 
 /* framebuffer lcd controller information */
 
 static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
-       .lcdcon1 =      S3C2410_LCDCON1_TFT16BPP | \
-                       S3C2410_LCDCON1_TFT | \
-                       S3C2410_LCDCON1_CLKVAL(0x0C),
-
        .lcdcon5 =      S3C2410_LCDCON5_INVVLINE |
                        S3C2410_LCDCON5_FRM565 |
                        S3C2410_LCDCON5_HWSWP,
 
 
 static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = {
 
-       .lcdcon1        = S3C2410_LCDCON1_TFT16BPP |
-                         S3C2410_LCDCON1_TFT |
-                         S3C2410_LCDCON1_CLKVAL(0x04),
-
        .lcdcon5        = S3C2410_LCDCON5_FRM565 |
                          S3C2410_LCDCON5_INVVLINE |
                          S3C2410_LCDCON5_INVVFRAME |
 
        var->vsync_len = display->vsync_len;
        var->hsync_len = display->hsync_len;
 
-       fbi->regs.lcdcon1 = display->lcdcon1;
        fbi->regs.lcdcon5 = display->lcdcon5;
        /* set display type */
-       fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_TFT;
-       fbi->regs.lcdcon1 |= display->type;
+       fbi->regs.lcdcon1 = display->type;
 
        var->transp.offset = 0;
        var->transp.length = 0;
        if (type != S3C2410_LCDCON1_STN4)
                hs >>= 1;
 
-       regs->lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK;
-
        switch (var->bits_per_pixel) {
        case 1:
                regs->lcdcon1 |= S3C2410_LCDCON1_STN1BPP;
        const struct s3c2410fb_info *fbi = info->par;
        const struct fb_var_screeninfo *var = &info->var;
 
-       regs->lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK;
-
        switch (var->bits_per_pixel) {
        case 1:
                regs->lcdcon1 |= S3C2410_LCDCON1_TFT1BPP;
                        clkdiv = 2;
        }
 
-       fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_CLKVAL(0x3ff);
        fbi->regs.lcdcon1 |=  S3C2410_LCDCON1_CLKVAL(clkdiv);
 
        /* write new registers */
 
        unsigned short vsync_len;       /* value in lines (TFT) or 0 (STN) */
 
        /* lcd configuration registers */
-       unsigned long   lcdcon1;
        unsigned long   lcdcon5;
 };