ARM: OMAP: Fix OMAP2 DPLL clock rate calculation for large multipliers

If the multiplier is large enough the result may not fit in 32 bits.
Use a 64-bit scratch variable and 64-bit division instead.

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 6f897f307d67fce2d3badfc781f802ec630b54be..440db5153014e02add31550fbe81c7ad74602d56 100644 (file)
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -54,11 +54,13 @@ static void omap2_sys_clk_recalc(struct clk * clk)
 
 static u32 omap2_get_dpll_rate(struct clk * tclk)
 {
-       int dpll_clk, dpll_mult, dpll_div, amult;
+       long long dpll_clk;
+       int dpll_mult, dpll_div, amult;
 
        dpll_mult = (CM_CLKSEL1_PLL >> 12) & 0x03ff;    /* 10 bits */
        dpll_div = (CM_CLKSEL1_PLL >> 8) & 0x0f;        /* 4 bits */
-       dpll_clk = (tclk->parent->rate * dpll_mult) / (dpll_div + 1);
+       dpll_clk = (long long)tclk->parent->rate * dpll_mult;
+       do_div(dpll_clk, dpll_div + 1);
        amult = CM_CLKSEL2_PLL & 0x3;
        dpll_clk *= amult;