powerpc/40x: Limit allocable DRAM during early mapping

If the size of DRAM is not an exact power of two, we may not have
covered DRAM in its entirety with large 16 and 4 MiB pages.  If that
is the case, we can get non-recoverable page faults when doing the
final PTE mappings for the non-large page PTEs.

Consequently, we restrict the top end of DRAM currently allocable
by updating '__initial_memory_limit_addr' so that calls to the LMB to
allocate PTEs for "tail" coverage with normal-sized pages (or other
reasons) do not attempt to allocate outside the allowed range.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

diff --git a/arch/powerpc/mm/40x_mmu.c b/arch/powerpc/mm/40x_mmu.c
index cecbbc76f62425da81edc80529e4a65164d42435..29954dc28942ff8408c940402f9cac7a72b7ebd3 100644 (file)
--- a/arch/powerpc/mm/40x_mmu.c
+++ b/arch/powerpc/mm/40x_mmu.c
@@ -93,7 +93,7 @@ void __init MMU_init_hw(void)
 
 unsigned long __init mmu_mapin_ram(void)
 {
-       unsigned long v, s;
+       unsigned long v, s, mapped;
        phys_addr_t p;
 
        v = KERNELBASE;
@@ -130,5 +130,17 @@ unsigned long __init mmu_mapin_ram(void)
                s -= LARGE_PAGE_SIZE_4M;
        }
 
-       return total_lowmem - s;
+       mapped = total_lowmem - s;
+
+       /* If the size of RAM is not an exact power of two, we may not
+        * have covered RAM in its entirety with 16 and 4 MiB
+        * pages. Consequently, restrict the top end of RAM currently
+        * allocable so that calls to the LMB to allocate PTEs for "tail"
+        * coverage with normal-sized pages (or other reasons) do not
+        * attempt to allocate outside the allowed range.
+        */
+
+       __initial_memory_limit_addr = memstart_addr + mapped;
+
+       return mapped;
 }