.length = L3_24XX_SIZE,
.type = MT_DEVICE
},
- .virtual = L4_24XX_VIRT,
- .pfn = __phys_to_pfn(L4_24XX_PHYS),
- .length = L4_24XX_SIZE,
++#ifdef CONFIG_ARCH_OMAP2430
++ {
++ .virtual = L4_WK_243X_VIRT,
++ .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
++ .length = L4_WK_243X_SIZE,
++ .type = MT_DEVICE
++ },
++ {
++ .virtual = OMAP243X_GPMC_VIRT,
++ .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
++ .length = OMAP243X_GPMC_SIZE,
++ .type = MT_DEVICE
++ },
++ {
++ .virtual = OMAP243X_SDRC_VIRT,
++ .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
++ .length = OMAP243X_SDRC_SIZE,
++ .type = MT_DEVICE
++ },
++ {
++ .virtual = OMAP243X_SMS_VIRT,
++ .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
++ .length = OMAP243X_SMS_SIZE,
++ .type = MT_DEVICE
++ },
++#endif
++ {
++ .virtual = DSP_MEM_24XX_VIRT,
++ .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS),
++ .length = DSP_MEM_24XX_SIZE,
++ .type = MT_DEVICE
++ },
++ {
++ .virtual = DSP_IPI_24XX_VIRT,
++ .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS),
++ .length = DSP_IPI_24XX_SIZE,
++ .type = MT_DEVICE
++ },
+ {
++ .virtual = DSP_MMU_24XX_VIRT,
++ .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS),
++ .length = DSP_MMU_24XX_SIZE,
+ .type = MT_DEVICE
+ },
#ifdef CONFIG_ARCH_OMAP2430
{
.virtual = L4_WK_243X_VIRT,
#include <linux/spinlock.h>
#include <linux/err.h>
#include <linux/clk.h>
--#include <linux/clocksource.h>
-#include <linux/clockchips.h>
#include <asm/system.h>
#include <asm/hardware.h>
static unsigned long omap_32k_last_tick = 0;
++/*
++ * Returns elapsed usecs since last 32k timer interrupt
++ */
++static unsigned long omap_32k_timer_gettimeoffset(void)
++{
++ unsigned long now = omap_32k_sync_timer_read();
++ return omap_32k_ticks_to_usecs(now - omap_32k_last_tick);
++}
++
/*
* Returns current time from boot in nsecs. It's OK for this to wrap
* around for now, as it's just a relative time stamp.
return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read());
}
-static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
+/*
+ * Timer interrupt for 32KHz timer. When dynamic tick is enabled, this
+ * function is also called from other interrupts to remove latency
+ * issues with dynamic tick. In the dynamic tick case, we need to lock
+ * with irqsave.
+ */
+static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id)
{
- struct clock_event_device *evt = &clockevent_32k_timer;
+ unsigned long now;
+
omap_32k_timer_ack_irq();
+ now = omap_32k_sync_timer_read();
+
+ while ((signed long)(now - omap_32k_last_tick)
+ >= OMAP_32K_TICKS_PER_HZ) {
+ omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
+ timer_tick();
+ }
+
+ /* Restart timer so we don't drift off due to modulo or dynamic tick.
+ * By default we program the next timer to be continuous to avoid
+ * latencies during high system load. During dynamic tick operation the
+ * continuous timer can be overridden from pm_idle to be longer.
+ */
+ omap_32k_timer_start(omap_32k_last_tick + OMAP_32K_TICKS_PER_HZ - now);
+
+ return IRQ_HANDLED;
+}
+
++static irqreturn_t omap_32k_timer_handler(int irq, void *dev_id)
++{
++ return _omap_32k_timer_interrupt(irq, dev_id);
++}
++
+static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
+{
+ unsigned long flags;
- evt->event_handler(evt);
+ write_seqlock_irqsave(&xtime_lock, flags);
+ _omap_32k_timer_interrupt(irq, dev_id);
+ write_sequnlock_irqrestore(&xtime_lock, flags);
return IRQ_HANDLED;
}
- static irqreturn_t omap_32k_timer_handler(int irq, void *dev_id)
- {
- unsigned long now;
-
- now = omap_32k_sync_timer_read();
-
- /* Don't bother reprogramming timer if last tick was before next
- * jiffie. We will get another interrupt when previously programmed
- * timer expires. This cuts down interrupt load quite a bit.
- */
- if (now - omap_32k_last_tick < OMAP_32K_TICKS_PER_HZ)
- return IRQ_HANDLED;
-
- return _omap_32k_timer_interrupt(irq, dev_id);
- }
-
+#ifdef CONFIG_NO_IDLE_HZ
+/*
+ * Programs the next timer interrupt needed. Called when dynamic tick is
+ * enabled, and to reprogram the ticks to skip from pm_idle. Note that
+ * we can keep the timer continuous, and don't need to set it to run in
+ * one-shot mode. This is because the timer will get reprogrammed again
+ * after next interrupt.
+ */
+void omap_32k_timer_reprogram(unsigned long next_tick)
+{
+ unsigned long ticks = JIFFIES_TO_HW_TICKS(next_tick, 32768) + 1;
+ unsigned long now = omap_32k_sync_timer_read();
+ unsigned long idled = now - omap_32k_last_tick;
+
+ if (idled + 1 < ticks)
+ ticks -= idled;
+ else
+ ticks = 1;
+ omap_32k_timer_start(ticks);
+}
+
+static struct irqaction omap_32k_timer_irq;
+extern struct timer_update_handler timer_update;
+
+static int omap_32k_timer_enable_dyn_tick(void)
+{
+ /* No need to reprogram timer, just use the next interrupt */
+ return 0;
+}
+
+static int omap_32k_timer_disable_dyn_tick(void)
+{
+ omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
+ return 0;
+}
+
+static struct dyn_tick_timer omap_dyn_tick_timer = {
+ .enable = omap_32k_timer_enable_dyn_tick,
+ .disable = omap_32k_timer_disable_dyn_tick,
+ .reprogram = omap_32k_timer_reprogram,
+ .handler = omap_32k_timer_handler,
+};
+#endif /* CONFIG_NO_IDLE_HZ */
+
static struct irqaction omap_32k_timer_irq = {
.name = "32KHz timer",
.flags = IRQF_DISABLED | IRQF_TIMER,
static __init void omap_init_32k_timer(void)
{
+#ifdef CONFIG_NO_IDLE_HZ
+ omap_timer.dyn_tick = &omap_dyn_tick_timer;
+#endif
+
if (cpu_class_is_omap1())
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
++ omap_timer.offset = omap_32k_timer_gettimeoffset;
omap_32k_last_tick = omap_32k_sync_timer_read();
#ifdef CONFIG_ARCH_OMAP2
struct sys_timer omap_timer = {
.init = omap_timer_init,
++ .offset = NULL, /* Initialized later */
};
obj-$(CONFIG_FB_I810) += video/i810/
obj-$(CONFIG_FB_INTEL) += video/intelfb/
+# we also need input/serio early so serio bus is initialized by the time
+# serial drivers start registering their serio ports
+obj-$(CONFIG_SERIO) += input/serio/
obj-y += serial/
obj-$(CONFIG_PARPORT) += parport/
- obj-y += base/ block/ misc/ mfd/ net/ media/
+ obj-y += base/ block/ misc/ mfd/ net/ media/ cbus/
+obj-$(CONFIG_I2C) += i2c/
+obj-y += cbus/
obj-$(CONFIG_NUBUS) += nubus/
obj-$(CONFIG_ATM) += atm/
obj-y += macintosh/
To compile this driver as a module, choose M here: the
module will be called omap-keypad.
+config OMAP_PS2
+ tristate "TI OMAP Innovator 1510 PS/2 keyboard & mouse support"
+ depends on ARCH_OMAP15XX && MACH_OMAP_INNOVATOR
+ help
+ Say Y here if you want to use the OMAP Innovator 1510 PS/2
+ keyboard and mouse.
+
+ To compile this driver as a module, choose M here: the
+ module will be called innovator_ps2.
+
+ config KEYBOARD_PXA27x
+ tristate "PXA27x keyboard support"
+ depends on PXA27x
+ help
+ Enable support for PXA27x matrix keyboard controller
+
+ To compile this driver as a module, choose M here: the
+ module will be called pxa27x_keyboard.
+
config KEYBOARD_AAED2000
tristate "AAED-2000 keyboard"
depends on MACH_AAED2000
obj-$(CONFIG_KEYBOARD_SPITZ) += spitzkbd.o
obj-$(CONFIG_KEYBOARD_HIL) += hil_kbd.o
obj-$(CONFIG_KEYBOARD_HIL_OLD) += hilkbd.o
-obj-$(CONFIG_KEYBOARD_OMAP) += omap-keypad.o
+obj-$(CONFIG_KEYBOARD_OMAP) += omap-keypad.o
+obj-$(CONFIG_OMAP_PS2) += innovator_ps2.o
+ obj-$(CONFIG_KEYBOARD_PXA27x) += pxa27x_keyboard.o
-obj-$(CONFIG_KEYBOARD_AAED2000) += aaed2000_kbd.o
+obj-$(CONFIG_KEYBOARD_AAED2000) += aaed2000_kbd.o
obj-$(CONFIG_KEYBOARD_GPIO) += gpio_keys.o
+obj-$(CONFIG_KEYBOARD_TSC2301) += tsc2301_kp.o
source "drivers/media/video/pwc/Kconfig"
+ config USB_ZR364XX
+ tristate "USB ZR364XX Camera support"
+ depends on USB && VIDEO_V4L2
+ ---help---
+ Say Y here if you want to connect this type of camera to your
+ computer's USB port.
+ See <file:Documentation/video4linux/zr364xx.txt> for more info
+ and list of supported cameras.
+
+ To compile this driver as a module, choose M here: the
+ module will be called zr364xx.
+
endmenu # V4L USB devices
+source drivers/media/video/omap/Kconfig
+
endmenu
help
Support for NAND flash on Amstrad E3 (Delta).
+config MTD_NAND_OMAP
+ tristate "NAND Flash device on OMAP H3/H2/P2 boards"
+ depends on ARM && ARCH_OMAP1 && MTD_NAND && (MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_PERSEUS2)
+ help
+ Support for NAND flash on Texas Instruments H3/H2/P2 platforms.
+
+config MTD_NAND_OMAP_HW
+ bool "OMAP HW NAND Flash controller support"
+ depends on ARM && ARCH_OMAP16XX && MTD_NAND
+
+ help
+ Driver for TI OMAP16xx hardware NAND flash controller.
+
config MTD_NAND_TOTO
tristate "NAND Flash device on TOTO board"
- depends on ARCH_OMAP && MTD_NAND && BROKEN
+ depends on ARCH_OMAP && BROKEN
help
Support for NAND flash on Texas Instruments Toto platform.
obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o
obj-$(CONFIG_MTD_NAND_CS553X) += cs553x_nand.o
obj-$(CONFIG_MTD_NAND_NDFC) += ndfc.o
+obj-$(CONFIG_MTD_NAND_OMAP) += omap-nand-flash.o
+obj-$(CONFIG_MTD_NAND_OMAP_HW) += omap-hw.o
obj-$(CONFIG_MTD_NAND_AT91) += at91_nand.o
+ obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o
nand-objs := nand_base.o nand_bbt.o
To compile it as a module, choose M here. If unsure, say N.
- config IP_NF_NAT_SNMP_BASIC
- tristate "Basic SNMP-ALG support (EXPERIMENTAL)"
- depends on EXPERIMENTAL && IP_NF_NAT
- ---help---
-
- This module implements an Application Layer Gateway (ALG) for
- SNMP payloads. In conjunction with NAT, it allows a network
- management system to access multiple private networks with
- conflicting addresses. It works by modifying IP addresses
- inside SNMP payloads to match IP-layer NAT mapping.
-
- This is the "basic" form of SNMP-ALG, as described in RFC 2962
+
+ To compile it as a module, choose M here. If unsure, say N.
+
config NF_NAT_SNMP_BASIC
tristate "Basic SNMP-ALG support (EXPERIMENTAL)"
depends on EXPERIMENTAL && NF_NAT
projects / linux-2.6-omap-h63xx.git / commitdiff