over-ride platform specific driver.
                        See also Documentation/acpi-hotkey.txt.
 
+       enable_timer_pin_1 [i386,x86-64]
+                       Enable PIN 1 of APIC timer
+                       Can be useful to work around chipset bugs (in particular on some ATI chipsets)
+                       The kernel tries to set a reasonable default.
+
+       disable_timer_pin_1 [i386,x86-64]
+                       Disable PIN 1 of APIC timer
+                       Can be useful to work around chipset bugs.
+
        ad1816=         [HW,OSS]
                        Format: <io>,<irq>,<dma>,<dma2>
                        See also Documentation/sound/oss/AD1816.
 
        if (vendor == PCI_VENDOR_ID_NVIDIA) {
                acpi_skip_timer_override = 1;
        }
+       /*
+        * ATI IXP chipsets get double timer interrupts.
+        * For now just do this for all ATI chipsets.
+        * FIXME: this needs to be checked for the non ACPI case too.
+        */
+       if (vendor == PCI_VENDOR_ID_ATI)
+               disable_timer_pin_1 = 1;
        return 0;
 }
 
 
  */
 int nr_ioapic_registers[MAX_IO_APICS];
 
+int disable_timer_pin_1 __initdata;
+
 /*
  * Rough estimation of how many shared IRQs there are, can
  * be changed anytime.
                                setup_nmi();
                                enable_8259A_irq(0);
                        }
+                       if (disable_timer_pin_1 > 0)
+                               clear_IO_APIC_pin(0, pin1);
                        return;
                }
                clear_IO_APIC_pin(0, pin1);
 
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
+               if (!memcmp(from, "disable_timer_pin_1", 19))
+                       disable_timer_pin_1 = 1;
+               if (!memcmp(from, "enable_timer_pin_1", 18))
+                       disable_timer_pin_1 = -1;
+
                /* disable IO-APIC */
                else if (!memcmp(from, "noapic", 6))
                        disable_ioapic_setup();
 
 
 static int no_timer_check;
 
+int disable_timer_pin_1 __initdata;
+
 static DEFINE_SPINLOCK(ioapic_lock);
 
 /*
 #endif
                                        /* RED-PEN skip them on mptables too? */
                                        return;
+                               case PCI_VENDOR_ID_ATI:
+                                       /* All timer interrupts on atiixp
+                                          are doubled. Disable one. */
+                                       if (disable_timer_pin_1 == 0) {
+                                               disable_timer_pin_1 = 1;
+                                               printk(KERN_INFO
+               "ATI board detected. Disabling timer pin 1.\n");
+                                       }
+                                       return;
                                } 
 
                                /* No multi-function device? */
                                setup_nmi();
                                enable_8259A_irq(0);
                        }
+                       if (disable_timer_pin_1 > 0)
+                               clear_IO_APIC_pin(0, pin1);
                        return;
                }
                clear_IO_APIC_pin(0, pin1);
 
 #endif
 #endif
 
+               if (!memcmp(from, "disable_timer_pin_1", 19))
+                       disable_timer_pin_1 = 1;
+               if (!memcmp(from, "enable_timer_pin_1", 18))
+                       disable_timer_pin_1 = -1;
+
                if (!memcmp(from, "nolapic", 7) ||
                    !memcmp(from, "disableapic", 11))
                        disable_apic = 1;
 
 #define NMI_LOCAL_APIC 2
 #define NMI_INVALID    3
 
+extern int disable_timer_pin_1;
+
 #else /* !CONFIG_X86_LOCAL_APIC */
 static inline void lapic_shutdown(void) { }
 
 
 #define NMI_LOCAL_APIC 2
 #define NMI_INVALID    3
 
+extern int disable_timer_pin_1;
+
 #endif /* CONFIG_X86_LOCAL_APIC */
 
 extern unsigned boot_cpu_id;