ARM: OMAP3: Check for L2 cache enabled

Enabling L2 cache of Cortex-A8 based OMAP3 has to be done by
bootloader. Check if this is done and warn if not.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Felipe Balbi <felipe.balbi@nokia.com>
----

Changes in v3: Remove braces. Thanks to Felipe for review!
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 835452b43a742d1d6dc2efd2850cbe1595ae17aa..0db34ba86ef713eb5586647067de083e7a4d2b3a 100644 (file)
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -267,3 +267,25 @@ void __init omap2_check_revision(void)
 
 }
 
+#ifdef CONFIG_ARCH_OMAP3
+/*
+ * OMAP3 has L2 cache which has to be enabled by bootloader.
+ */
+static int __init omap3_check_l2cache(void)
+{
+       u32 val;
+
+       /* Get CP15 AUX register, bit 1 enabled indicates L2 cache is on */
+       asm volatile("mrc p15, 0, %0, c1, c0, 1":"=r" (val));
+
+       if ((val & 0x2) == 0)
+               printk(KERN_WARNING "Warning: L2 cache not enabled. Check "
+                      "your bootloader. L2 off results in performance loss\n");
+       else
+               pr_info("OMAP3 L2 cache enabled\n");
+
+       return 0;
+}
+
+arch_initcall(omap3_check_l2cache);
+#endif /* CONFIG_ARCH_OMAP3 */