RTL_GIGA_MAC_VER_20 = 0x14, // 8168C
        RTL_GIGA_MAC_VER_21 = 0x15, // 8168C
        RTL_GIGA_MAC_VER_22 = 0x16, // 8168C
-       RTL_GIGA_MAC_VER_23 = 0x17  // 8168CP
+       RTL_GIGA_MAC_VER_23 = 0x17, // 8168CP
+       RTL_GIGA_MAC_VER_24 = 0x18  // 8168CP
 };
 
 #define _R(NAME,MAC,MASK) \
        _R("RTL8168c/8111c",    RTL_GIGA_MAC_VER_20, 0xff7e1880), // PCI-E
        _R("RTL8168c/8111c",    RTL_GIGA_MAC_VER_21, 0xff7e1880), // PCI-E
        _R("RTL8168c/8111c",    RTL_GIGA_MAC_VER_22, 0xff7e1880), // PCI-E
-       _R("RTL8168cp/8111cp",  RTL_GIGA_MAC_VER_23, 0xff7e1880)  // PCI-E
+       _R("RTL8168cp/8111cp",  RTL_GIGA_MAC_VER_23, 0xff7e1880), // PCI-E
+       _R("RTL8168cp/8111cp",  RTL_GIGA_MAC_VER_24, 0xff7e1880)  // PCI-E
 };
 #undef _R
 
                int mac_version;
        } mac_info[] = {
                /* 8168C family. */
+               { 0x7cf00000, 0x3ca00000,       RTL_GIGA_MAC_VER_24 },
                { 0x7cf00000, 0x3c900000,       RTL_GIGA_MAC_VER_23 },
                { 0x7cf00000, 0x3c800000,       RTL_GIGA_MAC_VER_18 },
-               { 0x7c800000, 0x3c800000,       RTL_GIGA_MAC_VER_23 },
+               { 0x7c800000, 0x3c800000,       RTL_GIGA_MAC_VER_24 },
                { 0x7cf00000, 0x3c000000,       RTL_GIGA_MAC_VER_19 },
                { 0x7cf00000, 0x3c200000,       RTL_GIGA_MAC_VER_20 },
                { 0x7cf00000, 0x3c300000,       RTL_GIGA_MAC_VER_21 },
                rtl8168c_4_hw_phy_config(ioaddr);
                break;
        case RTL_GIGA_MAC_VER_23:
+       case RTL_GIGA_MAC_VER_24:
                rtl8168cp_2_hw_phy_config(ioaddr);
                break;
 
        RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
 }
 
+static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)
+{
+       rtl_csi_access_enable(ioaddr);
+
+       RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+
+       /* Magic. */
+       RTL_W8(DBG_REG, 0x20);
+
+       RTL_W8(EarlyTxThres, EarlyTxThld);
+
+       rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
+
+       RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
+}
+
 static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)
 {
        static struct ephy_info e_info_8168c_1[] = {
                rtl_hw_start_8168cp_2(ioaddr, pdev);
        break;
 
+       case RTL_GIGA_MAC_VER_24:
+               rtl_hw_start_8168cp_3(ioaddr, pdev);
+       break;
+
        default:
                printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
                        dev->name, tp->mac_version);