clock-frequency = <0>; /* Filled in by U-Boot */
 
                SDRAM0: memory-controller {
-                       compatible = "ibm,sdram-405exr";
+                       compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
                        dcr-reg = <0x010 0x002>;
+                       interrupt-parent = <&UIC2>;
+                       interrupts = <0x5 0x4   /* ECC DED Error */ 
+                                     0x6 0x4>; /* ECC SEC Error */ 
                };
 
                MAL0: mcmal {
 
                clock-frequency = <0>; /* Filled in by U-Boot */
 
                SDRAM0: memory-controller {
-                       compatible = "ibm,sdram-405ex";
+                       compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
                        dcr-reg = <0x010 0x002>;
+                       interrupt-parent = <&UIC2>;
+                       interrupts = <0x5 0x4   /* ECC DED Error */ 
+                                     0x6 0x4>; /* ECC SEC Error */ 
                };
 
                MAL0: mcmal {
 
                clock-frequency = <0>; /* Filled in by U-Boot */
 
                SDRAM0: memory-controller {
-                       compatible = "ibm,sdram-405ex";
+                       compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
                        dcr-reg = <0x010 0x002>;
+                       interrupt-parent = <&UIC2>;
+                       interrupts = <0x5 0x4 /* ECC DED Error */
+                                     0x6 0x4 /* ECC SEC Error */ >;
                };
 
                MAL0: mcmal {