A few more outstanding nommu fixups..
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
 CONFIG_MEMORY_START     ?= 0x0c000000
 CONFIG_BOOT_LINK_OFFSET ?= 0x00800000
 
-IMAGE_OFFSET   := $(shell printf "0x%8x" $$[$(CONFIG_PAGE_OFFSET)  + \
-                                            $(CONFIG_MEMORY_START) + \
-                                            $(CONFIG_BOOT_LINK_OFFSET)])
+IMAGE_OFFSET   := $(shell printf "0x%08x" $$[$(CONFIG_PAGE_OFFSET)  + \
+                                             $(CONFIG_MEMORY_START) + \
+                                             $(CONFIG_BOOT_LINK_OFFSET)])
 
 LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
 
 
 {
        ctrl_outl(pc, UBC_BARA);
 
+#ifdef CONFIG_MMU
        /* We don't have any ASID settings for the SH-2! */
        if (cpu_data->type != CPU_SH7604)
                ctrl_outb(asid, UBC_BASRA);
+#endif
 
        ctrl_outl(0, UBC_BAMRA);
 
        }
 #endif
 
+#ifdef CONFIG_MMU
        /*
         * Restore the kernel mode register
         *      k7 (r7_bank1)
        asm volatile("ldc       %0, r7_bank"
                     : /* no output */
                     : "r" (task_thread_info(next)));
+#endif
 
-#ifdef CONFIG_MMU
        /* If no tasks are using the UBC, we're done */
        if (ubc_usercnt == 0)
                /* If no tasks are using the UBC, we're done */;
        else if (next->thread.ubc_pc && next->mm) {
-               ubc_set_tracing(next->mm->context & MMU_CONTEXT_ASID_MASK,
-                               next->thread.ubc_pc);
+               int asid = 0;
+#ifdef CONFIG_MMU
+               asid |= next->mm->context & MMU_CONTEXT_ASID_MASK;
+#endif
+               ubc_set_tracing(asid, next->thread.ubc_pc);
        } else {
                ctrl_outw(0, UBC_BBRA);
                ctrl_outw(0, UBC_BBRB);
        }
-#endif
 
        return prev;
 }
 
 DECLARE_EXPORT(__movstr_i4_even);
 DECLARE_EXPORT(__movstr_i4_odd);
 DECLARE_EXPORT(__movstrSI12_i4);
+#endif
 
+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
 /* needed by some modules */
 EXPORT_SYMBOL(flush_cache_all);
 EXPORT_SYMBOL(flush_cache_range);
 EXPORT_SYMBOL(flush_dcache_page);
 EXPORT_SYMBOL(__flush_purge_region);
-EXPORT_SYMBOL(clear_user_page);
 #endif
 
-#if defined(CONFIG_SH7705_CACHE_32KB)
-EXPORT_SYMBOL(flush_cache_all);
-EXPORT_SYMBOL(flush_cache_range);
-EXPORT_SYMBOL(flush_dcache_page);
-EXPORT_SYMBOL(__flush_purge_region);
+#ifdef CONFIG_MMU
+EXPORT_SYMBOL(clear_user_page);
 #endif
 
 EXPORT_SYMBOL(flush_tlb_page);
 
        return error;
 }
 
-#if defined(HAVE_ARCH_UNMAPPED_AREA)
+#if defined(HAVE_ARCH_UNMAPPED_AREA) && defined(CONFIG_MMU)
 /*
  * To avoid cache alias, we map the shard page with same color.
  */
 
 
 config 32BIT
        bool "Support 32-bit physical addressing through PMB"
-       depends on CPU_SH4A
+       depends on CPU_SH4A && MMU
        default y
        help
          If you say Y here, physical addressing will be extended to
 
 
 obj-$(CONFIG_CPU_SH2)  += cache-sh2.o
 obj-$(CONFIG_CPU_SH3)  += cache-sh3.o
-obj-$(CONFIG_CPU_SH4)  += cache-sh4.o pg-sh4.o
+obj-$(CONFIG_CPU_SH4)  += cache-sh4.o
 
 obj-$(CONFIG_DMA_PAGE_OPS)     += pg-dma.o
 obj-$(CONFIG_HUGETLB_PAGE)     += hugetlbpage.o
 
 ifdef CONFIG_MMU
 obj-$(CONFIG_CPU_SH3)          += tlb-sh3.o
-obj-$(CONFIG_CPU_SH4)          += tlb-sh4.o
+obj-$(CONFIG_CPU_SH4)          += tlb-sh4.o pg-sh4.o
 obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
 endif
 
 
 #include <asm/cpu/addrspace.h>
 
 /* Memory segments (32bit Privileged mode addresses)  */
-#ifdef CONFIG_MMU
+#ifndef CONFIG_CPU_SH2A
 #define P0SEG          0x00000000
 #define P1SEG          0x80000000
 #define P2SEG          0xa0000000
 #define P0SEG          0x00000000
 #define P1SEG          0x00000000
 #define P2SEG          0x20000000
-#define P3SEG          0x40000000
+#define P3SEG          0x00000000
 #define P4SEG          0x80000000
 #endif
 
 
 
 #define IO_SPACE_LIMIT 0xffffffff
 
+#ifdef CONFIG_MMU
 /*
  * Change virtual addresses to physical addresses and vv.
  * These are trivial on the 1:1 Linux/SuperH mapping
 {
        return (void *)P1SEGADDR(address);
 }
+#else
+#define phys_to_virt(address)  ((void *)(address))
+#define virt_to_phys(address)  ((unsigned long)(address))
+#endif
 
 #define virt_to_bus virt_to_phys
 #define bus_to_virt phys_to_virt
 
 
 #define segment_eq(a,b)        ((a).seg == (b).seg)
 
-#define __addr_ok(addr) \
-       ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
-
 #define get_ds()       (KERNEL_DS)
 
 #if !defined(CONFIG_MMU)
+/* NOMMU is always true */
+#define __addr_ok(addr) (1)
+
 static inline mm_segment_t get_fs(void)
 {
        return USER_DS;
        return ((addr >= memory_start) && ((addr + size) < memory_end));
 }
 #else /* CONFIG_MMU */
+#define __addr_ok(addr) \
+       ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
+
 #define get_fs()       (current_thread_info()->addr_limit)
 #define set_fs(x)      (current_thread_info()->addr_limit = (x))