#address-cells = <1>;
                #size-cells = <1>;
                device_type = "soc";
-               compatible = "simple-bus";
+               compatible = "fsl,mpc8315-immr", "simple-bus";
                ranges = <0 0xe0000000 0x00100000>;
                reg = <0xe0000000 0x00000200>;
                bus-frequency = <0>;
 
 #define MPC83XX_SCCR_USB_DRCM_11   0x00300000
 #define MPC83XX_SCCR_USB_DRCM_01   0x00100000
 #define MPC83XX_SCCR_USB_DRCM_10   0x00200000
+#define MPC8315_SCCR_USB_MASK      0x00c00000
+#define MPC8315_SCCR_USB_DRCM_11   0x00c00000
 #define MPC837X_SCCR_USB_DRCM_11   0x00c00000
 
 /* system i/o configuration register low */
 
        u32 temp;
        void __iomem *immap, *usb_regs;
        struct device_node *np = NULL;
+       struct device_node *immr_node = NULL;
        const void *prop;
        struct resource res;
        int ret = 0;
        }
 
        /* Configure clock */
-       temp = in_be32(immap + MPC83XX_SCCR_OFFS);
-       temp &= ~MPC83XX_SCCR_USB_MASK;
-       temp |= MPC83XX_SCCR_USB_DRCM_11;  /* 1:3 */
-       out_be32(immap + MPC83XX_SCCR_OFFS, temp);
+       immr_node = of_get_parent(np);
+       if (immr_node && of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
+               clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
+                               MPC8315_SCCR_USB_MASK,
+                               MPC8315_SCCR_USB_DRCM_11);
+       else
+               clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
+                               MPC83XX_SCCR_USB_MASK,
+                               MPC83XX_SCCR_USB_DRCM_11);
 
        /* Configure pin mux for ULPI.  There is no pin mux for UTMI */
        if (prop && !strcmp(prop, "ulpi")) {
 
        iounmap(immap);
 
+       if (immr_node)
+               of_node_put(immr_node);
+
        /* Map USB SOC space */
        ret = of_address_to_resource(np, 0, &res);
        if (ret) {