Montecito behaves slightly differently than previous processors,
resulting in the MCA due to a failed PIO read to sometimes surfacing
outside the nofault code.  Adding an additional or and stop bits
ensures the MCA surfaces in the nofault code.
Signed-off-by: Russ Anderson <rja@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
 xp_nofault_PIOR:
        mov     r8=r0                   // Stage a success return value
        ld8.acq r9=[r32];;              // PIO Read the specified register
-       adds    r9=1,r9                 // Add to force a consume
+       adds    r9=1,r9;;               // Add to force consumption
+       or      r9=r9,r9;;              // Or to force consumption
        br.ret.sptk.many b0;;           // Return success
 
        .global xp_error_PIOR