tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
 }
 
-int iwl4965_hw_get_rx_read(struct iwl_priv *priv)
+static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
 {
        struct iwl4965_shared *s = priv->shared_virt;
        return le32_to_cpu(s->rb_closed) & 0xFFF;
 
        memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
 
+       priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
+
        return 0;
 }
 
        .set_hw_params = iwl4965_hw_set_hw_params,
        .alloc_shared_mem = iwl4965_alloc_shared_mem,
        .free_shared_mem = iwl4965_free_shared_mem,
+       .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
        .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
        .disable_tx_fifo = iwl4965_disable_tx_fifo,
        .rx_handler_setup = iwl4965_rx_handler_setup,
 
 
        memset(priv->shared_virt, 0, sizeof(struct iwl5000_shared));
 
+       priv->rb_closed_offset = offsetof(struct iwl5000_shared, rb_closed);
+
        return 0;
 }
 
                                    priv->shared_phys);
 }
 
+static int iwl5000_shared_mem_rx_idx(struct iwl_priv *priv)
+{
+       struct iwl5000_shared *s = priv->shared_virt;
+       return le32_to_cpu(s->rb_closed) & 0xFFF;
+}
+
 /**
  * iwl5000_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
  */
        .set_hw_params = iwl5000_hw_set_hw_params,
        .alloc_shared_mem = iwl5000_alloc_shared_mem,
        .free_shared_mem = iwl5000_free_shared_mem,
+       .shared_mem_rx_idx = iwl5000_shared_mem_rx_idx,
        .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl,
        .disable_tx_fifo = iwl5000_disable_tx_fifo,
        .apm_ops = {
 
        /* ucode shared memory */
        int (*alloc_shared_mem)(struct iwl_priv *priv);
        void (*free_shared_mem)(struct iwl_priv *priv);
+       int (*shared_mem_rx_idx)(struct iwl_priv *priv);
        void (*txq_update_byte_cnt_tbl)(struct iwl_priv *priv,
                                        struct iwl4965_tx_queue *txq,
                                        u16 byte_cnt);
 
 extern int iwl4965_hw_get_temperature(struct iwl_priv *priv);
 extern unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
                                 struct iwl4965_frame *frame, u8 rate);
-extern int iwl4965_hw_get_rx_read(struct iwl_priv *priv);
 extern void iwl4965_hw_build_tx_cmd_rate(struct iwl_priv *priv,
                                     struct iwl_cmd *cmd,
                                     struct ieee80211_tx_control *ctrl,
        struct iwl_hw_params hw_params;
        /* driver/uCode shared Tx Byte Counts and Rx status */
        void *shared_virt;
+       int rb_closed_offset;
        /* Physical Pointer to Tx Byte Counts and Rx status */
        dma_addr_t shared_phys;
 
 
 
        /* Tell device where in DRAM to update its Rx status */
        iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
-                          (priv->shared_phys +
-                           offsetof(struct iwl4965_shared, rb_closed)) >> 4);
+                          (priv->shared_phys + priv->rb_closed_offset) >> 4);
 
        /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
        iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 
 
        /* uCode's read index (stored in shared DRAM) indicates the last Rx
         * buffer that the driver may process (last buffer filled by ucode). */
-       r = iwl4965_hw_get_rx_read(priv);
+       r = priv->cfg->ops->lib->shared_mem_rx_idx(priv);
        i = rxq->read;
 
        /* Rx interrupt, but nothing sent from uCode */