From 7aec35661733c651f616f9b3f69d758f6bfe2a7f Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 6 Apr 2009 19:00:36 -0700 Subject: [PATCH] Blackfin SPI Driver: unify duplicated code in dma read/write paths For DMA TX/RX operation in pump_transfers, DMA contriguration code in TX and RX paths are almost the same. This patch unify the duplicated DMA code to make it more readable. Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu Acked-by: David Brownell Cc: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/spi/spi_bfin5xx.c | 47 +++++++++++++++++---------------------- 1 file changed, 21 insertions(+), 26 deletions(-) diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index 2e0c024bbde..4e45a3f7c15 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c @@ -756,18 +756,19 @@ static void pump_transfers(unsigned long data) if (!full_duplex && drv_data->cur_chip->enable_dma && drv_data->len > 6) { + unsigned long dma_start_addr; + disable_dma(drv_data->dma_channel); clear_dma_irqstat(drv_data->dma_channel); bfin_spi_disable(drv_data); /* config dma channel */ dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); + set_dma_x_count(drv_data->dma_channel, drv_data->len); if (width == CFG_SPI_WORDSIZE16) { - set_dma_x_count(drv_data->dma_channel, drv_data->len); set_dma_x_modify(drv_data->dma_channel, 2); dma_width = WDSIZE_16; } else { - set_dma_x_count(drv_data->dma_channel, drv_data->len); set_dma_x_modify(drv_data->dma_channel, 1); dma_width = WDSIZE_8; } @@ -802,6 +803,7 @@ static void pump_transfers(unsigned long data) } /* In dma mode, rx or tx must be NULL in one transfer */ + dma_config = (RESTART | dma_width | DI_EN); if (drv_data->rx != NULL) { /* set transfer mode, and enable SPI */ dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); @@ -815,19 +817,9 @@ static void pump_transfers(unsigned long data) /* clear tx reg soformer data is not shifted out */ write_TDBR(drv_data, 0xFFFF); - set_dma_x_count(drv_data->dma_channel, drv_data->len); - - /* start dma */ - dma_enable_irq(drv_data->dma_channel); - dma_config = (WNR | RESTART | dma_width | DI_EN); - set_dma_config(drv_data->dma_channel, dma_config); - set_dma_start_addr(drv_data->dma_channel, - (unsigned long)drv_data->rx); - enable_dma(drv_data->dma_channel); - - /* start SPI transfer */ - write_CTRL(drv_data, - (cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE)); + dma_config |= WNR; + dma_start_addr = (unsigned long)drv_data->rx; + cr |= CFG_SPI_DMAREAD; } else if (drv_data->tx != NULL) { dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); @@ -838,18 +830,21 @@ static void pump_transfers(unsigned long data) (unsigned long) (drv_data->tx + drv_data->len_in_bytes)); - /* start dma */ - dma_enable_irq(drv_data->dma_channel); - dma_config = (RESTART | dma_width | DI_EN); - set_dma_config(drv_data->dma_channel, dma_config); - set_dma_start_addr(drv_data->dma_channel, - (unsigned long)drv_data->tx); - enable_dma(drv_data->dma_channel); + dma_start_addr = (unsigned long)drv_data->tx; + cr |= CFG_SPI_DMAWRITE; + + } else + BUG(); + + /* start dma */ + dma_enable_irq(drv_data->dma_channel); + set_dma_config(drv_data->dma_channel, dma_config); + set_dma_start_addr(drv_data->dma_channel, dma_start_addr); + enable_dma(drv_data->dma_channel); + + /* start SPI transfer */ + write_CTRL(drv_data, (cr | BIT_CTL_ENABLE)); - /* start SPI transfer */ - write_CTRL(drv_data, - (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); - } } else { /* IO mode write then read */ dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n"); -- 2.41.1