2 * arch/arm/mach-at91rm9200/at91sam9261.c
4 * Copyright (C) 2005 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
15 #include <asm/mach/arch.h>
16 #include <asm/mach/map.h>
17 #include <asm/arch/at91sam9261.h>
18 #include <asm/arch/at91_pmc.h>
19 #include <asm/arch/at91_rstc.h>
24 static struct map_desc at91sam9261_io_desc[] __initdata = {
26 .virtual = AT91_VA_BASE_SYS,
27 .pfn = __phys_to_pfn(AT91_BASE_SYS),
31 .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
32 .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
33 .length = AT91SAM9261_SRAM_SIZE,
38 /* --------------------------------------------------------------------
40 * -------------------------------------------------------------------- */
43 * The peripheral clocks.
45 static struct clk pioA_clk = {
47 .pmc_mask = 1 << AT91SAM9261_ID_PIOA,
48 .type = CLK_TYPE_PERIPHERAL,
50 static struct clk pioB_clk = {
52 .pmc_mask = 1 << AT91SAM9261_ID_PIOB,
53 .type = CLK_TYPE_PERIPHERAL,
55 static struct clk pioC_clk = {
57 .pmc_mask = 1 << AT91SAM9261_ID_PIOC,
58 .type = CLK_TYPE_PERIPHERAL,
60 static struct clk usart0_clk = {
62 .pmc_mask = 1 << AT91SAM9261_ID_US0,
63 .type = CLK_TYPE_PERIPHERAL,
65 static struct clk usart1_clk = {
67 .pmc_mask = 1 << AT91SAM9261_ID_US1,
68 .type = CLK_TYPE_PERIPHERAL,
70 static struct clk usart2_clk = {
72 .pmc_mask = 1 << AT91SAM9261_ID_US2,
73 .type = CLK_TYPE_PERIPHERAL,
75 static struct clk mmc_clk = {
77 .pmc_mask = 1 << AT91SAM9261_ID_MCI,
78 .type = CLK_TYPE_PERIPHERAL,
80 static struct clk udc_clk = {
82 .pmc_mask = 1 << AT91SAM9261_ID_UDP,
83 .type = CLK_TYPE_PERIPHERAL,
85 static struct clk twi_clk = {
87 .pmc_mask = 1 << AT91SAM9261_ID_TWI,
88 .type = CLK_TYPE_PERIPHERAL,
90 static struct clk spi0_clk = {
92 .pmc_mask = 1 << AT91SAM9261_ID_SPI0,
93 .type = CLK_TYPE_PERIPHERAL,
95 static struct clk spi1_clk = {
97 .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
98 .type = CLK_TYPE_PERIPHERAL,
100 static struct clk ohci_clk = {
102 .pmc_mask = 1 << AT91SAM9261_ID_UHP,
103 .type = CLK_TYPE_PERIPHERAL,
105 static struct clk lcdc_clk = {
107 .pmc_mask = 1 << AT91SAM9261_ID_LCDC,
108 .type = CLK_TYPE_PERIPHERAL,
111 static struct clk *periph_clocks[] __initdata = {
131 * The four programmable clocks.
132 * You must configure pin multiplexing to bring these signals out.
134 static struct clk pck0 = {
136 .pmc_mask = AT91_PMC_PCK0,
137 .type = CLK_TYPE_PROGRAMMABLE,
140 static struct clk pck1 = {
142 .pmc_mask = AT91_PMC_PCK1,
143 .type = CLK_TYPE_PROGRAMMABLE,
146 static struct clk pck2 = {
148 .pmc_mask = AT91_PMC_PCK2,
149 .type = CLK_TYPE_PROGRAMMABLE,
152 static struct clk pck3 = {
154 .pmc_mask = AT91_PMC_PCK3,
155 .type = CLK_TYPE_PROGRAMMABLE,
160 static struct clk hck0 = {
162 .pmc_mask = AT91_PMC_HCK0,
163 .type = CLK_TYPE_SYSTEM,
166 static struct clk hck1 = {
168 .pmc_mask = AT91_PMC_HCK1,
169 .type = CLK_TYPE_SYSTEM,
173 static void __init at91sam9261_register_clocks(void)
177 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
178 clk_register(periph_clocks[i]);
189 /* --------------------------------------------------------------------
191 * -------------------------------------------------------------------- */
193 static struct at91_gpio_bank at91sam9261_gpio[] = {
195 .id = AT91SAM9261_ID_PIOA,
199 .id = AT91SAM9261_ID_PIOB,
203 .id = AT91SAM9261_ID_PIOC,
209 static void at91sam9261_reset(void)
211 at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
215 /* --------------------------------------------------------------------
216 * AT91SAM9261 processor initialization
217 * -------------------------------------------------------------------- */
219 void __init at91sam9261_initialize(unsigned long main_clock)
221 /* Map peripherals */
222 iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
224 at91_arch_reset = at91sam9261_reset;
225 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
226 | (1 << AT91SAM9261_ID_IRQ2);
228 /* Init clock subsystem */
229 at91_clock_init(main_clock);
231 /* Register the processor-specific clocks */
232 at91sam9261_register_clocks();
234 /* Register GPIO subsystem */
235 at91_gpio_init(at91sam9261_gpio, 3);
238 /* --------------------------------------------------------------------
239 * Interrupt initialization
240 * -------------------------------------------------------------------- */
243 * The default interrupt priority levels (0 = lowest, 7 = highest).
245 static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
246 7, /* Advanced Interrupt Controller */
247 7, /* System Peripherals */
248 0, /* Parallel IO Controller A */
249 0, /* Parallel IO Controller B */
250 0, /* Parallel IO Controller C */
255 0, /* Multimedia Card Interface */
256 4, /* USB Device Port */
257 0, /* Two-Wire Interface */
258 6, /* Serial Peripheral Interface 0 */
259 6, /* Serial Peripheral Interface 1 */
260 5, /* Serial Synchronous Controller 0 */
261 5, /* Serial Synchronous Controller 1 */
262 5, /* Serial Synchronous Controller 2 */
263 0, /* Timer Counter 0 */
264 0, /* Timer Counter 1 */
265 0, /* Timer Counter 2 */
266 3, /* USB Host port */
267 3, /* LCD Controller */
275 0, /* Advanced Interrupt Controller */
276 0, /* Advanced Interrupt Controller */
277 0, /* Advanced Interrupt Controller */
280 void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
283 priority = at91sam9261_default_irq_priority;
285 /* Initialize the AIC interrupt controller */
286 at91_aic_init(priority);
288 /* Enable GPIO interrupts */
289 at91_gpio_irq_setup();