2 * linux/arch/arm/mach-cintegrator/platsmp.c
4 * Copyright (C) 2002 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/errno.h>
17 #include <asm/atomic.h>
18 #include <asm/delay.h>
19 #include <asm/mmu_context.h>
20 #include <asm/procinfo.h>
21 #include <asm/ptrace.h>
24 extern void integrator_secondary_startup(void);
27 * control for which core is the next to come out of the secondary
30 volatile int __initdata pen_release = -1;
31 unsigned long __initdata phys_pen_release = 0;
33 static DEFINE_SPINLOCK(boot_lock);
35 void __cpuinit platform_secondary_init(unsigned int cpu)
38 * the primary core may have used a "cross call" soft interrupt
39 * to get this processor out of WFI in the BootMonitor - make
40 * sure that we are no longer being sent this soft interrupt
42 smp_cross_call_done(cpumask_of_cpu(cpu));
45 * if any interrupts are already enabled for the primary
46 * core (e.g. timer irq), then they will not have been enabled
49 secondary_scan_irqs();
52 * let the primary processor know we're out of the
53 * pen, then head off into the C entry point
58 * Synchronise with the boot thread.
60 spin_lock(&boot_lock);
61 spin_unlock(&boot_lock);
64 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
66 unsigned long timeout;
69 * set synchronisation state between this boot processor
70 * and the secondary one
72 spin_lock(&boot_lock);
75 * The secondary processor is waiting to be released from
76 * the holding pen - release it, then wait for it to flag
77 * that it has been released by resetting pen_release.
79 * Note that "pen_release" is the hardware CPU ID, whereas
80 * "cpu" is Linux's internal ID.
87 * This is a later addition to the booting protocol: the
88 * bootMonitor now puts secondary cores into WFI, so
89 * poke_milo() no longer gets the cores moving; we need
90 * to send a soft interrupt to wake the secondary core.
91 * Use smp_cross_call() for this, since there's little
92 * point duplicating the code here
94 smp_cross_call(cpumask_of_cpu(cpu));
96 timeout = jiffies + (1 * HZ);
97 while (time_before(jiffies, timeout)) {
98 if (pen_release == -1)
105 * now the secondary core is starting up let it run its
106 * calibrations, then wait for it to finish
108 spin_unlock(&boot_lock);
110 return pen_release != -1 ? -ENOSYS : 0;
113 static void __init poke_milo(void)
115 extern void secondary_startup(void);
117 /* nobody is to be released from the pen yet */
120 phys_pen_release = virt_to_phys(&pen_release);
123 * write the address of secondary startup into the system-wide
124 * flags register, then clear the bottom two bits, which is what
125 * BootMonitor is waiting for
128 #define CINTEGRATOR_HDR_FLAGSS_OFFSET 0x30
129 __raw_writel(virt_to_phys(integrator_secondary_startup),
130 (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
131 CINTEGRATOR_HDR_FLAGSS_OFFSET));
132 #define CINTEGRATOR_HDR_FLAGSC_OFFSET 0x34
134 (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
135 CINTEGRATOR_HDR_FLAGSC_OFFSET));
141 void __init smp_prepare_cpus(unsigned int max_cpus)
143 unsigned int ncores = get_core_count();
144 unsigned int cpu = smp_processor_id();
150 "Integrator/CP: strange CM count of 0? Default to 1\n");
155 if (ncores > NR_CPUS) {
157 "Integrator/CP: no. of cores (%d) greater than configured "
158 "maximum of %d - clipping\n",
164 * start with some more config for the Boot CPU, now that
165 * the world is a bit more alive (which was not the case
166 * when smp_prepare_boot_cpu() was called)
168 smp_store_cpu_info(cpu);
171 * are we trying to boot more cores than exist?
173 if (max_cpus > ncores)
177 * Initialise the possible/present maps.
178 * cpu_possible_map describes the set of CPUs which may be present
179 * cpu_present_map describes the set of CPUs populated
181 for (i = 0; i < max_cpus; i++) {
182 cpu_set(i, cpu_possible_map);
183 cpu_set(i, cpu_present_map);
187 * Do we need any more CPUs? If so, then let them know where
188 * to start. Note that, on modern versions of MILO, the "poke"
189 * doesn't actually do anything until each individual core is
190 * sent a soft interrupt to get it out of WFI