arch/arm/mach-pxa/lpd270.c

   1 /*
   2  * linux/arch/arm/mach-pxa/lpd270.c
   3  *
   4  * Support for the LogicPD PXA270 Card Engine.
   5  * Derived from the mainstone code, which carries these notices:
   6  *
   7  * Author:      Nicolas Pitre
   8  * Created:     Nov 05, 2002
   9  * Copyright:   MontaVista Software Inc.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/sched.h>
  21 #include <linux/bitops.h>
  22 #include <linux/fb.h>
  23 #include <linux/ioport.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/partitions.h>
  26 #include <linux/pwm_backlight.h>
  27
  28 #include <asm/types.h>
  29 #include <asm/setup.h>
  30 #include <asm/memory.h>
  31 #include <asm/mach-types.h>
  32 #include <mach/hardware.h>
  33 #include <asm/irq.h>
  34 #include <asm/sizes.h>
  35
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/map.h>
  38 #include <asm/mach/irq.h>
  39 #include <asm/mach/flash.h>
  40
  41 #include <mach/pxa-regs.h>
  42 #include <mach/pxa2xx-regs.h>
  43 #include <mach/mfp-pxa27x.h>
  44 #include <mach/lpd270.h>
  45 #include <mach/audio.h>
  46 #include <mach/pxafb.h>
  47 #include <mach/mmc.h>
  48 #include <mach/irda.h>
  49 #include <mach/ohci.h>
  50
  51 #include "generic.h"
  52 #include "devices.h"
  53
  54 static unsigned long lpd270_pin_config[] __initdata = {
  55         /* Chip Selects */
  56         GPIO15_nCS_1,   /* Mainboard Flash */
  57         GPIO78_nCS_2,   /* CPLD + Ethernet */
  58
  59         /* LCD - 16bpp Active TFT */
  60         GPIO58_LCD_LDD_0,
  61         GPIO59_LCD_LDD_1,
  62         GPIO60_LCD_LDD_2,
  63         GPIO61_LCD_LDD_3,
  64         GPIO62_LCD_LDD_4,
  65         GPIO63_LCD_LDD_5,
  66         GPIO64_LCD_LDD_6,
  67         GPIO65_LCD_LDD_7,
  68         GPIO66_LCD_LDD_8,
  69         GPIO67_LCD_LDD_9,
  70         GPIO68_LCD_LDD_10,
  71         GPIO69_LCD_LDD_11,
  72         GPIO70_LCD_LDD_12,
  73         GPIO71_LCD_LDD_13,
  74         GPIO72_LCD_LDD_14,
  75         GPIO73_LCD_LDD_15,
  76         GPIO74_LCD_FCLK,
  77         GPIO75_LCD_LCLK,
  78         GPIO76_LCD_PCLK,
  79         GPIO77_LCD_BIAS,
  80         GPIO16_PWM0_OUT,        /* Backlight */
  81
  82         /* USB Host */
  83         GPIO88_USBH1_PWR,
  84         GPIO89_USBH1_PEN,
  85
  86         /* AC97 */
  87         GPIO45_AC97_SYSCLK,
  88
  89         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  90 };
  91
  92 static unsigned int lpd270_irq_enabled;
  93
  94 static void lpd270_mask_irq(unsigned int irq)
  95 {
  96         int lpd270_irq = irq - LPD270_IRQ(0);
  97
  98         __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
  99
 100         lpd270_irq_enabled &= ~(1 << lpd270_irq);
 101         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 102 }
 103
 104 static void lpd270_unmask_irq(unsigned int irq)
 105 {
 106         int lpd270_irq = irq - LPD270_IRQ(0);
 107
 108         lpd270_irq_enabled |= 1 << lpd270_irq;
 109         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 110 }
 111
 112 static struct irq_chip lpd270_irq_chip = {
 113         .name           = "CPLD",
 114         .ack            = lpd270_mask_irq,
 115         .mask           = lpd270_mask_irq,
 116         .unmask         = lpd270_unmask_irq,
 117 };
 118
 119 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 120 {
 121         unsigned long pending;
 122
 123         pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
 124         do {
 125                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
 126                 if (likely(pending)) {
 127                         irq = LPD270_IRQ(0) + __ffs(pending);
 128                         desc = irq_desc + irq;
 129                         desc_handle_irq(irq, desc);
 130
 131                         pending = __raw_readw(LPD270_INT_STATUS) &
 132                                                 lpd270_irq_enabled;
 133                 }
 134         } while (pending);
 135 }
 136
 137 static void __init lpd270_init_irq(void)
 138 {
 139         int irq;
 140
 141         pxa27x_init_irq();
 142
 143         __raw_writew(0, LPD270_INT_MASK);
 144         __raw_writew(0, LPD270_INT_STATUS);
 145
 146         /* setup extra LogicPD PXA270 irqs */
 147         for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
 148                 set_irq_chip(irq, &lpd270_irq_chip);
 149                 set_irq_handler(irq, handle_level_irq);
 150                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 151         }
 152         set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
 153         set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 154 }
 155
 156
 157 #ifdef CONFIG_PM
 158 static int lpd270_irq_resume(struct sys_device *dev)
 159 {
 160         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 161         return 0;
 162 }
 163
 164 static struct sysdev_class lpd270_irq_sysclass = {
 165         .name = "cpld_irq",
 166         .resume = lpd270_irq_resume,
 167 };
 168
 169 static struct sys_device lpd270_irq_device = {
 170         .cls = &lpd270_irq_sysclass,
 171 };
 172
 173 static int __init lpd270_irq_device_init(void)
 174 {
 175         int ret = -ENODEV;
 176         if (machine_is_logicpd_pxa270()) {
 177                 ret = sysdev_class_register(&lpd270_irq_sysclass);
 178                 if (ret == 0)
 179                         ret = sysdev_register(&lpd270_irq_device);
 180         }
 181         return ret;
 182 }
 183
 184 device_initcall(lpd270_irq_device_init);
 185 #endif
 186
 187
 188 static struct resource smc91x_resources[] = {
 189         [0] = {
 190                 .start  = LPD270_ETH_PHYS,
 191                 .end    = (LPD270_ETH_PHYS + 0xfffff),
 192                 .flags  = IORESOURCE_MEM,
 193         },
 194         [1] = {
 195                 .start  = LPD270_ETHERNET_IRQ,
 196                 .end    = LPD270_ETHERNET_IRQ,
 197                 .flags  = IORESOURCE_IRQ,
 198         },
 199 };
 200
 201 static struct platform_device smc91x_device = {
 202         .name           = "smc91x",
 203         .id             = 0,
 204         .num_resources  = ARRAY_SIZE(smc91x_resources),
 205         .resource       = smc91x_resources,
 206 };
 207
 208 static struct resource lpd270_flash_resources[] = {
 209         [0] = {
 210                 .start  = PXA_CS0_PHYS,
 211                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
 212                 .flags  = IORESOURCE_MEM,
 213         },
 214         [1] = {
 215                 .start  = PXA_CS1_PHYS,
 216                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
 217                 .flags  = IORESOURCE_MEM,
 218         },
 219 };
 220
 221 static struct mtd_partition lpd270_flash0_partitions[] = {
 222         {
 223                 .name =         "Bootloader",
 224                 .size =         0x00040000,
 225                 .offset =       0,
 226                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
 227         }, {
 228                 .name =         "Kernel",
 229                 .size =         0x00400000,
 230                 .offset =       0x00040000,
 231         }, {
 232                 .name =         "Filesystem",
 233                 .size =         MTDPART_SIZ_FULL,
 234                 .offset =       0x00440000
 235         },
 236 };
 237
 238 static struct flash_platform_data lpd270_flash_data[2] = {
 239         {
 240                 .name           = "processor-flash",
 241                 .map_name       = "cfi_probe",
 242                 .parts          = lpd270_flash0_partitions,
 243                 .nr_parts       = ARRAY_SIZE(lpd270_flash0_partitions),
 244         }, {
 245                 .name           = "mainboard-flash",
 246                 .map_name       = "cfi_probe",
 247                 .parts          = NULL,
 248                 .nr_parts       = 0,
 249         }
 250 };
 251
 252 static struct platform_device lpd270_flash_device[2] = {
 253         {
 254                 .name           = "pxa2xx-flash",
 255                 .id             = 0,
 256                 .dev = {
 257                         .platform_data  = &lpd270_flash_data[0],
 258                 },
 259                 .resource       = &lpd270_flash_resources[0],
 260                 .num_resources  = 1,
 261         }, {
 262                 .name           = "pxa2xx-flash",
 263                 .id             = 1,
 264                 .dev = {
 265                         .platform_data  = &lpd270_flash_data[1],
 266                 },
 267                 .resource       = &lpd270_flash_resources[1],
 268                 .num_resources  = 1,
 269         },
 270 };
 271
 272 static struct platform_pwm_backlight_data lpd270_backlight_data = {
 273         .pwm_id         = 0,
 274         .max_brightness = 1,
 275         .dft_brightness = 1,
 276         .pwm_period_ns  = 78770,
 277 };
 278
 279 static struct platform_device lpd270_backlight_device = {
 280         .name           = "pwm-backlight",
 281         .dev            = {
 282                 .parent = &pxa27x_device_pwm0.dev,
 283                 .platform_data = &lpd270_backlight_data,
 284         },
 285 };
 286
 287 /* 5.7" TFT QVGA (LoLo display number 1) */
 288 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
 289         .pixclock               = 150000,
 290         .xres                   = 320,
 291         .yres                   = 240,
 292         .bpp                    = 16,
 293         .hsync_len              = 0x14,
 294         .left_margin            = 0x28,
 295         .right_margin           = 0x0a,
 296         .vsync_len              = 0x02,
 297         .upper_margin           = 0x08,
 298         .lower_margin           = 0x14,
 299         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 300 };
 301
 302 static struct pxafb_mach_info sharp_lq057q3dc02 = {
 303         .modes                  = &sharp_lq057q3dc02_mode,
 304         .num_modes              = 1,
 305         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 306                                   LCD_ALTERNATE_MAPPING,
 307 };
 308
 309 /* 12.1" TFT SVGA (LoLo display number 2) */
 310 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
 311         .pixclock               = 50000,
 312         .xres                   = 800,
 313         .yres                   = 600,
 314         .bpp                    = 16,
 315         .hsync_len              = 0x05,
 316         .left_margin            = 0x52,
 317         .right_margin           = 0x05,
 318         .vsync_len              = 0x04,
 319         .upper_margin           = 0x14,
 320         .lower_margin           = 0x0a,
 321         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 322 };
 323
 324 static struct pxafb_mach_info sharp_lq121s1dg31 = {
 325         .modes                  = &sharp_lq121s1dg31_mode,
 326         .num_modes              = 1,
 327         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 328                                   LCD_ALTERNATE_MAPPING,
 329 };
 330
 331 /* 3.6" TFT QVGA (LoLo display number 3) */
 332 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
 333         .pixclock               = 150000,
 334         .xres                   = 320,
 335         .yres                   = 240,
 336         .bpp                    = 16,
 337         .hsync_len              = 0x0e,
 338         .left_margin            = 0x04,
 339         .right_margin           = 0x0a,
 340         .vsync_len              = 0x03,
 341         .upper_margin           = 0x03,
 342         .lower_margin           = 0x03,
 343         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 344 };
 345
 346 static struct pxafb_mach_info sharp_lq036q1da01 = {
 347         .modes                  = &sharp_lq036q1da01_mode,
 348         .num_modes              = 1,
 349         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 350                                   LCD_ALTERNATE_MAPPING,
 351 };
 352
 353 /* 6.4" TFT VGA (LoLo display number 5) */
 354 static struct pxafb_mode_info sharp_lq64d343_mode = {
 355         .pixclock               = 25000,
 356         .xres                   = 640,
 357         .yres                   = 480,
 358         .bpp                    = 16,
 359         .hsync_len              = 0x31,
 360         .left_margin            = 0x89,
 361         .right_margin           = 0x19,
 362         .vsync_len              = 0x12,
 363         .upper_margin           = 0x22,
 364         .lower_margin           = 0x00,
 365         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 366 };
 367
 368 static struct pxafb_mach_info sharp_lq64d343 = {
 369         .modes                  = &sharp_lq64d343_mode,
 370         .num_modes              = 1,
 371         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 372                                   LCD_ALTERNATE_MAPPING,
 373 };
 374
 375 /* 10.4" TFT VGA (LoLo display number 7) */
 376 static struct pxafb_mode_info sharp_lq10d368_mode = {
 377         .pixclock               = 25000,
 378         .xres                   = 640,
 379         .yres                   = 480,
 380         .bpp                    = 16,
 381         .hsync_len              = 0x31,
 382         .left_margin            = 0x89,
 383         .right_margin           = 0x19,
 384         .vsync_len              = 0x12,
 385         .upper_margin           = 0x22,
 386         .lower_margin           = 0x00,
 387         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 388 };
 389
 390 static struct pxafb_mach_info sharp_lq10d368 = {
 391         .modes                  = &sharp_lq10d368_mode,
 392         .num_modes              = 1,
 393         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 394                                   LCD_ALTERNATE_MAPPING,
 395 };
 396
 397 /* 3.5" TFT QVGA (LoLo display number 8) */
 398 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
 399         .pixclock               = 150000,
 400         .xres                   = 240,
 401         .yres                   = 320,
 402         .bpp                    = 16,
 403         .hsync_len              = 0x0e,
 404         .left_margin            = 0x0a,
 405         .right_margin           = 0x0a,
 406         .vsync_len              = 0x03,
 407         .upper_margin           = 0x05,
 408         .lower_margin           = 0x14,
 409         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 410 };
 411
 412 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
 413         .modes                  = &sharp_lq035q7db02_20_mode,
 414         .num_modes              = 1,
 415         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 416                                   LCD_ALTERNATE_MAPPING,
 417 };
 418
 419 static struct pxafb_mach_info *lpd270_lcd_to_use;
 420
 421 static int __init lpd270_set_lcd(char *str)
 422 {
 423         if (!strnicmp(str, "lq057q3dc02", 11)) {
 424                 lpd270_lcd_to_use = &sharp_lq057q3dc02;
 425         } else if (!strnicmp(str, "lq121s1dg31", 11)) {
 426                 lpd270_lcd_to_use = &sharp_lq121s1dg31;
 427         } else if (!strnicmp(str, "lq036q1da01", 11)) {
 428                 lpd270_lcd_to_use = &sharp_lq036q1da01;
 429         } else if (!strnicmp(str, "lq64d343", 8)) {
 430                 lpd270_lcd_to_use = &sharp_lq64d343;
 431         } else if (!strnicmp(str, "lq10d368", 8)) {
 432                 lpd270_lcd_to_use = &sharp_lq10d368;
 433         } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
 434                 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
 435         } else {
 436                 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
 437         }
 438
 439         return 1;
 440 }
 441
 442 __setup("lcd=", lpd270_set_lcd);
 443
 444 static struct platform_device *platform_devices[] __initdata = {
 445         &smc91x_device,
 446         &lpd270_backlight_device,
 447         &lpd270_flash_device[0],
 448         &lpd270_flash_device[1],
 449 };
 450
 451 static int lpd270_ohci_init(struct device *dev)
 452 {
 453         /* Set the Power Control Polarity Low and Power Sense
 454            Polarity Low to active low. */
 455         UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
 456                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
 457
 458         return 0;
 459 }
 460
 461 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
 462         .port_mode      = PMM_PERPORT_MODE,
 463         .init           = lpd270_ohci_init,
 464 };
 465
 466 static void __init lpd270_init(void)
 467 {
 468         pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
 469
 470         lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
 471         lpd270_flash_data[1].width = 4;
 472
 473         /*
 474          * System bus arbiter setting:
 475          * - Core_Park
 476          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
 477          */
 478         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 479
 480         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 481
 482         pxa_set_ac97_info(NULL);
 483
 484         if (lpd270_lcd_to_use != NULL)
 485                 set_pxa_fb_info(lpd270_lcd_to_use);
 486
 487         pxa_set_ohci_info(&lpd270_ohci_platform_data);
 488 }
 489
 490
 491 static struct map_desc lpd270_io_desc[] __initdata = {
 492         {
 493                 .virtual        = LPD270_CPLD_VIRT,
 494                 .pfn            = __phys_to_pfn(LPD270_CPLD_PHYS),
 495                 .length         = LPD270_CPLD_SIZE,
 496                 .type           = MT_DEVICE,
 497         },
 498 };
 499
 500 static void __init lpd270_map_io(void)
 501 {
 502         pxa_map_io();
 503         iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
 504
 505         /* for use I SRAM as framebuffer.  */
 506         PSLR |= 0x00000F04;
 507         PCFR  = 0x00000066;
 508 }
 509
 510 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
 511         /* Maintainer: Peter Barada */
 512         .phys_io        = 0x40000000,
 513         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 514         .boot_params    = 0xa0000100,
 515         .map_io         = lpd270_map_io,
 516         .init_irq       = lpd270_init_irq,
 517         .timer          = &pxa_timer,
 518         .init_machine   = lpd270_init,
 519 MACHINE_END