2 * linux/arch/arm/mach-pxa/lpd270.c
4 * Support for the LogicPD PXA270 Card Engine.
5 * Derived from the mainstone code, which carries these notices:
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/pwm_backlight.h>
28 #include <asm/types.h>
29 #include <asm/setup.h>
30 #include <asm/memory.h>
31 #include <asm/mach-types.h>
32 #include <mach/hardware.h>
34 #include <asm/sizes.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/flash.h>
41 #include <mach/pxa27x.h>
42 #include <mach/lpd270.h>
43 #include <mach/audio.h>
44 #include <mach/pxafb.h>
46 #include <mach/irda.h>
47 #include <mach/ohci.h>
52 static unsigned long lpd270_pin_config[] __initdata = {
54 GPIO15_nCS_1, /* Mainboard Flash */
55 GPIO78_nCS_2, /* CPLD + Ethernet */
57 /* LCD - 16bpp Active TFT */
78 GPIO16_PWM0_OUT, /* Backlight */
87 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
90 static unsigned int lpd270_irq_enabled;
92 static void lpd270_mask_irq(unsigned int irq)
94 int lpd270_irq = irq - LPD270_IRQ(0);
96 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
98 lpd270_irq_enabled &= ~(1 << lpd270_irq);
99 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
102 static void lpd270_unmask_irq(unsigned int irq)
104 int lpd270_irq = irq - LPD270_IRQ(0);
106 lpd270_irq_enabled |= 1 << lpd270_irq;
107 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
110 static struct irq_chip lpd270_irq_chip = {
112 .ack = lpd270_mask_irq,
113 .mask = lpd270_mask_irq,
114 .unmask = lpd270_unmask_irq,
117 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
119 unsigned long pending;
121 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
123 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
124 if (likely(pending)) {
125 irq = LPD270_IRQ(0) + __ffs(pending);
126 generic_handle_irq(irq);
128 pending = __raw_readw(LPD270_INT_STATUS) &
134 static void __init lpd270_init_irq(void)
140 __raw_writew(0, LPD270_INT_MASK);
141 __raw_writew(0, LPD270_INT_STATUS);
143 /* setup extra LogicPD PXA270 irqs */
144 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
145 set_irq_chip(irq, &lpd270_irq_chip);
146 set_irq_handler(irq, handle_level_irq);
147 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
149 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
150 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
155 static int lpd270_irq_resume(struct sys_device *dev)
157 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
161 static struct sysdev_class lpd270_irq_sysclass = {
163 .resume = lpd270_irq_resume,
166 static struct sys_device lpd270_irq_device = {
167 .cls = &lpd270_irq_sysclass,
170 static int __init lpd270_irq_device_init(void)
173 if (machine_is_logicpd_pxa270()) {
174 ret = sysdev_class_register(&lpd270_irq_sysclass);
176 ret = sysdev_register(&lpd270_irq_device);
181 device_initcall(lpd270_irq_device_init);
185 static struct resource smc91x_resources[] = {
187 .start = LPD270_ETH_PHYS,
188 .end = (LPD270_ETH_PHYS + 0xfffff),
189 .flags = IORESOURCE_MEM,
192 .start = LPD270_ETHERNET_IRQ,
193 .end = LPD270_ETHERNET_IRQ,
194 .flags = IORESOURCE_IRQ,
198 static struct platform_device smc91x_device = {
201 .num_resources = ARRAY_SIZE(smc91x_resources),
202 .resource = smc91x_resources,
205 static struct resource lpd270_flash_resources[] = {
207 .start = PXA_CS0_PHYS,
208 .end = PXA_CS0_PHYS + SZ_64M - 1,
209 .flags = IORESOURCE_MEM,
212 .start = PXA_CS1_PHYS,
213 .end = PXA_CS1_PHYS + SZ_64M - 1,
214 .flags = IORESOURCE_MEM,
218 static struct mtd_partition lpd270_flash0_partitions[] = {
220 .name = "Bootloader",
223 .mask_flags = MTD_WRITEABLE /* force read-only */
227 .offset = 0x00040000,
229 .name = "Filesystem",
230 .size = MTDPART_SIZ_FULL,
235 static struct flash_platform_data lpd270_flash_data[2] = {
237 .name = "processor-flash",
238 .map_name = "cfi_probe",
239 .parts = lpd270_flash0_partitions,
240 .nr_parts = ARRAY_SIZE(lpd270_flash0_partitions),
242 .name = "mainboard-flash",
243 .map_name = "cfi_probe",
249 static struct platform_device lpd270_flash_device[2] = {
251 .name = "pxa2xx-flash",
254 .platform_data = &lpd270_flash_data[0],
256 .resource = &lpd270_flash_resources[0],
259 .name = "pxa2xx-flash",
262 .platform_data = &lpd270_flash_data[1],
264 .resource = &lpd270_flash_resources[1],
269 static struct platform_pwm_backlight_data lpd270_backlight_data = {
273 .pwm_period_ns = 78770,
276 static struct platform_device lpd270_backlight_device = {
277 .name = "pwm-backlight",
279 .parent = &pxa27x_device_pwm0.dev,
280 .platform_data = &lpd270_backlight_data,
284 /* 5.7" TFT QVGA (LoLo display number 1) */
285 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
292 .right_margin = 0x0a,
294 .upper_margin = 0x08,
295 .lower_margin = 0x14,
296 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
299 static struct pxafb_mach_info sharp_lq057q3dc02 = {
300 .modes = &sharp_lq057q3dc02_mode,
302 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
303 LCD_ALTERNATE_MAPPING,
306 /* 12.1" TFT SVGA (LoLo display number 2) */
307 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
314 .right_margin = 0x05,
316 .upper_margin = 0x14,
317 .lower_margin = 0x0a,
318 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
321 static struct pxafb_mach_info sharp_lq121s1dg31 = {
322 .modes = &sharp_lq121s1dg31_mode,
324 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
325 LCD_ALTERNATE_MAPPING,
328 /* 3.6" TFT QVGA (LoLo display number 3) */
329 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
336 .right_margin = 0x0a,
338 .upper_margin = 0x03,
339 .lower_margin = 0x03,
340 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
343 static struct pxafb_mach_info sharp_lq036q1da01 = {
344 .modes = &sharp_lq036q1da01_mode,
346 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
347 LCD_ALTERNATE_MAPPING,
350 /* 6.4" TFT VGA (LoLo display number 5) */
351 static struct pxafb_mode_info sharp_lq64d343_mode = {
358 .right_margin = 0x19,
360 .upper_margin = 0x22,
361 .lower_margin = 0x00,
362 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
365 static struct pxafb_mach_info sharp_lq64d343 = {
366 .modes = &sharp_lq64d343_mode,
368 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
369 LCD_ALTERNATE_MAPPING,
372 /* 10.4" TFT VGA (LoLo display number 7) */
373 static struct pxafb_mode_info sharp_lq10d368_mode = {
380 .right_margin = 0x19,
382 .upper_margin = 0x22,
383 .lower_margin = 0x00,
384 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
387 static struct pxafb_mach_info sharp_lq10d368 = {
388 .modes = &sharp_lq10d368_mode,
390 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
391 LCD_ALTERNATE_MAPPING,
394 /* 3.5" TFT QVGA (LoLo display number 8) */
395 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
402 .right_margin = 0x0a,
404 .upper_margin = 0x05,
405 .lower_margin = 0x14,
406 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
409 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
410 .modes = &sharp_lq035q7db02_20_mode,
412 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
413 LCD_ALTERNATE_MAPPING,
416 static struct pxafb_mach_info *lpd270_lcd_to_use;
418 static int __init lpd270_set_lcd(char *str)
420 if (!strnicmp(str, "lq057q3dc02", 11)) {
421 lpd270_lcd_to_use = &sharp_lq057q3dc02;
422 } else if (!strnicmp(str, "lq121s1dg31", 11)) {
423 lpd270_lcd_to_use = &sharp_lq121s1dg31;
424 } else if (!strnicmp(str, "lq036q1da01", 11)) {
425 lpd270_lcd_to_use = &sharp_lq036q1da01;
426 } else if (!strnicmp(str, "lq64d343", 8)) {
427 lpd270_lcd_to_use = &sharp_lq64d343;
428 } else if (!strnicmp(str, "lq10d368", 8)) {
429 lpd270_lcd_to_use = &sharp_lq10d368;
430 } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
431 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
433 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
439 __setup("lcd=", lpd270_set_lcd);
441 static struct platform_device *platform_devices[] __initdata = {
443 &lpd270_backlight_device,
444 &lpd270_flash_device[0],
445 &lpd270_flash_device[1],
448 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
449 .port_mode = PMM_PERPORT_MODE,
450 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
453 static void __init lpd270_init(void)
455 pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
457 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
458 lpd270_flash_data[1].width = 4;
461 * System bus arbiter setting:
463 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
465 ARB_CNTRL = ARB_CORE_PARK | 0x234;
467 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
469 pxa_set_ac97_info(NULL);
471 if (lpd270_lcd_to_use != NULL)
472 set_pxa_fb_info(lpd270_lcd_to_use);
474 pxa_set_ohci_info(&lpd270_ohci_platform_data);
478 static struct map_desc lpd270_io_desc[] __initdata = {
480 .virtual = LPD270_CPLD_VIRT,
481 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
482 .length = LPD270_CPLD_SIZE,
487 static void __init lpd270_map_io(void)
490 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
492 /* for use I SRAM as framebuffer. */
497 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
498 /* Maintainer: Peter Barada */
499 .phys_io = 0x40000000,
500 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
501 .boot_params = 0xa0000100,
502 .map_io = lpd270_map_io,
503 .init_irq = lpd270_init_irq,
505 .init_machine = lpd270_init,