arch/arm/plat-omap/mcbsp.c

   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/wait.h>
  20 #include <linux/completion.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/err.h>
  23 #include <linux/clk.h>
  24 #include <linux/delay.h>
  25 #include <linux/io.h>
  26
  27 #include <mach/dma.h>
  28 #include <mach/mcbsp.h>
  29
  30 struct omap_mcbsp **mcbsp_ptr;
  31 int omap_mcbsp_count;
  32
  33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
  34 {
  35         if (cpu_class_is_omap1() || cpu_is_omap2420())
  36                 __raw_writew((u16)val, io_base + reg);
  37         else
  38                 __raw_writel(val, io_base + reg);
  39 }
  40
  41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
  42 {
  43         if (cpu_class_is_omap1() || cpu_is_omap2420())
  44                 return __raw_readw(io_base + reg);
  45         else
  46                 return __raw_readl(io_base + reg);
  47 }
  48
  49 #define OMAP_MCBSP_READ(base, reg) \
  50                         omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
  51 #define OMAP_MCBSP_WRITE(base, reg, val) \
  52                         omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
  53
  54 #define omap_mcbsp_check_valid_id(id)   (id < omap_mcbsp_count)
  55 #define id_to_mcbsp_ptr(id)             mcbsp_ptr[id];
  56
  57 static void omap_mcbsp_dump_reg(u8 id)
  58 {
  59         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
  60
  61         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
  62         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
  63                         OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
  64         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
  65                         OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
  66         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
  67                         OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
  68         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
  69                         OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
  70         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
  71                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
  72         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
  73                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
  74         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
  75                         OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
  76         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
  77                         OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
  78         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
  79                         OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
  80         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
  81                         OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
  82         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
  83                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
  84         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
  85                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
  86         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
  87                         OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
  88         dev_dbg(mcbsp->dev, "***********************\n");
  89 }
  90
  91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
  92 {
  93         struct omap_mcbsp *mcbsp_tx = dev_id;
  94
  95         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
  96                 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
  97
  98         complete(&mcbsp_tx->tx_irq_completion);
  99
 100         return IRQ_HANDLED;
 101 }
 102
 103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 104 {
 105         struct omap_mcbsp *mcbsp_rx = dev_id;
 106
 107         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
 108                 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
 109
 110         complete(&mcbsp_rx->rx_irq_completion);
 111
 112         return IRQ_HANDLED;
 113 }
 114
 115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 116 {
 117         struct omap_mcbsp *mcbsp_dma_tx = data;
 118
 119         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
 120                 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
 121
 122         /* We can free the channels */
 123         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
 124         mcbsp_dma_tx->dma_tx_lch = -1;
 125
 126         complete(&mcbsp_dma_tx->tx_dma_completion);
 127 }
 128
 129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
 130 {
 131         struct omap_mcbsp *mcbsp_dma_rx = data;
 132
 133         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
 134                 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
 135
 136         /* We can free the channels */
 137         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
 138         mcbsp_dma_rx->dma_rx_lch = -1;
 139
 140         complete(&mcbsp_dma_rx->rx_dma_completion);
 141 }
 142
 143 /*
 144  * omap_mcbsp_config simply write a config to the
 145  * appropriate McBSP.
 146  * You either call this function or set the McBSP registers
 147  * by yourself before calling omap_mcbsp_start().
 148  */
 149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 150 {
 151         struct omap_mcbsp *mcbsp;
 152         void __iomem *io_base;
 153
 154         if (!omap_mcbsp_check_valid_id(id)) {
 155                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 156                 return;
 157         }
 158         mcbsp = id_to_mcbsp_ptr(id);
 159
 160         io_base = mcbsp->io_base;
 161         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
 162                         mcbsp->id, mcbsp->phys_base);
 163
 164         /* We write the given config */
 165         OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
 166         OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
 167         OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
 168         OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
 169         OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
 170         OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
 171         OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
 172         OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
 173         OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
 174         OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
 175         OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
 176 }
 177 EXPORT_SYMBOL(omap_mcbsp_config);
 178
 179 /*
 180  * We can choose between IRQ based or polled IO.
 181  * This needs to be called before omap_mcbsp_request().
 182  */
 183 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
 184 {
 185         struct omap_mcbsp *mcbsp;
 186
 187         if (!omap_mcbsp_check_valid_id(id)) {
 188                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 189                 return -ENODEV;
 190         }
 191         mcbsp = id_to_mcbsp_ptr(id);
 192
 193         spin_lock(&mcbsp->lock);
 194
 195         if (!mcbsp->free) {
 196                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 197                         mcbsp->id);
 198                 spin_unlock(&mcbsp->lock);
 199                 return -EINVAL;
 200         }
 201
 202         mcbsp->io_type = io_type;
 203
 204         spin_unlock(&mcbsp->lock);
 205
 206         return 0;
 207 }
 208 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
 209
 210 int omap_mcbsp_request(unsigned int id)
 211 {
 212         struct omap_mcbsp *mcbsp;
 213         int err;
 214
 215         if (!omap_mcbsp_check_valid_id(id)) {
 216                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 217                 return -ENODEV;
 218         }
 219         mcbsp = id_to_mcbsp_ptr(id);
 220
 221         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 222                 mcbsp->pdata->ops->request(id);
 223
 224         clk_enable(mcbsp->clk);
 225
 226         spin_lock(&mcbsp->lock);
 227         if (!mcbsp->free) {
 228                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 229                         mcbsp->id);
 230                 spin_unlock(&mcbsp->lock);
 231                 return -1;
 232         }
 233
 234         mcbsp->free = 0;
 235         spin_unlock(&mcbsp->lock);
 236
 237         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 238                 /* We need to get IRQs here */
 239                 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
 240                                         0, "McBSP", (void *)mcbsp);
 241                 if (err != 0) {
 242                         dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
 243                                         "for McBSP%d\n", mcbsp->tx_irq,
 244                                         mcbsp->id);
 245                         return err;
 246                 }
 247
 248                 init_completion(&mcbsp->tx_irq_completion);
 249
 250                 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
 251                                         0, "McBSP", (void *)mcbsp);
 252                 if (err != 0) {
 253                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
 254                                         "for McBSP%d\n", mcbsp->rx_irq,
 255                                         mcbsp->id);
 256                         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 257                         return err;
 258                 }
 259
 260                 init_completion(&mcbsp->rx_irq_completion);
 261         }
 262
 263         return 0;
 264 }
 265 EXPORT_SYMBOL(omap_mcbsp_request);
 266
 267 void omap_mcbsp_free(unsigned int id)
 268 {
 269         struct omap_mcbsp *mcbsp;
 270
 271         if (!omap_mcbsp_check_valid_id(id)) {
 272                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 273                 return;
 274         }
 275         mcbsp = id_to_mcbsp_ptr(id);
 276
 277         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 278                 mcbsp->pdata->ops->free(id);
 279
 280         clk_disable(mcbsp->clk);
 281
 282         spin_lock(&mcbsp->lock);
 283         if (mcbsp->free) {
 284                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
 285                         mcbsp->id);
 286                 spin_unlock(&mcbsp->lock);
 287                 return;
 288         }
 289
 290         mcbsp->free = 1;
 291         spin_unlock(&mcbsp->lock);
 292
 293         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 294                 /* Free IRQs */
 295                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
 296                 free_irq(mcbsp->tx_irq, (void *)mcbsp);
 297         }
 298 }
 299 EXPORT_SYMBOL(omap_mcbsp_free);
 300
 301 /*
 302  * Here we start the McBSP, by enabling the sample
 303  * generator, both transmitter and receivers,
 304  * and the frame sync.
 305  */
 306 void omap_mcbsp_start(unsigned int id)
 307 {
 308         struct omap_mcbsp *mcbsp;
 309         void __iomem *io_base;
 310         u16 w;
 311
 312         if (!omap_mcbsp_check_valid_id(id)) {
 313                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 314                 return;
 315         }
 316         mcbsp = id_to_mcbsp_ptr(id);
 317         io_base = mcbsp->io_base;
 318
 319         mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
 320         mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
 321
 322         /* Start the sample generator */
 323         w = OMAP_MCBSP_READ(io_base, SPCR2);
 324         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
 325
 326         /* Enable transmitter and receiver */
 327         w = OMAP_MCBSP_READ(io_base, SPCR2);
 328         OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
 329
 330         w = OMAP_MCBSP_READ(io_base, SPCR1);
 331         OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
 332
 333         udelay(100);
 334
 335         /* Start frame sync */
 336         w = OMAP_MCBSP_READ(io_base, SPCR2);
 337         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
 338
 339         /* Dump McBSP Regs */
 340         omap_mcbsp_dump_reg(id);
 341 }
 342 EXPORT_SYMBOL(omap_mcbsp_start);
 343
 344 void omap_mcbsp_stop(unsigned int id)
 345 {
 346         struct omap_mcbsp *mcbsp;
 347         void __iomem *io_base;
 348         u16 w;
 349
 350         if (!omap_mcbsp_check_valid_id(id)) {
 351                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 352                 return;
 353         }
 354
 355         mcbsp = id_to_mcbsp_ptr(id);
 356         io_base = mcbsp->io_base;
 357
 358         /* Reset transmitter */
 359         w = OMAP_MCBSP_READ(io_base, SPCR2);
 360         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
 361
 362         /* Reset receiver */
 363         w = OMAP_MCBSP_READ(io_base, SPCR1);
 364         OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
 365
 366         /* Reset the sample rate generator */
 367         w = OMAP_MCBSP_READ(io_base, SPCR2);
 368         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
 369 }
 370 EXPORT_SYMBOL(omap_mcbsp_stop);
 371
 372 /* polled mcbsp i/o operations */
 373 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
 374 {
 375         struct omap_mcbsp *mcbsp;
 376         void __iomem *base;
 377
 378         if (!omap_mcbsp_check_valid_id(id)) {
 379                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 380                 return -ENODEV;
 381         }
 382
 383         mcbsp = id_to_mcbsp_ptr(id);
 384         base = mcbsp->io_base;
 385
 386         writew(buf, base + OMAP_MCBSP_REG_DXR1);
 387         /* if frame sync error - clear the error */
 388         if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
 389                 /* clear error */
 390                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
 391                        base + OMAP_MCBSP_REG_SPCR2);
 392                 /* resend */
 393                 return -1;
 394         } else {
 395                 /* wait for transmit confirmation */
 396                 int attemps = 0;
 397                 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
 398                         if (attemps++ > 1000) {
 399                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
 400                                        (~XRST),
 401                                        base + OMAP_MCBSP_REG_SPCR2);
 402                                 udelay(10);
 403                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
 404                                        (XRST),
 405                                        base + OMAP_MCBSP_REG_SPCR2);
 406                                 udelay(10);
 407                                 dev_err(mcbsp->dev, "Could not write to"
 408                                         " McBSP%d Register\n", mcbsp->id);
 409                                 return -2;
 410                         }
 411                 }
 412         }
 413
 414         return 0;
 415 }
 416 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
 417
 418 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
 419 {
 420         struct omap_mcbsp *mcbsp;
 421         void __iomem *base;
 422
 423         if (!omap_mcbsp_check_valid_id(id)) {
 424                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 425                 return -ENODEV;
 426         }
 427         mcbsp = id_to_mcbsp_ptr(id);
 428
 429         base = mcbsp->io_base;
 430         /* if frame sync error - clear the error */
 431         if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
 432                 /* clear error */
 433                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
 434                        base + OMAP_MCBSP_REG_SPCR1);
 435                 /* resend */
 436                 return -1;
 437         } else {
 438                 /* wait for recieve confirmation */
 439                 int attemps = 0;
 440                 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
 441                         if (attemps++ > 1000) {
 442                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
 443                                        (~RRST),
 444                                        base + OMAP_MCBSP_REG_SPCR1);
 445                                 udelay(10);
 446                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
 447                                        (RRST),
 448                                        base + OMAP_MCBSP_REG_SPCR1);
 449                                 udelay(10);
 450                                 dev_err(mcbsp->dev, "Could not read from"
 451                                         " McBSP%d Register\n", mcbsp->id);
 452                                 return -2;
 453                         }
 454                 }
 455         }
 456         *buf = readw(base + OMAP_MCBSP_REG_DRR1);
 457
 458         return 0;
 459 }
 460 EXPORT_SYMBOL(omap_mcbsp_pollread);
 461
 462 /*
 463  * IRQ based word transmission.
 464  */
 465 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
 466 {
 467         struct omap_mcbsp *mcbsp;
 468         void __iomem *io_base;
 469         omap_mcbsp_word_length word_length;
 470
 471         if (!omap_mcbsp_check_valid_id(id)) {
 472                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 473                 return;
 474         }
 475
 476         mcbsp = id_to_mcbsp_ptr(id);
 477         io_base = mcbsp->io_base;
 478         word_length = mcbsp->tx_word_length;
 479
 480         wait_for_completion(&mcbsp->tx_irq_completion);
 481
 482         if (word_length > OMAP_MCBSP_WORD_16)
 483                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 484         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 485 }
 486 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
 487
 488 u32 omap_mcbsp_recv_word(unsigned int id)
 489 {
 490         struct omap_mcbsp *mcbsp;
 491         void __iomem *io_base;
 492         u16 word_lsb, word_msb = 0;
 493         omap_mcbsp_word_length word_length;
 494
 495         if (!omap_mcbsp_check_valid_id(id)) {
 496                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 497                 return -ENODEV;
 498         }
 499         mcbsp = id_to_mcbsp_ptr(id);
 500
 501         word_length = mcbsp->rx_word_length;
 502         io_base = mcbsp->io_base;
 503
 504         wait_for_completion(&mcbsp->rx_irq_completion);
 505
 506         if (word_length > OMAP_MCBSP_WORD_16)
 507                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 508         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 509
 510         return (word_lsb | (word_msb << 16));
 511 }
 512 EXPORT_SYMBOL(omap_mcbsp_recv_word);
 513
 514 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
 515 {
 516         struct omap_mcbsp *mcbsp;
 517         void __iomem *io_base;
 518         omap_mcbsp_word_length tx_word_length;
 519         omap_mcbsp_word_length rx_word_length;
 520         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 521
 522         if (!omap_mcbsp_check_valid_id(id)) {
 523                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 524                 return -ENODEV;
 525         }
 526         mcbsp = id_to_mcbsp_ptr(id);
 527         io_base = mcbsp->io_base;
 528         tx_word_length = mcbsp->tx_word_length;
 529         rx_word_length = mcbsp->rx_word_length;
 530
 531         if (tx_word_length != rx_word_length)
 532                 return -EINVAL;
 533
 534         /* First we wait for the transmitter to be ready */
 535         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 536         while (!(spcr2 & XRDY)) {
 537                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 538                 if (attempts++ > 1000) {
 539                         /* We must reset the transmitter */
 540                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 541                         udelay(10);
 542                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 543                         udelay(10);
 544                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 545                                 "ready\n", mcbsp->id);
 546                         return -EAGAIN;
 547                 }
 548         }
 549
 550         /* Now we can push the data */
 551         if (tx_word_length > OMAP_MCBSP_WORD_16)
 552                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 553         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 554
 555         /* We wait for the receiver to be ready */
 556         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 557         while (!(spcr1 & RRDY)) {
 558                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 559                 if (attempts++ > 1000) {
 560                         /* We must reset the receiver */
 561                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 562                         udelay(10);
 563                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 564                         udelay(10);
 565                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 566                                 "ready\n", mcbsp->id);
 567                         return -EAGAIN;
 568                 }
 569         }
 570
 571         /* Receiver is ready, let's read the dummy data */
 572         if (rx_word_length > OMAP_MCBSP_WORD_16)
 573                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 574         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 575
 576         return 0;
 577 }
 578 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
 579
 580 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
 581 {
 582         struct omap_mcbsp *mcbsp;
 583         u32 clock_word = 0;
 584         void __iomem *io_base;
 585         omap_mcbsp_word_length tx_word_length;
 586         omap_mcbsp_word_length rx_word_length;
 587         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 588
 589         if (!omap_mcbsp_check_valid_id(id)) {
 590                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 591                 return -ENODEV;
 592         }
 593
 594         mcbsp = id_to_mcbsp_ptr(id);
 595         io_base = mcbsp->io_base;
 596
 597         tx_word_length = mcbsp->tx_word_length;
 598         rx_word_length = mcbsp->rx_word_length;
 599
 600         if (tx_word_length != rx_word_length)
 601                 return -EINVAL;
 602
 603         /* First we wait for the transmitter to be ready */
 604         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 605         while (!(spcr2 & XRDY)) {
 606                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 607                 if (attempts++ > 1000) {
 608                         /* We must reset the transmitter */
 609                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 610                         udelay(10);
 611                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 612                         udelay(10);
 613                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 614                                 "ready\n", mcbsp->id);
 615                         return -EAGAIN;
 616                 }
 617         }
 618
 619         /* We first need to enable the bus clock */
 620         if (tx_word_length > OMAP_MCBSP_WORD_16)
 621                 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
 622         OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
 623
 624         /* We wait for the receiver to be ready */
 625         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 626         while (!(spcr1 & RRDY)) {
 627                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 628                 if (attempts++ > 1000) {
 629                         /* We must reset the receiver */
 630                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 631                         udelay(10);
 632                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 633                         udelay(10);
 634                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 635                                 "ready\n", mcbsp->id);
 636                         return -EAGAIN;
 637                 }
 638         }
 639
 640         /* Receiver is ready, there is something for us */
 641         if (rx_word_length > OMAP_MCBSP_WORD_16)
 642                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 643         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 644
 645         word[0] = (word_lsb | (word_msb << 16));
 646
 647         return 0;
 648 }
 649 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
 650
 651 /*
 652  * Simple DMA based buffer rx/tx routines.
 653  * Nothing fancy, just a single buffer tx/rx through DMA.
 654  * The DMA resources are released once the transfer is done.
 655  * For anything fancier, you should use your own customized DMA
 656  * routines and callbacks.
 657  */
 658 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
 659                                 unsigned int length)
 660 {
 661         struct omap_mcbsp *mcbsp;
 662         int dma_tx_ch;
 663         int src_port = 0;
 664         int dest_port = 0;
 665         int sync_dev = 0;
 666
 667         if (!omap_mcbsp_check_valid_id(id)) {
 668                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 669                 return -ENODEV;
 670         }
 671         mcbsp = id_to_mcbsp_ptr(id);
 672
 673         if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
 674                                 omap_mcbsp_tx_dma_callback,
 675                                 mcbsp,
 676                                 &dma_tx_ch)) {
 677                 dev_err(mcbsp->dev, " Unable to request DMA channel for "
 678                                 "McBSP%d TX. Trying IRQ based TX\n",
 679                                 mcbsp->id);
 680                 return -EAGAIN;
 681         }
 682         mcbsp->dma_tx_lch = dma_tx_ch;
 683
 684         dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
 685                 dma_tx_ch);
 686
 687         init_completion(&mcbsp->tx_dma_completion);
 688
 689         if (cpu_class_is_omap1()) {
 690                 src_port = OMAP_DMA_PORT_TIPB;
 691                 dest_port = OMAP_DMA_PORT_EMIFF;
 692         }
 693         if (cpu_class_is_omap2())
 694                 sync_dev = mcbsp->dma_tx_sync;
 695
 696         omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
 697                                      OMAP_DMA_DATA_TYPE_S16,
 698                                      length >> 1, 1,
 699                                      OMAP_DMA_SYNC_ELEMENT,
 700          sync_dev, 0);
 701
 702         omap_set_dma_dest_params(mcbsp->dma_tx_lch,
 703                                  src_port,
 704                                  OMAP_DMA_AMODE_CONSTANT,
 705                                  mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
 706                                  0, 0);
 707
 708         omap_set_dma_src_params(mcbsp->dma_tx_lch,
 709                                 dest_port,
 710                                 OMAP_DMA_AMODE_POST_INC,
 711                                 buffer,
 712                                 0, 0);
 713
 714         omap_start_dma(mcbsp->dma_tx_lch);
 715         wait_for_completion(&mcbsp->tx_dma_completion);
 716
 717         return 0;
 718 }
 719 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
 720
 721 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
 722                                 unsigned int length)
 723 {
 724         struct omap_mcbsp *mcbsp;
 725         int dma_rx_ch;
 726         int src_port = 0;
 727         int dest_port = 0;
 728         int sync_dev = 0;
 729
 730         if (!omap_mcbsp_check_valid_id(id)) {
 731                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 732                 return -ENODEV;
 733         }
 734         mcbsp = id_to_mcbsp_ptr(id);
 735
 736         if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
 737                                 omap_mcbsp_rx_dma_callback,
 738                                 mcbsp,
 739                                 &dma_rx_ch)) {
 740                 dev_err(mcbsp->dev, "Unable to request DMA channel for "
 741                                 "McBSP%d RX. Trying IRQ based RX\n",
 742                                 mcbsp->id);
 743                 return -EAGAIN;
 744         }
 745         mcbsp->dma_rx_lch = dma_rx_ch;
 746
 747         dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
 748                 dma_rx_ch);
 749
 750         init_completion(&mcbsp->rx_dma_completion);
 751
 752         if (cpu_class_is_omap1()) {
 753                 src_port = OMAP_DMA_PORT_TIPB;
 754                 dest_port = OMAP_DMA_PORT_EMIFF;
 755         }
 756         if (cpu_class_is_omap2())
 757                 sync_dev = mcbsp->dma_rx_sync;
 758
 759         omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
 760                                         OMAP_DMA_DATA_TYPE_S16,
 761                                         length >> 1, 1,
 762                                         OMAP_DMA_SYNC_ELEMENT,
 763                                         sync_dev, 0);
 764
 765         omap_set_dma_src_params(mcbsp->dma_rx_lch,
 766                                 src_port,
 767                                 OMAP_DMA_AMODE_CONSTANT,
 768                                 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
 769                                 0, 0);
 770
 771         omap_set_dma_dest_params(mcbsp->dma_rx_lch,
 772                                         dest_port,
 773                                         OMAP_DMA_AMODE_POST_INC,
 774                                         buffer,
 775                                         0, 0);
 776
 777         omap_start_dma(mcbsp->dma_rx_lch);
 778         wait_for_completion(&mcbsp->rx_dma_completion);
 779
 780         return 0;
 781 }
 782 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
 783
 784 /*
 785  * SPI wrapper.
 786  * Since SPI setup is much simpler than the generic McBSP one,
 787  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
 788  * Once this is done, you can call omap_mcbsp_start().
 789  */
 790 void omap_mcbsp_set_spi_mode(unsigned int id,
 791                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
 792 {
 793         struct omap_mcbsp *mcbsp;
 794         struct omap_mcbsp_reg_cfg mcbsp_cfg;
 795
 796         if (!omap_mcbsp_check_valid_id(id)) {
 797                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 798                 return;
 799         }
 800         mcbsp = id_to_mcbsp_ptr(id);
 801
 802         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
 803
 804         /* SPI has only one frame */
 805         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
 806         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
 807
 808         /* Clock stop mode */
 809         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
 810                 mcbsp_cfg.spcr1 |= (1 << 12);
 811         else
 812                 mcbsp_cfg.spcr1 |= (3 << 11);
 813
 814         /* Set clock parities */
 815         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 816                 mcbsp_cfg.pcr0 |= CLKRP;
 817         else
 818                 mcbsp_cfg.pcr0 &= ~CLKRP;
 819
 820         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 821                 mcbsp_cfg.pcr0 &= ~CLKXP;
 822         else
 823                 mcbsp_cfg.pcr0 |= CLKXP;
 824
 825         /* Set SCLKME to 0 and CLKSM to 1 */
 826         mcbsp_cfg.pcr0 &= ~SCLKME;
 827         mcbsp_cfg.srgr2 |= CLKSM;
 828
 829         /* Set FSXP */
 830         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
 831                 mcbsp_cfg.pcr0 &= ~FSXP;
 832         else
 833                 mcbsp_cfg.pcr0 |= FSXP;
 834
 835         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
 836                 mcbsp_cfg.pcr0 |= CLKXM;
 837                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
 838                 mcbsp_cfg.pcr0 |= FSXM;
 839                 mcbsp_cfg.srgr2 &= ~FSGM;
 840                 mcbsp_cfg.xcr2 |= XDATDLY(1);
 841                 mcbsp_cfg.rcr2 |= RDATDLY(1);
 842         } else {
 843                 mcbsp_cfg.pcr0 &= ~CLKXM;
 844                 mcbsp_cfg.srgr1 |= CLKGDV(1);
 845                 mcbsp_cfg.pcr0 &= ~FSXM;
 846                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
 847                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
 848         }
 849
 850         mcbsp_cfg.xcr2 &= ~XPHASE;
 851         mcbsp_cfg.rcr2 &= ~RPHASE;
 852
 853         omap_mcbsp_config(id, &mcbsp_cfg);
 854 }
 855 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 856
 857 /*
 858  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
 859  * 730 has only 2 McBSP, and both of them are MPU peripherals.
 860  */
 861 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
 862 {
 863         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
 864         struct omap_mcbsp *mcbsp;
 865         int id = pdev->id - 1;
 866         int ret = 0;
 867
 868         if (!pdata) {
 869                 dev_err(&pdev->dev, "McBSP device initialized without"
 870                                 "platform data\n");
 871                 ret = -EINVAL;
 872                 goto exit;
 873         }
 874
 875         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
 876
 877         if (id >= omap_mcbsp_count) {
 878                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
 879                 ret = -EINVAL;
 880                 goto exit;
 881         }
 882
 883         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
 884         if (!mcbsp) {
 885                 ret = -ENOMEM;
 886                 goto exit;
 887         }
 888         mcbsp_ptr[id] = mcbsp;
 889
 890         spin_lock_init(&mcbsp->lock);
 891         mcbsp->id = id + 1;
 892         mcbsp->free = 1;
 893         mcbsp->dma_tx_lch = -1;
 894         mcbsp->dma_rx_lch = -1;
 895
 896         mcbsp->phys_base = pdata->phys_base;
 897         mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
 898         if (!mcbsp->io_base) {
 899                 ret = -ENOMEM;
 900                 goto err_ioremap;
 901         }
 902
 903         /* Default I/O is IRQ based */
 904         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
 905         mcbsp->tx_irq = pdata->tx_irq;
 906         mcbsp->rx_irq = pdata->rx_irq;
 907         mcbsp->dma_rx_sync = pdata->dma_rx_sync;
 908         mcbsp->dma_tx_sync = pdata->dma_tx_sync;
 909
 910         if (pdata->clk_name)
 911                 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
 912         if (IS_ERR(mcbsp->clk)) {
 913                 dev_err(&pdev->dev,
 914                         "Invalid clock configuration for McBSP%d.\n",
 915                         mcbsp->id);
 916                 ret = PTR_ERR(mcbsp->clk);
 917                 goto err_clk;
 918         }
 919
 920         mcbsp->pdata = pdata;
 921         mcbsp->dev = &pdev->dev;
 922         platform_set_drvdata(pdev, mcbsp);
 923         return 0;
 924
 925 err_clk:
 926         iounmap(mcbsp->io_base);
 927 err_ioremap:
 928         mcbsp->free = 0;
 929 exit:
 930         return ret;
 931 }
 932
 933 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
 934 {
 935         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
 936
 937         platform_set_drvdata(pdev, NULL);
 938         if (mcbsp) {
 939
 940                 if (mcbsp->pdata && mcbsp->pdata->ops &&
 941                                 mcbsp->pdata->ops->free)
 942                         mcbsp->pdata->ops->free(mcbsp->id);
 943
 944                 clk_disable(mcbsp->clk);
 945                 clk_put(mcbsp->clk);
 946
 947                 iounmap(mcbsp->io_base);
 948
 949                 mcbsp->clk = NULL;
 950                 mcbsp->free = 0;
 951                 mcbsp->dev = NULL;
 952         }
 953
 954         return 0;
 955 }
 956
 957 static struct platform_driver omap_mcbsp_driver = {
 958         .probe          = omap_mcbsp_probe,
 959         .remove         = __devexit_p(omap_mcbsp_remove),
 960         .driver         = {
 961                 .name   = "omap-mcbsp",
 962         },
 963 };
 964
 965 int __init omap_mcbsp_init(void)
 966 {
 967         /* Register the McBSP driver */
 968         return platform_driver_register(&omap_mcbsp_driver);
 969 }
 970