2 * linux/arch/arm/plat-omap/mux.c
4 * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
6 * Copyright (C) 2003 - 2005 Nokia Corporation
8 * Written by Tony Lindgren <tony.lindgren@nokia.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/kernel.h>
28 #include <asm/system.h>
30 #include <linux/spinlock.h>
31 #include <asm/arch/mux.h>
33 #ifdef CONFIG_OMAP_MUX
35 #define OMAP24XX_PULL_ENA (1 << 3)
36 #define OMAP24XX_PULL_UP (1 << 4)
38 static struct pin_config * pin_table;
39 static unsigned long pin_table_sz;
41 extern struct pin_config * omap730_pins;
42 extern struct pin_config * omap1xxx_pins;
43 extern struct pin_config * omap24xx_pins;
45 int __init omap_mux_register(struct pin_config * pins, unsigned long size)
54 * Sets the Omap MUX and PULL_DWN registers based on the table
56 int __init_or_module omap_cfg_reg(const unsigned long index)
58 static DEFINE_SPINLOCK(mux_spin_lock);
61 struct pin_config *cfg;
62 unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
63 pull_orig = 0, pull = 0;
64 unsigned int mask, warn = 0;
69 if (index >= pin_table_sz) {
70 printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
76 cfg = (struct pin_config *)&pin_table[index];
77 #ifdef CONFIG_ARCH_OMAP24XX
78 if (cpu_is_omap24xx()) {
81 reg |= cfg->mask & 0x7;
83 reg |= OMAP24XX_PULL_ENA;
85 reg |= OMAP24XX_PULL_UP;
86 #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
88 u8 orig = omap_readb(OMAP2_CTRL_BASE + cfg->mux_reg);
91 #ifdef CONFIG_OMAP_MUX_DEBUG
96 printk("MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n",
98 OMAP2_CTRL_BASE + cfg->mux_reg,
102 omap_writeb(reg, OMAP2_CTRL_BASE + cfg->mux_reg);
106 #endif /* ARCH_OMAP24XX */
108 /* Check the mux register in question */
112 spin_lock_irqsave(&mux_spin_lock, flags);
113 reg_orig = omap_readl(cfg->mux_reg);
115 /* The mux registers always seem to be 3 bits long */
116 mask = (0x7 << cfg->mask_offset);
117 tmp1 = reg_orig & mask;
118 reg = reg_orig & ~mask;
120 tmp2 = (cfg->mask << cfg->mask_offset);
126 omap_writel(reg, cfg->mux_reg);
127 spin_unlock_irqrestore(&mux_spin_lock, flags);
130 /* Check for pull up or pull down selection on 1610 */
131 if (!cpu_is_omap15xx()) {
132 if (cfg->pu_pd_reg && cfg->pull_val) {
133 spin_lock_irqsave(&mux_spin_lock, flags);
134 pu_pd_orig = omap_readl(cfg->pu_pd_reg);
135 mask = 1 << cfg->pull_bit;
137 if (cfg->pu_pd_val) {
138 if (!(pu_pd_orig & mask))
141 pu_pd = pu_pd_orig | mask;
143 if (pu_pd_orig & mask)
146 pu_pd = pu_pd_orig & ~mask;
148 omap_writel(pu_pd, cfg->pu_pd_reg);
149 spin_unlock_irqrestore(&mux_spin_lock, flags);
153 /* Check for an associated pull down register */
155 spin_lock_irqsave(&mux_spin_lock, flags);
156 pull_orig = omap_readl(cfg->pull_reg);
157 mask = 1 << cfg->pull_bit;
160 if (pull_orig & mask)
162 /* Low bit = pull enabled */
163 pull = pull_orig & ~mask;
165 if (!(pull_orig & mask))
167 /* High bit = pull disabled */
168 pull = pull_orig | mask;
171 omap_writel(pull, cfg->pull_reg);
172 spin_unlock_irqrestore(&mux_spin_lock, flags);
176 #ifdef CONFIG_OMAP_MUX_WARNINGS
177 printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
181 #ifdef CONFIG_OMAP_MUX_DEBUG
182 if (cfg->debug || warn) {
183 printk("MUX: Setting register %s\n", cfg->name);
184 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
185 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
187 if (!cpu_is_omap15xx()) {
188 if (cfg->pu_pd_reg && cfg->pull_val) {
189 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
190 cfg->pu_pd_name, cfg->pu_pd_reg,
196 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
197 cfg->pull_name, cfg->pull_reg, pull_orig, pull);
201 #ifdef CONFIG_OMAP_MUX_ERRORS
202 return warn ? -ETXTBSY : 0;
207 EXPORT_SYMBOL(omap_cfg_reg);
209 #define omap_mux_init() do {} while(0)
210 #define omap_cfg_reg(x) do {} while(0)
211 #endif /* CONFIG_OMAP_MUX */