arch/ia64/kernel/mca.c

   1 /*
   2  * File:        mca.c
   3  * Purpose:     Generic MCA handling layer
   4  *
   5  * Updated for latest kernel
   6  * Copyright (C) 2003 Hewlett-Packard Co
   7  *      David Mosberger-Tang <davidm@hpl.hp.com>
   8  *
   9  * Copyright (C) 2002 Dell Inc.
  10  * Copyright (C) Matt Domsch (Matt_Domsch@dell.com)
  11  *
  12  * Copyright (C) 2002 Intel
  13  * Copyright (C) Jenna Hall (jenna.s.hall@intel.com)
  14  *
  15  * Copyright (C) 2001 Intel
  16  * Copyright (C) Fred Lewis (frederick.v.lewis@intel.com)
  17  *
  18  * Copyright (C) 2000 Intel
  19  * Copyright (C) Chuck Fleckenstein (cfleck@co.intel.com)
  20  *
  21  * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
  22  * Copyright (C) Vijay Chander(vijay@engr.sgi.com)
  23  *
  24  * 03/04/15 D. Mosberger Added INIT backtrace support.
  25  * 02/03/25 M. Domsch   GUID cleanups
  26  *
  27  * 02/01/04 J. Hall     Aligned MCA stack to 16 bytes, added platform vs. CPU
  28  *                      error flag, set SAL default return values, changed
  29  *                      error record structure to linked list, added init call
  30  *                      to sal_get_state_info_size().
  31  *
  32  * 01/01/03 F. Lewis    Added setup of CMCI and CPEI IRQs, logging of corrected
  33  *                      platform errors, completed code for logging of
  34  *                      corrected & uncorrected machine check errors, and
  35  *                      updated for conformance with Nov. 2000 revision of the
  36  *                      SAL 3.0 spec.
  37  * 00/03/29 C. Fleckenstein  Fixed PAL/SAL update issues, began MCA bug fixes, logging issues,
  38  *                           added min save state dump, added INIT handler.
  39  *
  40  * 2003-12-08 Keith Owens <kaos@sgi.com>
  41  *            smp_call_function() must not be called from interrupt context (can
  42  *            deadlock on tasklist_lock).  Use keventd to call smp_call_function().
  43  *
  44  * 2004-02-01 Keith Owens <kaos@sgi.com>
  45  *            Avoid deadlock when using printk() for MCA and INIT records.
  46  *            Delete all record printing code, moved to salinfo_decode in user space.
  47  *            Mark variables and functions static where possible.
  48  *            Delete dead variables and functions.
  49  *            Reorder to remove the need for forward declarations and to consolidate
  50  *            related code.
  51  *
  52  * 2005-08-12 Keith Owens <kaos@sgi.com>
  53  *            Convert MCA/INIT handlers to use per event stacks and SAL/OS state.
  54  *
  55  * 2005-10-07 Keith Owens <kaos@sgi.com>
  56  *            Add notify_die() hooks.
  57  *
  58  * 2006-09-15 Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
  59  *            Add printing support for MCA/INIT.
  60  *
  61  * 2007-04-27 Russ Anderson <rja@sgi.com>
  62  *            Support multiple cpus going through OS_MCA in the same event.
  63  */
  64 #include <linux/types.h>
  65 #include <linux/init.h>
  66 #include <linux/sched.h>
  67 #include <linux/interrupt.h>
  68 #include <linux/irq.h>
  69 #include <linux/bootmem.h>
  70 #include <linux/acpi.h>
  71 #include <linux/timer.h>
  72 #include <linux/module.h>
  73 #include <linux/kernel.h>
  74 #include <linux/smp.h>
  75 #include <linux/workqueue.h>
  76 #include <linux/cpumask.h>
  77 #include <linux/kdebug.h>
  78 #include <linux/cpu.h>
  79
  80 #include <asm/delay.h>
  81 #include <asm/machvec.h>
  82 #include <asm/meminit.h>
  83 #include <asm/page.h>
  84 #include <asm/ptrace.h>
  85 #include <asm/system.h>
  86 #include <asm/sal.h>
  87 #include <asm/mca.h>
  88 #include <asm/kexec.h>
  89
  90 #include <asm/irq.h>
  91 #include <asm/hw_irq.h>
  92
  93 #include "mca_drv.h"
  94 #include "entry.h"
  95
  96 #if defined(IA64_MCA_DEBUG_INFO)
  97 # define IA64_MCA_DEBUG(fmt...) printk(fmt)
  98 #else
  99 # define IA64_MCA_DEBUG(fmt...)
 100 #endif
 101
 102 /* Used by mca_asm.S */
 103 DEFINE_PER_CPU(u64, ia64_mca_data); /* == __per_cpu_mca[smp_processor_id()] */
 104 DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */
 105 DEFINE_PER_CPU(u64, ia64_mca_pal_pte);      /* PTE to map PAL code */
 106 DEFINE_PER_CPU(u64, ia64_mca_pal_base);    /* vaddr PAL code granule */
 107
 108 unsigned long __per_cpu_mca[NR_CPUS];
 109
 110 /* In mca_asm.S */
 111 extern void                     ia64_os_init_dispatch_monarch (void);
 112 extern void                     ia64_os_init_dispatch_slave (void);
 113
 114 static int monarch_cpu = -1;
 115
 116 static ia64_mc_info_t           ia64_mc_info;
 117
 118 #define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
 119 #define MIN_CPE_POLL_INTERVAL (2*60*HZ)  /* 2 minutes */
 120 #define CMC_POLL_INTERVAL     (1*60*HZ)  /* 1 minute */
 121 #define CPE_HISTORY_LENGTH    5
 122 #define CMC_HISTORY_LENGTH    5
 123
 124 #ifdef CONFIG_ACPI
 125 static struct timer_list cpe_poll_timer;
 126 #endif
 127 static struct timer_list cmc_poll_timer;
 128 /*
 129  * This variable tells whether we are currently in polling mode.
 130  * Start with this in the wrong state so we won't play w/ timers
 131  * before the system is ready.
 132  */
 133 static int cmc_polling_enabled = 1;
 134
 135 /*
 136  * Clearing this variable prevents CPE polling from getting activated
 137  * in mca_late_init.  Use it if your system doesn't provide a CPEI,
 138  * but encounters problems retrieving CPE logs.  This should only be
 139  * necessary for debugging.
 140  */
 141 static int cpe_poll_enabled = 1;
 142
 143 extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe);
 144
 145 static int mca_init __initdata;
 146
 147 /*
 148  * limited & delayed printing support for MCA/INIT handler
 149  */
 150
 151 #define mprintk(fmt...) ia64_mca_printk(fmt)
 152
 153 #define MLOGBUF_SIZE (512+256*NR_CPUS)
 154 #define MLOGBUF_MSGMAX 256
 155 static char mlogbuf[MLOGBUF_SIZE];
 156 static DEFINE_SPINLOCK(mlogbuf_wlock);  /* mca context only */
 157 static DEFINE_SPINLOCK(mlogbuf_rlock);  /* normal context only */
 158 static unsigned long mlogbuf_start;
 159 static unsigned long mlogbuf_end;
 160 static unsigned int mlogbuf_finished = 0;
 161 static unsigned long mlogbuf_timestamp = 0;
 162
 163 static int loglevel_save = -1;
 164 #define BREAK_LOGLEVEL(__console_loglevel)              \
 165         oops_in_progress = 1;                           \
 166         if (loglevel_save < 0)                          \
 167                 loglevel_save = __console_loglevel;     \
 168         __console_loglevel = 15;
 169
 170 #define RESTORE_LOGLEVEL(__console_loglevel)            \
 171         if (loglevel_save >= 0) {                       \
 172                 __console_loglevel = loglevel_save;     \
 173                 loglevel_save = -1;                     \
 174         }                                               \
 175         mlogbuf_finished = 0;                           \
 176         oops_in_progress = 0;
 177
 178 /*
 179  * Push messages into buffer, print them later if not urgent.
 180  */
 181 void ia64_mca_printk(const char *fmt, ...)
 182 {
 183         va_list args;
 184         int printed_len;
 185         char temp_buf[MLOGBUF_MSGMAX];
 186         char *p;
 187
 188         va_start(args, fmt);
 189         printed_len = vscnprintf(temp_buf, sizeof(temp_buf), fmt, args);
 190         va_end(args);
 191
 192         /* Copy the output into mlogbuf */
 193         if (oops_in_progress) {
 194                 /* mlogbuf was abandoned, use printk directly instead. */
 195                 printk(temp_buf);
 196         } else {
 197                 spin_lock(&mlogbuf_wlock);
 198                 for (p = temp_buf; *p; p++) {
 199                         unsigned long next = (mlogbuf_end + 1) % MLOGBUF_SIZE;
 200                         if (next != mlogbuf_start) {
 201                                 mlogbuf[mlogbuf_end] = *p;
 202                                 mlogbuf_end = next;
 203                         } else {
 204                                 /* buffer full */
 205                                 break;
 206                         }
 207                 }
 208                 mlogbuf[mlogbuf_end] = '\0';
 209                 spin_unlock(&mlogbuf_wlock);
 210         }
 211 }
 212 EXPORT_SYMBOL(ia64_mca_printk);
 213
 214 /*
 215  * Print buffered messages.
 216  *  NOTE: call this after returning normal context. (ex. from salinfod)
 217  */
 218 void ia64_mlogbuf_dump(void)
 219 {
 220         char temp_buf[MLOGBUF_MSGMAX];
 221         char *p;
 222         unsigned long index;
 223         unsigned long flags;
 224         unsigned int printed_len;
 225
 226         /* Get output from mlogbuf */
 227         while (mlogbuf_start != mlogbuf_end) {
 228                 temp_buf[0] = '\0';
 229                 p = temp_buf;
 230                 printed_len = 0;
 231
 232                 spin_lock_irqsave(&mlogbuf_rlock, flags);
 233
 234                 index = mlogbuf_start;
 235                 while (index != mlogbuf_end) {
 236                         *p = mlogbuf[index];
 237                         index = (index + 1) % MLOGBUF_SIZE;
 238                         if (!*p)
 239                                 break;
 240                         p++;
 241                         if (++printed_len >= MLOGBUF_MSGMAX - 1)
 242                                 break;
 243                 }
 244                 *p = '\0';
 245                 if (temp_buf[0])
 246                         printk(temp_buf);
 247                 mlogbuf_start = index;
 248
 249                 mlogbuf_timestamp = 0;
 250                 spin_unlock_irqrestore(&mlogbuf_rlock, flags);
 251         }
 252 }
 253 EXPORT_SYMBOL(ia64_mlogbuf_dump);
 254
 255 /*
 256  * Call this if system is going to down or if immediate flushing messages to
 257  * console is required. (ex. recovery was failed, crash dump is going to be
 258  * invoked, long-wait rendezvous etc.)
 259  *  NOTE: this should be called from monarch.
 260  */
 261 static void ia64_mlogbuf_finish(int wait)
 262 {
 263         BREAK_LOGLEVEL(console_loglevel);
 264
 265         spin_lock_init(&mlogbuf_rlock);
 266         ia64_mlogbuf_dump();
 267         printk(KERN_EMERG "mlogbuf_finish: printing switched to urgent mode, "
 268                 "MCA/INIT might be dodgy or fail.\n");
 269
 270         if (!wait)
 271                 return;
 272
 273         /* wait for console */
 274         printk("Delaying for 5 seconds...\n");
 275         udelay(5*1000000);
 276
 277         mlogbuf_finished = 1;
 278 }
 279
 280 /*
 281  * Print buffered messages from INIT context.
 282  */
 283 static void ia64_mlogbuf_dump_from_init(void)
 284 {
 285         if (mlogbuf_finished)
 286                 return;
 287
 288         if (mlogbuf_timestamp && (mlogbuf_timestamp + 30*HZ > jiffies)) {
 289                 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT "
 290                         " and the system seems to be messed up.\n");
 291                 ia64_mlogbuf_finish(0);
 292                 return;
 293         }
 294
 295         if (!spin_trylock(&mlogbuf_rlock)) {
 296                 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT. "
 297                         "Generated messages other than stack dump will be "
 298                         "buffered to mlogbuf and will be printed later.\n");
 299                 printk(KERN_ERR "INIT: If messages would not printed after "
 300                         "this INIT, wait 30sec and assert INIT again.\n");
 301                 if (!mlogbuf_timestamp)
 302                         mlogbuf_timestamp = jiffies;
 303                 return;
 304         }
 305         spin_unlock(&mlogbuf_rlock);
 306         ia64_mlogbuf_dump();
 307 }
 308
 309 static void inline
 310 ia64_mca_spin(const char *func)
 311 {
 312         if (monarch_cpu == smp_processor_id())
 313                 ia64_mlogbuf_finish(0);
 314         mprintk(KERN_EMERG "%s: spinning here, not returning to SAL\n", func);
 315         while (1)
 316                 cpu_relax();
 317 }
 318 /*
 319  * IA64_MCA log support
 320  */
 321 #define IA64_MAX_LOGS           2       /* Double-buffering for nested MCAs */
 322 #define IA64_MAX_LOG_TYPES      4   /* MCA, INIT, CMC, CPE */
 323
 324 typedef struct ia64_state_log_s
 325 {
 326         spinlock_t      isl_lock;
 327         int             isl_index;
 328         unsigned long   isl_count;
 329         ia64_err_rec_t  *isl_log[IA64_MAX_LOGS]; /* need space to store header + error log */
 330 } ia64_state_log_t;
 331
 332 static ia64_state_log_t ia64_state_log[IA64_MAX_LOG_TYPES];
 333
 334 #define IA64_LOG_ALLOCATE(it, size) \
 335         {ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)] = \
 336                 (ia64_err_rec_t *)alloc_bootmem(size); \
 337         ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)] = \
 338                 (ia64_err_rec_t *)alloc_bootmem(size);}
 339 #define IA64_LOG_LOCK_INIT(it) spin_lock_init(&ia64_state_log[it].isl_lock)
 340 #define IA64_LOG_LOCK(it)      spin_lock_irqsave(&ia64_state_log[it].isl_lock, s)
 341 #define IA64_LOG_UNLOCK(it)    spin_unlock_irqrestore(&ia64_state_log[it].isl_lock,s)
 342 #define IA64_LOG_NEXT_INDEX(it)    ia64_state_log[it].isl_index
 343 #define IA64_LOG_CURR_INDEX(it)    1 - ia64_state_log[it].isl_index
 344 #define IA64_LOG_INDEX_INC(it) \
 345     {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \
 346     ia64_state_log[it].isl_count++;}
 347 #define IA64_LOG_INDEX_DEC(it) \
 348     ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
 349 #define IA64_LOG_NEXT_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)]))
 350 #define IA64_LOG_CURR_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)]))
 351 #define IA64_LOG_COUNT(it)         ia64_state_log[it].isl_count
 352
 353 /*
 354  * ia64_log_init
 355  *      Reset the OS ia64 log buffer
 356  * Inputs   :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
 357  * Outputs      :       None
 358  */
 359 static void __init
 360 ia64_log_init(int sal_info_type)
 361 {
 362         u64     max_size = 0;
 363
 364         IA64_LOG_NEXT_INDEX(sal_info_type) = 0;
 365         IA64_LOG_LOCK_INIT(sal_info_type);
 366
 367         // SAL will tell us the maximum size of any error record of this type
 368         max_size = ia64_sal_get_state_info_size(sal_info_type);
 369         if (!max_size)
 370                 /* alloc_bootmem() doesn't like zero-sized allocations! */
 371                 return;
 372
 373         // set up OS data structures to hold error info
 374         IA64_LOG_ALLOCATE(sal_info_type, max_size);
 375         memset(IA64_LOG_CURR_BUFFER(sal_info_type), 0, max_size);
 376         memset(IA64_LOG_NEXT_BUFFER(sal_info_type), 0, max_size);
 377 }
 378
 379 /*
 380  * ia64_log_get
 381  *
 382  *      Get the current MCA log from SAL and copy it into the OS log buffer.
 383  *
 384  *  Inputs  :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
 385  *              irq_safe    whether you can use printk at this point
 386  *  Outputs :   size        (total record length)
 387  *              *buffer     (ptr to error record)
 388  *
 389  */
 390 static u64
 391 ia64_log_get(int sal_info_type, u8 **buffer, int irq_safe)
 392 {
 393         sal_log_record_header_t     *log_buffer;
 394         u64                         total_len = 0;
 395         unsigned long               s;
 396
 397         IA64_LOG_LOCK(sal_info_type);
 398
 399         /* Get the process state information */
 400         log_buffer = IA64_LOG_NEXT_BUFFER(sal_info_type);
 401
 402         total_len = ia64_sal_get_state_info(sal_info_type, (u64 *)log_buffer);
 403
 404         if (total_len) {
 405                 IA64_LOG_INDEX_INC(sal_info_type);
 406                 IA64_LOG_UNLOCK(sal_info_type);
 407                 if (irq_safe) {
 408                         IA64_MCA_DEBUG("%s: SAL error record type %d retrieved. "
 409                                        "Record length = %ld\n", __FUNCTION__, sal_info_type, total_len);
 410                 }
 411                 *buffer = (u8 *) log_buffer;
 412                 return total_len;
 413         } else {
 414                 IA64_LOG_UNLOCK(sal_info_type);
 415                 return 0;
 416         }
 417 }
 418
 419 /*
 420  *  ia64_mca_log_sal_error_record
 421  *
 422  *  This function retrieves a specified error record type from SAL
 423  *  and wakes up any processes waiting for error records.
 424  *
 425  *  Inputs  :   sal_info_type   (Type of error record MCA/CMC/CPE)
 426  *              FIXME: remove MCA and irq_safe.
 427  */
 428 static void
 429 ia64_mca_log_sal_error_record(int sal_info_type)
 430 {
 431         u8 *buffer;
 432         sal_log_record_header_t *rh;
 433         u64 size;
 434         int irq_safe = sal_info_type != SAL_INFO_TYPE_MCA;
 435 #ifdef IA64_MCA_DEBUG_INFO
 436         static const char * const rec_name[] = { "MCA", "INIT", "CMC", "CPE" };
 437 #endif
 438
 439         size = ia64_log_get(sal_info_type, &buffer, irq_safe);
 440         if (!size)
 441                 return;
 442
 443         salinfo_log_wakeup(sal_info_type, buffer, size, irq_safe);
 444
 445         if (irq_safe)
 446                 IA64_MCA_DEBUG("CPU %d: SAL log contains %s error record\n",
 447                         smp_processor_id(),
 448                         sal_info_type < ARRAY_SIZE(rec_name) ? rec_name[sal_info_type] : "UNKNOWN");
 449
 450         /* Clear logs from corrected errors in case there's no user-level logger */
 451         rh = (sal_log_record_header_t *)buffer;
 452         if (rh->severity == sal_log_severity_corrected)
 453                 ia64_sal_clear_state_info(sal_info_type);
 454 }
 455
 456 /*
 457  * search_mca_table
 458  *  See if the MCA surfaced in an instruction range
 459  *  that has been tagged as recoverable.
 460  *
 461  *  Inputs
 462  *      first   First address range to check
 463  *      last    Last address range to check
 464  *      ip      Instruction pointer, address we are looking for
 465  *
 466  * Return value:
 467  *      1 on Success (in the table)/ 0 on Failure (not in the  table)
 468  */
 469 int
 470 search_mca_table (const struct mca_table_entry *first,
 471                 const struct mca_table_entry *last,
 472                 unsigned long ip)
 473 {
 474         const struct mca_table_entry *curr;
 475         u64 curr_start, curr_end;
 476
 477         curr = first;
 478         while (curr <= last) {
 479                 curr_start = (u64) &curr->start_addr + curr->start_addr;
 480                 curr_end = (u64) &curr->end_addr + curr->end_addr;
 481
 482                 if ((ip >= curr_start) && (ip <= curr_end)) {
 483                         return 1;
 484                 }
 485                 curr++;
 486         }
 487         return 0;
 488 }
 489
 490 /* Given an address, look for it in the mca tables. */
 491 int mca_recover_range(unsigned long addr)
 492 {
 493         extern struct mca_table_entry __start___mca_table[];
 494         extern struct mca_table_entry __stop___mca_table[];
 495
 496         return search_mca_table(__start___mca_table, __stop___mca_table-1, addr);
 497 }
 498 EXPORT_SYMBOL_GPL(mca_recover_range);
 499
 500 #ifdef CONFIG_ACPI
 501
 502 int cpe_vector = -1;
 503 int ia64_cpe_irq = -1;
 504
 505 static irqreturn_t
 506 ia64_mca_cpe_int_handler (int cpe_irq, void *arg)
 507 {
 508         static unsigned long    cpe_history[CPE_HISTORY_LENGTH];
 509         static int              index;
 510         static DEFINE_SPINLOCK(cpe_history_lock);
 511
 512         IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
 513                        __FUNCTION__, cpe_irq, smp_processor_id());
 514
 515         /* SAL spec states this should run w/ interrupts enabled */
 516         local_irq_enable();
 517
 518         spin_lock(&cpe_history_lock);
 519         if (!cpe_poll_enabled && cpe_vector >= 0) {
 520
 521                 int i, count = 1; /* we know 1 happened now */
 522                 unsigned long now = jiffies;
 523
 524                 for (i = 0; i < CPE_HISTORY_LENGTH; i++) {
 525                         if (now - cpe_history[i] <= HZ)
 526                                 count++;
 527                 }
 528
 529                 IA64_MCA_DEBUG(KERN_INFO "CPE threshold %d/%d\n", count, CPE_HISTORY_LENGTH);
 530                 if (count >= CPE_HISTORY_LENGTH) {
 531
 532                         cpe_poll_enabled = 1;
 533                         spin_unlock(&cpe_history_lock);
 534                         disable_irq_nosync(local_vector_to_irq(IA64_CPE_VECTOR));
 535
 536                         /*
 537                          * Corrected errors will still be corrected, but
 538                          * make sure there's a log somewhere that indicates
 539                          * something is generating more than we can handle.
 540                          */
 541                         printk(KERN_WARNING "WARNING: Switching to polling CPE handler; error records may be lost\n");
 542
 543                         mod_timer(&cpe_poll_timer, jiffies + MIN_CPE_POLL_INTERVAL);
 544
 545                         /* lock already released, get out now */
 546                         goto out;
 547                 } else {
 548                         cpe_history[index++] = now;
 549                         if (index == CPE_HISTORY_LENGTH)
 550                                 index = 0;
 551                 }
 552         }
 553         spin_unlock(&cpe_history_lock);
 554 out:
 555         /* Get the CPE error record and log it */
 556         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE);
 557
 558         return IRQ_HANDLED;
 559 }
 560
 561 #endif /* CONFIG_ACPI */
 562
 563 #ifdef CONFIG_ACPI
 564 /*
 565  * ia64_mca_register_cpev
 566  *
 567  *  Register the corrected platform error vector with SAL.
 568  *
 569  *  Inputs
 570  *      cpev        Corrected Platform Error Vector number
 571  *
 572  *  Outputs
 573  *      None
 574  */
 575 void
 576 ia64_mca_register_cpev (int cpev)
 577 {
 578         /* Register the CPE interrupt vector with SAL */
 579         struct ia64_sal_retval isrv;
 580
 581         isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_CPE_INT, SAL_MC_PARAM_MECHANISM_INT, cpev, 0, 0);
 582         if (isrv.status) {
 583                 printk(KERN_ERR "Failed to register Corrected Platform "
 584                        "Error interrupt vector with SAL (status %ld)\n", isrv.status);
 585                 return;
 586         }
 587
 588         IA64_MCA_DEBUG("%s: corrected platform error "
 589                        "vector %#x registered\n", __FUNCTION__, cpev);
 590 }
 591 #endif /* CONFIG_ACPI */
 592
 593 /*
 594  * ia64_mca_cmc_vector_setup
 595  *
 596  *  Setup the corrected machine check vector register in the processor.
 597  *  (The interrupt is masked on boot. ia64_mca_late_init unmask this.)
 598  *  This function is invoked on a per-processor basis.
 599  *
 600  * Inputs
 601  *      None
 602  *
 603  * Outputs
 604  *      None
 605  */
 606 void __cpuinit
 607 ia64_mca_cmc_vector_setup (void)
 608 {
 609         cmcv_reg_t      cmcv;
 610
 611         cmcv.cmcv_regval        = 0;
 612         cmcv.cmcv_mask          = 1;        /* Mask/disable interrupt at first */
 613         cmcv.cmcv_vector        = IA64_CMC_VECTOR;
 614         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 615
 616         IA64_MCA_DEBUG("%s: CPU %d corrected "
 617                        "machine check vector %#x registered.\n",
 618                        __FUNCTION__, smp_processor_id(), IA64_CMC_VECTOR);
 619
 620         IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
 621                        __FUNCTION__, smp_processor_id(), ia64_getreg(_IA64_REG_CR_CMCV));
 622 }
 623
 624 /*
 625  * ia64_mca_cmc_vector_disable
 626  *
 627  *  Mask the corrected machine check vector register in the processor.
 628  *  This function is invoked on a per-processor basis.
 629  *
 630  * Inputs
 631  *      dummy(unused)
 632  *
 633  * Outputs
 634  *      None
 635  */
 636 static void
 637 ia64_mca_cmc_vector_disable (void *dummy)
 638 {
 639         cmcv_reg_t      cmcv;
 640
 641         cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
 642
 643         cmcv.cmcv_mask = 1; /* Mask/disable interrupt */
 644         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 645
 646         IA64_MCA_DEBUG("%s: CPU %d corrected "
 647                        "machine check vector %#x disabled.\n",
 648                        __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
 649 }
 650
 651 /*
 652  * ia64_mca_cmc_vector_enable
 653  *
 654  *  Unmask the corrected machine check vector register in the processor.
 655  *  This function is invoked on a per-processor basis.
 656  *
 657  * Inputs
 658  *      dummy(unused)
 659  *
 660  * Outputs
 661  *      None
 662  */
 663 static void
 664 ia64_mca_cmc_vector_enable (void *dummy)
 665 {
 666         cmcv_reg_t      cmcv;
 667
 668         cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
 669
 670         cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
 671         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 672
 673         IA64_MCA_DEBUG("%s: CPU %d corrected "
 674                        "machine check vector %#x enabled.\n",
 675                        __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
 676 }
 677
 678 /*
 679  * ia64_mca_cmc_vector_disable_keventd
 680  *
 681  * Called via keventd (smp_call_function() is not safe in interrupt context) to
 682  * disable the cmc interrupt vector.
 683  */
 684 static void
 685 ia64_mca_cmc_vector_disable_keventd(struct work_struct *unused)
 686 {
 687         on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 1, 0);
 688 }
 689
 690 /*
 691  * ia64_mca_cmc_vector_enable_keventd
 692  *
 693  * Called via keventd (smp_call_function() is not safe in interrupt context) to
 694  * enable the cmc interrupt vector.
 695  */
 696 static void
 697 ia64_mca_cmc_vector_enable_keventd(struct work_struct *unused)
 698 {
 699         on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 1, 0);
 700 }
 701
 702 /*
 703  * ia64_mca_wakeup
 704  *
 705  *      Send an inter-cpu interrupt to wake-up a particular cpu.
 706  *
 707  *  Inputs  :   cpuid
 708  *  Outputs :   None
 709  */
 710 static void
 711 ia64_mca_wakeup(int cpu)
 712 {
 713         platform_send_ipi(cpu, IA64_MCA_WAKEUP_VECTOR, IA64_IPI_DM_INT, 0);
 714 }
 715
 716 /*
 717  * ia64_mca_wakeup_all
 718  *
 719  *      Wakeup all the slave cpus which have rendez'ed previously.
 720  *
 721  *  Inputs  :   None
 722  *  Outputs :   None
 723  */
 724 static void
 725 ia64_mca_wakeup_all(void)
 726 {
 727         int cpu;
 728
 729         /* Clear the Rendez checkin flag for all cpus */
 730         for_each_online_cpu(cpu) {
 731                 if (ia64_mc_info.imi_rendez_checkin[cpu] == IA64_MCA_RENDEZ_CHECKIN_DONE)
 732                         ia64_mca_wakeup(cpu);
 733         }
 734
 735 }
 736
 737 /*
 738  * ia64_mca_rendez_interrupt_handler
 739  *
 740  *      This is handler used to put slave processors into spinloop
 741  *      while the monarch processor does the mca handling and later
 742  *      wake each slave up once the monarch is done.  The state
 743  *      IA64_MCA_RENDEZ_CHECKIN_DONE indicates the cpu is rendez'ed
 744  *      in SAL.  The state IA64_MCA_RENDEZ_CHECKIN_NOTDONE indicates
 745  *      the cpu has come out of OS rendezvous.
 746  *
 747  *  Inputs  :   None
 748  *  Outputs :   None
 749  */
 750 static irqreturn_t
 751 ia64_mca_rendez_int_handler(int rendez_irq, void *arg)
 752 {
 753         unsigned long flags;
 754         int cpu = smp_processor_id();
 755         struct ia64_mca_notify_die nd =
 756                 { .sos = NULL, .monarch_cpu = &monarch_cpu };
 757
 758         /* Mask all interrupts */
 759         local_irq_save(flags);
 760         if (notify_die(DIE_MCA_RENDZVOUS_ENTER, "MCA", get_irq_regs(),
 761                        (long)&nd, 0, 0) == NOTIFY_STOP)
 762                 ia64_mca_spin(__FUNCTION__);
 763
 764         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_DONE;
 765         /* Register with the SAL monarch that the slave has
 766          * reached SAL
 767          */
 768         ia64_sal_mc_rendez();
 769
 770         if (notify_die(DIE_MCA_RENDZVOUS_PROCESS, "MCA", get_irq_regs(),
 771                        (long)&nd, 0, 0) == NOTIFY_STOP)
 772                 ia64_mca_spin(__FUNCTION__);
 773
 774         /* Wait for the monarch cpu to exit. */
 775         while (monarch_cpu != -1)
 776                cpu_relax();     /* spin until monarch leaves */
 777
 778         if (notify_die(DIE_MCA_RENDZVOUS_LEAVE, "MCA", get_irq_regs(),
 779                        (long)&nd, 0, 0) == NOTIFY_STOP)
 780                 ia64_mca_spin(__FUNCTION__);
 781
 782         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
 783         /* Enable all interrupts */
 784         local_irq_restore(flags);
 785         return IRQ_HANDLED;
 786 }
 787
 788 /*
 789  * ia64_mca_wakeup_int_handler
 790  *
 791  *      The interrupt handler for processing the inter-cpu interrupt to the
 792  *      slave cpu which was spinning in the rendez loop.
 793  *      Since this spinning is done by turning off the interrupts and
 794  *      polling on the wakeup-interrupt bit in the IRR, there is
 795  *      nothing useful to be done in the handler.
 796  *
 797  *  Inputs  :   wakeup_irq  (Wakeup-interrupt bit)
 798  *      arg             (Interrupt handler specific argument)
 799  *  Outputs :   None
 800  *
 801  */
 802 static irqreturn_t
 803 ia64_mca_wakeup_int_handler(int wakeup_irq, void *arg)
 804 {
 805         return IRQ_HANDLED;
 806 }
 807
 808 /* Function pointer for extra MCA recovery */
 809 int (*ia64_mca_ucmc_extension)
 810         (void*,struct ia64_sal_os_state*)
 811         = NULL;
 812
 813 int
 814 ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *))
 815 {
 816         if (ia64_mca_ucmc_extension)
 817                 return 1;
 818
 819         ia64_mca_ucmc_extension = fn;
 820         return 0;
 821 }
 822
 823 void
 824 ia64_unreg_MCA_extension(void)
 825 {
 826         if (ia64_mca_ucmc_extension)
 827                 ia64_mca_ucmc_extension = NULL;
 828 }
 829
 830 EXPORT_SYMBOL(ia64_reg_MCA_extension);
 831 EXPORT_SYMBOL(ia64_unreg_MCA_extension);
 832
 833
 834 static inline void
 835 copy_reg(const u64 *fr, u64 fnat, u64 *tr, u64 *tnat)
 836 {
 837         u64 fslot, tslot, nat;
 838         *tr = *fr;
 839         fslot = ((unsigned long)fr >> 3) & 63;
 840         tslot = ((unsigned long)tr >> 3) & 63;
 841         *tnat &= ~(1UL << tslot);
 842         nat = (fnat >> fslot) & 1;
 843         *tnat |= (nat << tslot);
 844 }
 845
 846 /* Change the comm field on the MCA/INT task to include the pid that
 847  * was interrupted, it makes for easier debugging.  If that pid was 0
 848  * (swapper or nested MCA/INIT) then use the start of the previous comm
 849  * field suffixed with its cpu.
 850  */
 851
 852 static void
 853 ia64_mca_modify_comm(const struct task_struct *previous_current)
 854 {
 855         char *p, comm[sizeof(current->comm)];
 856         if (previous_current->pid)
 857                 snprintf(comm, sizeof(comm), "%s %d",
 858                         current->comm, previous_current->pid);
 859         else {
 860                 int l;
 861                 if ((p = strchr(previous_current->comm, ' ')))
 862                         l = p - previous_current->comm;
 863                 else
 864                         l = strlen(previous_current->comm);
 865                 snprintf(comm, sizeof(comm), "%s %*s %d",
 866                         current->comm, l, previous_current->comm,
 867                         task_thread_info(previous_current)->cpu);
 868         }
 869         memcpy(current->comm, comm, sizeof(current->comm));
 870 }
 871
 872 /* On entry to this routine, we are running on the per cpu stack, see
 873  * mca_asm.h.  The original stack has not been touched by this event.  Some of
 874  * the original stack's registers will be in the RBS on this stack.  This stack
 875  * also contains a partial pt_regs and switch_stack, the rest of the data is in
 876  * PAL minstate.
 877  *
 878  * The first thing to do is modify the original stack to look like a blocked
 879  * task so we can run backtrace on the original task.  Also mark the per cpu
 880  * stack as current to ensure that we use the correct task state, it also means
 881  * that we can do backtrace on the MCA/INIT handler code itself.
 882  */
 883
 884 static struct task_struct *
 885 ia64_mca_modify_original_stack(struct pt_regs *regs,
 886                 const struct switch_stack *sw,
 887                 struct ia64_sal_os_state *sos,
 888                 const char *type)
 889 {
 890         char *p;
 891         ia64_va va;
 892         extern char ia64_leave_kernel[];        /* Need asm address, not function descriptor */
 893         const pal_min_state_area_t *ms = sos->pal_min_state;
 894         struct task_struct *previous_current;
 895         struct pt_regs *old_regs;
 896         struct switch_stack *old_sw;
 897         unsigned size = sizeof(struct pt_regs) +
 898                         sizeof(struct switch_stack) + 16;
 899         u64 *old_bspstore, *old_bsp;
 900         u64 *new_bspstore, *new_bsp;
 901         u64 old_unat, old_rnat, new_rnat, nat;
 902         u64 slots, loadrs = regs->loadrs;
 903         u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1];
 904         u64 ar_bspstore = regs->ar_bspstore;
 905         u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16);
 906         const u64 *bank;
 907         const char *msg;
 908         int cpu = smp_processor_id();
 909
 910         previous_current = curr_task(cpu);
 911         set_curr_task(cpu, current);
 912         if ((p = strchr(current->comm, ' ')))
 913                 *p = '\0';
 914
 915         /* Best effort attempt to cope with MCA/INIT delivered while in
 916          * physical mode.
 917          */
 918         regs->cr_ipsr = ms->pmsa_ipsr;
 919         if (ia64_psr(regs)->dt == 0) {
 920                 va.l = r12;
 921                 if (va.f.reg == 0) {
 922                         va.f.reg = 7;
 923                         r12 = va.l;
 924                 }
 925                 va.l = r13;
 926                 if (va.f.reg == 0) {
 927                         va.f.reg = 7;
 928                         r13 = va.l;
 929                 }
 930         }
 931         if (ia64_psr(regs)->rt == 0) {
 932                 va.l = ar_bspstore;
 933                 if (va.f.reg == 0) {
 934                         va.f.reg = 7;
 935                         ar_bspstore = va.l;
 936                 }
 937                 va.l = ar_bsp;
 938                 if (va.f.reg == 0) {
 939                         va.f.reg = 7;
 940                         ar_bsp = va.l;
 941                 }
 942         }
 943
 944         /* mca_asm.S ia64_old_stack() cannot assume that the dirty registers
 945          * have been copied to the old stack, the old stack may fail the
 946          * validation tests below.  So ia64_old_stack() must restore the dirty
 947          * registers from the new stack.  The old and new bspstore probably
 948          * have different alignments, so loadrs calculated on the old bsp
 949          * cannot be used to restore from the new bsp.  Calculate a suitable
 950          * loadrs for the new stack and save it in the new pt_regs, where
 951          * ia64_old_stack() can get it.
 952          */
 953         old_bspstore = (u64 *)ar_bspstore;
 954         old_bsp = (u64 *)ar_bsp;
 955         slots = ia64_rse_num_regs(old_bspstore, old_bsp);
 956         new_bspstore = (u64 *)((u64)current + IA64_RBS_OFFSET);
 957         new_bsp = ia64_rse_skip_regs(new_bspstore, slots);
 958         regs->loadrs = (new_bsp - new_bspstore) * 8 << 16;
 959
 960         /* Verify the previous stack state before we change it */
 961         if (user_mode(regs)) {
 962                 msg = "occurred in user space";
 963                 /* previous_current is guaranteed to be valid when the task was
 964                  * in user space, so ...
 965                  */
 966                 ia64_mca_modify_comm(previous_current);
 967                 goto no_mod;
 968         }
 969
 970         if (r13 != sos->prev_IA64_KR_CURRENT) {
 971                 msg = "inconsistent previous current and r13";
 972                 goto no_mod;
 973         }
 974
 975         if (!mca_recover_range(ms->pmsa_iip)) {
 976                 if ((r12 - r13) >= KERNEL_STACK_SIZE) {
 977                         msg = "inconsistent r12 and r13";
 978                         goto no_mod;
 979                 }
 980                 if ((ar_bspstore - r13) >= KERNEL_STACK_SIZE) {
 981                         msg = "inconsistent ar.bspstore and r13";
 982                         goto no_mod;
 983                 }
 984                 va.p = old_bspstore;
 985                 if (va.f.reg < 5) {
 986                         msg = "old_bspstore is in the wrong region";
 987                         goto no_mod;
 988                 }
 989                 if ((ar_bsp - r13) >= KERNEL_STACK_SIZE) {
 990                         msg = "inconsistent ar.bsp and r13";
 991                         goto no_mod;
 992                 }
 993                 size += (ia64_rse_skip_regs(old_bspstore, slots) - old_bspstore) * 8;
 994                 if (ar_bspstore + size > r12) {
 995                         msg = "no room for blocked state";
 996                         goto no_mod;
 997                 }
 998         }
 999
1000         ia64_mca_modify_comm(previous_current);
1001
1002         /* Make the original task look blocked.  First stack a struct pt_regs,
1003          * describing the state at the time of interrupt.  mca_asm.S built a
1004          * partial pt_regs, copy it and fill in the blanks using minstate.
1005          */
1006         p = (char *)r12 - sizeof(*regs);
1007         old_regs = (struct pt_regs *)p;
1008         memcpy(old_regs, regs, sizeof(*regs));
1009         /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use
1010          * pmsa_{xip,xpsr,xfs}
1011          */
1012         if (ia64_psr(regs)->ic) {
1013                 old_regs->cr_iip = ms->pmsa_iip;
1014                 old_regs->cr_ipsr = ms->pmsa_ipsr;
1015                 old_regs->cr_ifs = ms->pmsa_ifs;
1016         } else {
1017                 old_regs->cr_iip = ms->pmsa_xip;
1018                 old_regs->cr_ipsr = ms->pmsa_xpsr;
1019                 old_regs->cr_ifs = ms->pmsa_xfs;
1020         }
1021         old_regs->pr = ms->pmsa_pr;
1022         old_regs->b0 = ms->pmsa_br0;
1023         old_regs->loadrs = loadrs;
1024         old_regs->ar_rsc = ms->pmsa_rsc;
1025         old_unat = old_regs->ar_unat;
1026         copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &old_regs->r1, &old_unat);
1027         copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &old_regs->r2, &old_unat);
1028         copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &old_regs->r3, &old_unat);
1029         copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &old_regs->r8, &old_unat);
1030         copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &old_regs->r9, &old_unat);
1031         copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &old_regs->r10, &old_unat);
1032         copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &old_regs->r11, &old_unat);
1033         copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &old_regs->r12, &old_unat);
1034         copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &old_regs->r13, &old_unat);
1035         copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &old_regs->r14, &old_unat);
1036         copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &old_regs->r15, &old_unat);
1037         if (ia64_psr(old_regs)->bn)
1038                 bank = ms->pmsa_bank1_gr;
1039         else
1040                 bank = ms->pmsa_bank0_gr;
1041         copy_reg(&bank[16-16], ms->pmsa_nat_bits, &old_regs->r16, &old_unat);
1042         copy_reg(&bank[17-16], ms->pmsa_nat_bits, &old_regs->r17, &old_unat);
1043         copy_reg(&bank[18-16], ms->pmsa_nat_bits, &old_regs->r18, &old_unat);
1044         copy_reg(&bank[19-16], ms->pmsa_nat_bits, &old_regs->r19, &old_unat);
1045         copy_reg(&bank[20-16], ms->pmsa_nat_bits, &old_regs->r20, &old_unat);
1046         copy_reg(&bank[21-16], ms->pmsa_nat_bits, &old_regs->r21, &old_unat);
1047         copy_reg(&bank[22-16], ms->pmsa_nat_bits, &old_regs->r22, &old_unat);
1048         copy_reg(&bank[23-16], ms->pmsa_nat_bits, &old_regs->r23, &old_unat);
1049         copy_reg(&bank[24-16], ms->pmsa_nat_bits, &old_regs->r24, &old_unat);
1050         copy_reg(&bank[25-16], ms->pmsa_nat_bits, &old_regs->r25, &old_unat);
1051         copy_reg(&bank[26-16], ms->pmsa_nat_bits, &old_regs->r26, &old_unat);
1052         copy_reg(&bank[27-16], ms->pmsa_nat_bits, &old_regs->r27, &old_unat);
1053         copy_reg(&bank[28-16], ms->pmsa_nat_bits, &old_regs->r28, &old_unat);
1054         copy_reg(&bank[29-16], ms->pmsa_nat_bits, &old_regs->r29, &old_unat);
1055         copy_reg(&bank[30-16], ms->pmsa_nat_bits, &old_regs->r30, &old_unat);
1056         copy_reg(&bank[31-16], ms->pmsa_nat_bits, &old_regs->r31, &old_unat);
1057
1058         /* Next stack a struct switch_stack.  mca_asm.S built a partial
1059          * switch_stack, copy it and fill in the blanks using pt_regs and
1060          * minstate.
1061          *
1062          * In the synthesized switch_stack, b0 points to ia64_leave_kernel,
1063          * ar.pfs is set to 0.
1064          *
1065          * unwind.c::unw_unwind() does special processing for interrupt frames.
1066          * It checks if the PRED_NON_SYSCALL predicate is set, if the predicate
1067          * is clear then unw_unwind() does _not_ adjust bsp over pt_regs.  Not
1068          * that this is documented, of course.  Set PRED_NON_SYSCALL in the
1069          * switch_stack on the original stack so it will unwind correctly when
1070          * unwind.c reads pt_regs.
1071          *
1072          * thread.ksp is updated to point to the synthesized switch_stack.
1073          */
1074         p -= sizeof(struct switch_stack);
1075         old_sw = (struct switch_stack *)p;
1076         memcpy(old_sw, sw, sizeof(*sw));
1077         old_sw->caller_unat = old_unat;
1078         old_sw->ar_fpsr = old_regs->ar_fpsr;
1079         copy_reg(&ms->pmsa_gr[4-1], ms->pmsa_nat_bits, &old_sw->r4, &old_unat);
1080         copy_reg(&ms->pmsa_gr[5-1], ms->pmsa_nat_bits, &old_sw->r5, &old_unat);
1081         copy_reg(&ms->pmsa_gr[6-1], ms->pmsa_nat_bits, &old_sw->r6, &old_unat);
1082         copy_reg(&ms->pmsa_gr[7-1], ms->pmsa_nat_bits, &old_sw->r7, &old_unat);
1083         old_sw->b0 = (u64)ia64_leave_kernel;
1084         old_sw->b1 = ms->pmsa_br1;
1085         old_sw->ar_pfs = 0;
1086         old_sw->ar_unat = old_unat;
1087         old_sw->pr = old_regs->pr | (1UL << PRED_NON_SYSCALL);
1088         previous_current->thread.ksp = (u64)p - 16;
1089
1090         /* Finally copy the original stack's registers back to its RBS.
1091          * Registers from ar.bspstore through ar.bsp at the time of the event
1092          * are in the current RBS, copy them back to the original stack.  The
1093          * copy must be done register by register because the original bspstore
1094          * and the current one have different alignments, so the saved RNAT
1095          * data occurs at different places.
1096          *
1097          * mca_asm does cover, so the old_bsp already includes all registers at
1098          * the time of MCA/INIT.  It also does flushrs, so all registers before
1099          * this function have been written to backing store on the MCA/INIT
1100          * stack.
1101          */
1102         new_rnat = ia64_get_rnat(ia64_rse_rnat_addr(new_bspstore));
1103         old_rnat = regs->ar_rnat;
1104         while (slots--) {
1105                 if (ia64_rse_is_rnat_slot(new_bspstore)) {
1106                         new_rnat = ia64_get_rnat(new_bspstore++);
1107                 }
1108                 if (ia64_rse_is_rnat_slot(old_bspstore)) {
1109                         *old_bspstore++ = old_rnat;
1110                         old_rnat = 0;
1111                 }
1112                 nat = (new_rnat >> ia64_rse_slot_num(new_bspstore)) & 1UL;
1113                 old_rnat &= ~(1UL << ia64_rse_slot_num(old_bspstore));
1114                 old_rnat |= (nat << ia64_rse_slot_num(old_bspstore));
1115                 *old_bspstore++ = *new_bspstore++;
1116         }
1117         old_sw->ar_bspstore = (unsigned long)old_bspstore;
1118         old_sw->ar_rnat = old_rnat;
1119
1120         sos->prev_task = previous_current;
1121         return previous_current;
1122
1123 no_mod:
1124         printk(KERN_INFO "cpu %d, %s %s, original stack not modified\n",
1125                         smp_processor_id(), type, msg);
1126         return previous_current;
1127 }
1128
1129 /* The monarch/slave interaction is based on monarch_cpu and requires that all
1130  * slaves have entered rendezvous before the monarch leaves.  If any cpu has
1131  * not entered rendezvous yet then wait a bit.  The assumption is that any
1132  * slave that has not rendezvoused after a reasonable time is never going to do
1133  * so.  In this context, slave includes cpus that respond to the MCA rendezvous
1134  * interrupt, as well as cpus that receive the INIT slave event.
1135  */
1136
1137 static void
1138 ia64_wait_for_slaves(int monarch, const char *type)
1139 {
1140         int c, i , wait;
1141
1142         /*
1143          * wait 5 seconds total for slaves (arbitrary)
1144          */
1145         for (i = 0; i < 5000; i++) {
1146                 wait = 0;
1147                 for_each_online_cpu(c) {
1148                         if (c == monarch)
1149                                 continue;
1150                         if (ia64_mc_info.imi_rendez_checkin[c]
1151                                         == IA64_MCA_RENDEZ_CHECKIN_NOTDONE) {
1152                                 udelay(1000);           /* short wait */
1153                                 wait = 1;
1154                                 break;
1155                         }
1156                 }
1157                 if (!wait)
1158                         goto all_in;
1159         }
1160
1161         /*
1162          * Maybe slave(s) dead. Print buffered messages immediately.
1163          */
1164         ia64_mlogbuf_finish(0);
1165         mprintk(KERN_INFO "OS %s slave did not rendezvous on cpu", type);
1166         for_each_online_cpu(c) {
1167                 if (c == monarch)
1168                         continue;
1169                 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE)
1170                         mprintk(" %d", c);
1171         }
1172         mprintk("\n");
1173         return;
1174
1175 all_in:
1176         mprintk(KERN_INFO "All OS %s slaves have reached rendezvous\n", type);
1177         return;
1178 }
1179
1180 /*
1181  * ia64_mca_handler
1182  *
1183  *      This is uncorrectable machine check handler called from OS_MCA
1184  *      dispatch code which is in turn called from SAL_CHECK().
1185  *      This is the place where the core of OS MCA handling is done.
1186  *      Right now the logs are extracted and displayed in a well-defined
1187  *      format. This handler code is supposed to be run only on the
1188  *      monarch processor. Once the monarch is done with MCA handling
1189  *      further MCA logging is enabled by clearing logs.
1190  *      Monarch also has the duty of sending wakeup-IPIs to pull the
1191  *      slave processors out of rendezvous spinloop.
1192  *
1193  *      If multiple processors call into OS_MCA, the first will become
1194  *      the monarch.  Subsequent cpus will be recorded in the mca_cpu
1195  *      bitmask.  After the first monarch has processed its MCA, it
1196  *      will wake up the next cpu in the mca_cpu bitmask and then go
1197  *      into the rendezvous loop.  When all processors have serviced
1198  *      their MCA, the last monarch frees up the rest of the processors.
1199  */
1200 void
1201 ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1202                  struct ia64_sal_os_state *sos)
1203 {
1204         int recover, cpu = smp_processor_id();
1205         struct task_struct *previous_current;
1206         struct ia64_mca_notify_die nd =
1207                 { .sos = sos, .monarch_cpu = &monarch_cpu };
1208         static atomic_t mca_count;
1209         static cpumask_t mca_cpu;
1210
1211         if (atomic_add_return(1, &mca_count) == 1) {
1212                 monarch_cpu = cpu;
1213                 sos->monarch = 1;
1214         } else {
1215                 cpu_set(cpu, mca_cpu);
1216                 sos->monarch = 0;
1217         }
1218         mprintk(KERN_INFO "Entered OS MCA handler. PSP=%lx cpu=%d "
1219                 "monarch=%ld\n", sos->proc_state_param, cpu, sos->monarch);
1220
1221         previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "MCA");
1222
1223         if (notify_die(DIE_MCA_MONARCH_ENTER, "MCA", regs, (long)&nd, 0, 0)
1224                         == NOTIFY_STOP)
1225                 ia64_mca_spin(__FUNCTION__);
1226
1227         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA;
1228         if (sos->monarch) {
1229                 ia64_wait_for_slaves(cpu, "MCA");
1230
1231                 /* Wakeup all the processors which are spinning in the
1232                  * rendezvous loop.  They will leave SAL, then spin in the OS
1233                  * with interrupts disabled until this monarch cpu leaves the
1234                  * MCA handler.  That gets control back to the OS so we can
1235                  * backtrace the other cpus, backtrace when spinning in SAL
1236                  * does not work.
1237                  */
1238                 ia64_mca_wakeup_all();
1239                 if (notify_die(DIE_MCA_MONARCH_PROCESS, "MCA", regs, (long)&nd, 0, 0)
1240                                 == NOTIFY_STOP)
1241                         ia64_mca_spin(__FUNCTION__);
1242         } else {
1243                 while (cpu_isset(cpu, mca_cpu))
1244                         cpu_relax();    /* spin until monarch wakes us */
1245         }
1246
1247         /* Get the MCA error record and log it */
1248         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
1249
1250         /* MCA error recovery */
1251         recover = (ia64_mca_ucmc_extension
1252                 && ia64_mca_ucmc_extension(
1253                         IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA),
1254                         sos));
1255
1256         if (recover) {
1257                 sal_log_record_header_t *rh = IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA);
1258                 rh->severity = sal_log_severity_corrected;
1259                 ia64_sal_clear_state_info(SAL_INFO_TYPE_MCA);
1260                 sos->os_status = IA64_MCA_CORRECTED;
1261         } else {
1262                 /* Dump buffered message to console */
1263                 ia64_mlogbuf_finish(1);
1264 #ifdef CONFIG_KEXEC
1265                 atomic_set(&kdump_in_progress, 1);
1266                 monarch_cpu = -1;
1267 #endif
1268         }
1269         if (notify_die(DIE_MCA_MONARCH_LEAVE, "MCA", regs, (long)&nd, 0, recover)
1270                         == NOTIFY_STOP)
1271                 ia64_mca_spin(__FUNCTION__);
1272
1273
1274         if (atomic_dec_return(&mca_count) > 0) {
1275                 int i;
1276
1277                 /* wake up the next monarch cpu,
1278                  * and put this cpu in the rendez loop.
1279                  */
1280                 for_each_online_cpu(i) {
1281                         if (cpu_isset(i, mca_cpu)) {
1282                                 monarch_cpu = i;
1283                                 cpu_clear(i, mca_cpu);  /* wake next cpu */
1284                                 while (monarch_cpu != -1)
1285                                         cpu_relax();    /* spin until last cpu leaves */
1286                                 set_curr_task(cpu, previous_current);
1287                                 ia64_mc_info.imi_rendez_checkin[cpu]
1288                                                 = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1289                                 return;
1290                         }
1291                 }
1292         }
1293         set_curr_task(cpu, previous_current);
1294         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1295         monarch_cpu = -1;       /* This frees the slaves and previous monarchs */
1296 }
1297
1298 static DECLARE_WORK(cmc_disable_work, ia64_mca_cmc_vector_disable_keventd);
1299 static DECLARE_WORK(cmc_enable_work, ia64_mca_cmc_vector_enable_keventd);
1300
1301 /*
1302  * ia64_mca_cmc_int_handler
1303  *
1304  *  This is corrected machine check interrupt handler.
1305  *      Right now the logs are extracted and displayed in a well-defined
1306  *      format.
1307  *
1308  * Inputs
1309  *      interrupt number
1310  *      client data arg ptr
1311  *
1312  * Outputs
1313  *      None
1314  */
1315 static irqreturn_t
1316 ia64_mca_cmc_int_handler(int cmc_irq, void *arg)
1317 {
1318         static unsigned long    cmc_history[CMC_HISTORY_LENGTH];
1319         static int              index;
1320         static DEFINE_SPINLOCK(cmc_history_lock);
1321
1322         IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
1323                        __FUNCTION__, cmc_irq, smp_processor_id());
1324
1325         /* SAL spec states this should run w/ interrupts enabled */
1326         local_irq_enable();
1327
1328         spin_lock(&cmc_history_lock);
1329         if (!cmc_polling_enabled) {
1330                 int i, count = 1; /* we know 1 happened now */
1331                 unsigned long now = jiffies;
1332
1333                 for (i = 0; i < CMC_HISTORY_LENGTH; i++) {
1334                         if (now - cmc_history[i] <= HZ)
1335                                 count++;
1336                 }
1337
1338                 IA64_MCA_DEBUG(KERN_INFO "CMC threshold %d/%d\n", count, CMC_HISTORY_LENGTH);
1339                 if (count >= CMC_HISTORY_LENGTH) {
1340
1341                         cmc_polling_enabled = 1;
1342                         spin_unlock(&cmc_history_lock);
1343                         /* If we're being hit with CMC interrupts, we won't
1344                          * ever execute the schedule_work() below.  Need to
1345                          * disable CMC interrupts on this processor now.
1346                          */
1347                         ia64_mca_cmc_vector_disable(NULL);
1348                         schedule_work(&cmc_disable_work);
1349
1350                         /*
1351                          * Corrected errors will still be corrected, but
1352                          * make sure there's a log somewhere that indicates
1353                          * something is generating more than we can handle.
1354                          */
1355                         printk(KERN_WARNING "WARNING: Switching to polling CMC handler; error records may be lost\n");
1356
1357                         mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1358
1359                         /* lock already released, get out now */
1360                         goto out;
1361                 } else {
1362                         cmc_history[index++] = now;
1363                         if (index == CMC_HISTORY_LENGTH)
1364                                 index = 0;
1365                 }
1366         }
1367         spin_unlock(&cmc_history_lock);
1368 out:
1369         /* Get the CMC error record and log it */
1370         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CMC);
1371
1372         return IRQ_HANDLED;
1373 }
1374
1375 /*
1376  *  ia64_mca_cmc_int_caller
1377  *
1378  *      Triggered by sw interrupt from CMC polling routine.  Calls
1379  *      real interrupt handler and either triggers a sw interrupt
1380  *      on the next cpu or does cleanup at the end.
1381  *
1382  * Inputs
1383  *      interrupt number
1384  *      client data arg ptr
1385  * Outputs
1386  *      handled
1387  */
1388 static irqreturn_t
1389 ia64_mca_cmc_int_caller(int cmc_irq, void *arg)
1390 {
1391         static int start_count = -1;
1392         unsigned int cpuid;
1393
1394         cpuid = smp_processor_id();
1395
1396         /* If first cpu, update count */
1397         if (start_count == -1)
1398                 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CMC);
1399
1400         ia64_mca_cmc_int_handler(cmc_irq, arg);
1401
1402         for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1403
1404         if (cpuid < NR_CPUS) {
1405                 platform_send_ipi(cpuid, IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1406         } else {
1407                 /* If no log record, switch out of polling mode */
1408                 if (start_count == IA64_LOG_COUNT(SAL_INFO_TYPE_CMC)) {
1409
1410                         printk(KERN_WARNING "Returning to interrupt driven CMC handler\n");
1411                         schedule_work(&cmc_enable_work);
1412                         cmc_polling_enabled = 0;
1413
1414                 } else {
1415
1416                         mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1417                 }
1418
1419                 start_count = -1;
1420         }
1421
1422         return IRQ_HANDLED;
1423 }
1424
1425 /*
1426  *  ia64_mca_cmc_poll
1427  *
1428  *      Poll for Corrected Machine Checks (CMCs)
1429  *
1430  * Inputs   :   dummy(unused)
1431  * Outputs  :   None
1432  *
1433  */
1434 static void
1435 ia64_mca_cmc_poll (unsigned long dummy)
1436 {
1437         /* Trigger a CMC interrupt cascade  */
1438         platform_send_ipi(first_cpu(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1439 }
1440
1441 /*
1442  *  ia64_mca_cpe_int_caller
1443  *
1444  *      Triggered by sw interrupt from CPE polling routine.  Calls
1445  *      real interrupt handler and either triggers a sw interrupt
1446  *      on the next cpu or does cleanup at the end.
1447  *
1448  * Inputs
1449  *      interrupt number
1450  *      client data arg ptr
1451  * Outputs
1452  *      handled
1453  */
1454 #ifdef CONFIG_ACPI
1455
1456 static irqreturn_t
1457 ia64_mca_cpe_int_caller(int cpe_irq, void *arg)
1458 {
1459         static int start_count = -1;
1460         static int poll_time = MIN_CPE_POLL_INTERVAL;
1461         unsigned int cpuid;
1462
1463         cpuid = smp_processor_id();
1464
1465         /* If first cpu, update count */
1466         if (start_count == -1)
1467                 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CPE);
1468
1469         ia64_mca_cpe_int_handler(cpe_irq, arg);
1470
1471         for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1472
1473         if (cpuid < NR_CPUS) {
1474                 platform_send_ipi(cpuid, IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1475         } else {
1476                 /*
1477                  * If a log was recorded, increase our polling frequency,
1478                  * otherwise, backoff or return to interrupt mode.
1479                  */
1480                 if (start_count != IA64_LOG_COUNT(SAL_INFO_TYPE_CPE)) {
1481                         poll_time = max(MIN_CPE_POLL_INTERVAL, poll_time / 2);
1482                 } else if (cpe_vector < 0) {
1483                         poll_time = min(MAX_CPE_POLL_INTERVAL, poll_time * 2);
1484                 } else {
1485                         poll_time = MIN_CPE_POLL_INTERVAL;
1486
1487                         printk(KERN_WARNING "Returning to interrupt driven CPE handler\n");
1488                         enable_irq(local_vector_to_irq(IA64_CPE_VECTOR));
1489                         cpe_poll_enabled = 0;
1490                 }
1491
1492                 if (cpe_poll_enabled)
1493                         mod_timer(&cpe_poll_timer, jiffies + poll_time);
1494                 start_count = -1;
1495         }
1496
1497         return IRQ_HANDLED;
1498 }
1499
1500 /*
1501  *  ia64_mca_cpe_poll
1502  *
1503  *      Poll for Corrected Platform Errors (CPEs), trigger interrupt
1504  *      on first cpu, from there it will trickle through all the cpus.
1505  *
1506  * Inputs   :   dummy(unused)
1507  * Outputs  :   None
1508  *
1509  */
1510 static void
1511 ia64_mca_cpe_poll (unsigned long dummy)
1512 {
1513         /* Trigger a CPE interrupt cascade  */
1514         platform_send_ipi(first_cpu(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1515 }
1516
1517 #endif /* CONFIG_ACPI */
1518
1519 static int
1520 default_monarch_init_process(struct notifier_block *self, unsigned long val, void *data)
1521 {
1522         int c;
1523         struct task_struct *g, *t;
1524         if (val != DIE_INIT_MONARCH_PROCESS)
1525                 return NOTIFY_DONE;
1526 #ifdef CONFIG_KEXEC
1527         if (atomic_read(&kdump_in_progress))
1528                 return NOTIFY_DONE;
1529 #endif
1530
1531         /*
1532          * FIXME: mlogbuf will brim over with INIT stack dumps.
1533          * To enable show_stack from INIT, we use oops_in_progress which should
1534          * be used in real oops. This would cause something wrong after INIT.
1535          */
1536         BREAK_LOGLEVEL(console_loglevel);
1537         ia64_mlogbuf_dump_from_init();
1538
1539         printk(KERN_ERR "Processes interrupted by INIT -");
1540         for_each_online_cpu(c) {
1541                 struct ia64_sal_os_state *s;
1542                 t = __va(__per_cpu_mca[c] + IA64_MCA_CPU_INIT_STACK_OFFSET);
1543                 s = (struct ia64_sal_os_state *)((char *)t + MCA_SOS_OFFSET);
1544                 g = s->prev_task;
1545                 if (g) {
1546                         if (g->pid)
1547                                 printk(" %d", g->pid);
1548                         else
1549                                 printk(" %d (cpu %d task 0x%p)", g->pid, task_cpu(g), g);
1550                 }
1551         }
1552         printk("\n\n");
1553         if (read_trylock(&tasklist_lock)) {
1554                 do_each_thread (g, t) {
1555                         printk("\nBacktrace of pid %d (%s)\n", t->pid, t->comm);
1556                         show_stack(t, NULL);
1557                 } while_each_thread (g, t);
1558                 read_unlock(&tasklist_lock);
1559         }
1560         /* FIXME: This will not restore zapped printk locks. */
1561         RESTORE_LOGLEVEL(console_loglevel);
1562         return NOTIFY_DONE;
1563 }
1564
1565 /*
1566  * C portion of the OS INIT handler
1567  *
1568  * Called from ia64_os_init_dispatch
1569  *
1570  * Inputs: pointer to pt_regs where processor info was saved.  SAL/OS state for
1571  * this event.  This code is used for both monarch and slave INIT events, see
1572  * sos->monarch.
1573  *
1574  * All INIT events switch to the INIT stack and change the previous process to
1575  * blocked status.  If one of the INIT events is the monarch then we are
1576  * probably processing the nmi button/command.  Use the monarch cpu to dump all
1577  * the processes.  The slave INIT events all spin until the monarch cpu
1578  * returns.  We can also get INIT slave events for MCA, in which case the MCA
1579  * process is the monarch.
1580  */
1581
1582 void
1583 ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
1584                   struct ia64_sal_os_state *sos)
1585 {
1586         static atomic_t slaves;
1587         static atomic_t monarchs;
1588         struct task_struct *previous_current;
1589         int cpu = smp_processor_id();
1590         struct ia64_mca_notify_die nd =
1591                 { .sos = sos, .monarch_cpu = &monarch_cpu };
1592
1593         (void) notify_die(DIE_INIT_ENTER, "INIT", regs, (long)&nd, 0, 0);
1594
1595         mprintk(KERN_INFO "Entered OS INIT handler. PSP=%lx cpu=%d monarch=%ld\n",
1596                 sos->proc_state_param, cpu, sos->monarch);
1597         salinfo_log_wakeup(SAL_INFO_TYPE_INIT, NULL, 0, 0);
1598
1599         previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "INIT");
1600         sos->os_status = IA64_INIT_RESUME;
1601
1602         /* FIXME: Workaround for broken proms that drive all INIT events as
1603          * slaves.  The last slave that enters is promoted to be a monarch.
1604          * Remove this code in September 2006, that gives platforms a year to
1605          * fix their proms and get their customers updated.
1606          */
1607         if (!sos->monarch && atomic_add_return(1, &slaves) == num_online_cpus()) {
1608                 mprintk(KERN_WARNING "%s: Promoting cpu %d to monarch.\n",
1609                        __FUNCTION__, cpu);
1610                 atomic_dec(&slaves);
1611                 sos->monarch = 1;
1612         }
1613
1614         /* FIXME: Workaround for broken proms that drive all INIT events as
1615          * monarchs.  Second and subsequent monarchs are demoted to slaves.
1616          * Remove this code in September 2006, that gives platforms a year to
1617          * fix their proms and get their customers updated.
1618          */
1619         if (sos->monarch && atomic_add_return(1, &monarchs) > 1) {
1620                 mprintk(KERN_WARNING "%s: Demoting cpu %d to slave.\n",
1621                                __FUNCTION__, cpu);
1622                 atomic_dec(&monarchs);
1623                 sos->monarch = 0;
1624         }
1625
1626         if (!sos->monarch) {
1627                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT;
1628                 while (monarch_cpu == -1)
1629                        cpu_relax();     /* spin until monarch enters */
1630                 if (notify_die(DIE_INIT_SLAVE_ENTER, "INIT", regs, (long)&nd, 0, 0)
1631                                 == NOTIFY_STOP)
1632                         ia64_mca_spin(__FUNCTION__);
1633                 if (notify_die(DIE_INIT_SLAVE_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1634                                 == NOTIFY_STOP)
1635                         ia64_mca_spin(__FUNCTION__);
1636                 while (monarch_cpu != -1)
1637                        cpu_relax();     /* spin until monarch leaves */
1638                 if (notify_die(DIE_INIT_SLAVE_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1639                                 == NOTIFY_STOP)
1640                         ia64_mca_spin(__FUNCTION__);
1641                 mprintk("Slave on cpu %d returning to normal service.\n", cpu);
1642                 set_curr_task(cpu, previous_current);
1643                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1644                 atomic_dec(&slaves);
1645                 return;
1646         }
1647
1648         monarch_cpu = cpu;
1649         if (notify_die(DIE_INIT_MONARCH_ENTER, "INIT", regs, (long)&nd, 0, 0)
1650                         == NOTIFY_STOP)
1651                 ia64_mca_spin(__FUNCTION__);
1652
1653         /*
1654          * Wait for a bit.  On some machines (e.g., HP's zx2000 and zx6000, INIT can be
1655          * generated via the BMC's command-line interface, but since the console is on the
1656          * same serial line, the user will need some time to switch out of the BMC before
1657          * the dump begins.
1658          */
1659         mprintk("Delaying for 5 seconds...\n");
1660         udelay(5*1000000);
1661         ia64_wait_for_slaves(cpu, "INIT");
1662         /* If nobody intercepts DIE_INIT_MONARCH_PROCESS then we drop through
1663          * to default_monarch_init_process() above and just print all the
1664          * tasks.
1665          */
1666         if (notify_die(DIE_INIT_MONARCH_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1667                         == NOTIFY_STOP)
1668                 ia64_mca_spin(__FUNCTION__);
1669         if (notify_die(DIE_INIT_MONARCH_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1670                         == NOTIFY_STOP)
1671                 ia64_mca_spin(__FUNCTION__);
1672         mprintk("\nINIT dump complete.  Monarch on cpu %d returning to normal service.\n", cpu);
1673         atomic_dec(&monarchs);
1674         set_curr_task(cpu, previous_current);
1675         monarch_cpu = -1;
1676         return;
1677 }
1678
1679 static int __init
1680 ia64_mca_disable_cpe_polling(char *str)
1681 {
1682         cpe_poll_enabled = 0;
1683         return 1;
1684 }
1685
1686 __setup("disable_cpe_poll", ia64_mca_disable_cpe_polling);
1687
1688 static struct irqaction cmci_irqaction = {
1689         .handler =      ia64_mca_cmc_int_handler,
1690         .flags =        IRQF_DISABLED,
1691         .name =         "cmc_hndlr"
1692 };
1693
1694 static struct irqaction cmcp_irqaction = {
1695         .handler =      ia64_mca_cmc_int_caller,
1696         .flags =        IRQF_DISABLED,
1697         .name =         "cmc_poll"
1698 };
1699
1700 static struct irqaction mca_rdzv_irqaction = {
1701         .handler =      ia64_mca_rendez_int_handler,
1702         .flags =        IRQF_DISABLED,
1703         .name =         "mca_rdzv"
1704 };
1705
1706 static struct irqaction mca_wkup_irqaction = {
1707         .handler =      ia64_mca_wakeup_int_handler,
1708         .flags =        IRQF_DISABLED,
1709         .name =         "mca_wkup"
1710 };
1711
1712 #ifdef CONFIG_ACPI
1713 static struct irqaction mca_cpe_irqaction = {
1714         .handler =      ia64_mca_cpe_int_handler,
1715         .flags =        IRQF_DISABLED,
1716         .name =         "cpe_hndlr"
1717 };
1718
1719 static struct irqaction mca_cpep_irqaction = {
1720         .handler =      ia64_mca_cpe_int_caller,
1721         .flags =        IRQF_DISABLED,
1722         .name =         "cpe_poll"
1723 };
1724 #endif /* CONFIG_ACPI */
1725
1726 /* Minimal format of the MCA/INIT stacks.  The pseudo processes that run on
1727  * these stacks can never sleep, they cannot return from the kernel to user
1728  * space, they do not appear in a normal ps listing.  So there is no need to
1729  * format most of the fields.
1730  */
1731
1732 static void __cpuinit
1733 format_mca_init_stack(void *mca_data, unsigned long offset,
1734                 const char *type, int cpu)
1735 {
1736         struct task_struct *p = (struct task_struct *)((char *)mca_data + offset);
1737         struct thread_info *ti;
1738         memset(p, 0, KERNEL_STACK_SIZE);
1739         ti = task_thread_info(p);
1740         ti->flags = _TIF_MCA_INIT;
1741         ti->preempt_count = 1;
1742         ti->task = p;
1743         ti->cpu = cpu;
1744         p->stack = ti;
1745         p->state = TASK_UNINTERRUPTIBLE;
1746         cpu_set(cpu, p->cpus_allowed);
1747         INIT_LIST_HEAD(&p->tasks);
1748         p->parent = p->real_parent = p->group_leader = p;
1749         INIT_LIST_HEAD(&p->children);
1750         INIT_LIST_HEAD(&p->sibling);
1751         strncpy(p->comm, type, sizeof(p->comm)-1);
1752 }
1753
1754 /* Caller prevents this from being called after init */
1755 static void * __init_refok mca_bootmem(void)
1756 {
1757         void *p;
1758
1759         p = alloc_bootmem(sizeof(struct ia64_mca_cpu) * NR_CPUS +
1760                           KERNEL_STACK_SIZE);
1761         return (void *)ALIGN((unsigned long)p, KERNEL_STACK_SIZE);
1762 }
1763
1764 /* Do per-CPU MCA-related initialization.  */
1765 void __cpuinit
1766 ia64_mca_cpu_init(void *cpu_data)
1767 {
1768         void *pal_vaddr;
1769         static int first_time = 1;
1770
1771         if (first_time) {
1772                 void *mca_data;
1773                 int cpu;
1774
1775                 first_time = 0;
1776                 mca_data = mca_bootmem();
1777                 for (cpu = 0; cpu < NR_CPUS; cpu++) {
1778                         format_mca_init_stack(mca_data,
1779                                         offsetof(struct ia64_mca_cpu, mca_stack),
1780                                         "MCA", cpu);
1781                         format_mca_init_stack(mca_data,
1782                                         offsetof(struct ia64_mca_cpu, init_stack),
1783                                         "INIT", cpu);
1784                         __per_cpu_mca[cpu] = __pa(mca_data);
1785                         mca_data += sizeof(struct ia64_mca_cpu);
1786                 }
1787         }
1788
1789         /*
1790          * The MCA info structure was allocated earlier and its
1791          * physical address saved in __per_cpu_mca[cpu].  Copy that
1792          * address * to ia64_mca_data so we can access it as a per-CPU
1793          * variable.
1794          */
1795         __get_cpu_var(ia64_mca_data) = __per_cpu_mca[smp_processor_id()];
1796
1797         /*
1798          * Stash away a copy of the PTE needed to map the per-CPU page.
1799          * We may need it during MCA recovery.
1800          */
1801         __get_cpu_var(ia64_mca_per_cpu_pte) =
1802                 pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL));
1803
1804         /*
1805          * Also, stash away a copy of the PAL address and the PTE
1806          * needed to map it.
1807          */
1808         pal_vaddr = efi_get_pal_addr();
1809         if (!pal_vaddr)
1810                 return;
1811         __get_cpu_var(ia64_mca_pal_base) =
1812                 GRANULEROUNDDOWN((unsigned long) pal_vaddr);
1813         __get_cpu_var(ia64_mca_pal_pte) = pte_val(mk_pte_phys(__pa(pal_vaddr),
1814                                                               PAGE_KERNEL));
1815 }
1816
1817 static void __cpuinit ia64_mca_cmc_vector_adjust(void *dummy)
1818 {
1819         unsigned long flags;
1820
1821         local_irq_save(flags);
1822         if (!cmc_polling_enabled)
1823                 ia64_mca_cmc_vector_enable(NULL);
1824         local_irq_restore(flags);
1825 }
1826
1827 static int __cpuinit mca_cpu_callback(struct notifier_block *nfb,
1828                                       unsigned long action,
1829                                       void *hcpu)
1830 {
1831         int hotcpu = (unsigned long) hcpu;
1832
1833         switch (action) {
1834         case CPU_ONLINE:
1835         case CPU_ONLINE_FROZEN:
1836                 smp_call_function_single(hotcpu, ia64_mca_cmc_vector_adjust,
1837                                          NULL, 1, 0);
1838                 break;
1839         }
1840         return NOTIFY_OK;
1841 }
1842
1843 static struct notifier_block mca_cpu_notifier __cpuinitdata = {
1844         .notifier_call = mca_cpu_callback
1845 };
1846
1847 /*
1848  * ia64_mca_init
1849  *
1850  *  Do all the system level mca specific initialization.
1851  *
1852  *      1. Register spinloop and wakeup request interrupt vectors
1853  *
1854  *      2. Register OS_MCA handler entry point
1855  *
1856  *      3. Register OS_INIT handler entry point
1857  *
1858  *  4. Initialize MCA/CMC/INIT related log buffers maintained by the OS.
1859  *
1860  *  Note that this initialization is done very early before some kernel
1861  *  services are available.
1862  *
1863  *  Inputs  :   None
1864  *
1865  *  Outputs :   None
1866  */
1867 void __init
1868 ia64_mca_init(void)
1869 {
1870         ia64_fptr_t *init_hldlr_ptr_monarch = (ia64_fptr_t *)ia64_os_init_dispatch_monarch;
1871         ia64_fptr_t *init_hldlr_ptr_slave = (ia64_fptr_t *)ia64_os_init_dispatch_slave;
1872         ia64_fptr_t *mca_hldlr_ptr = (ia64_fptr_t *)ia64_os_mca_dispatch;
1873         int i;
1874         s64 rc;
1875         struct ia64_sal_retval isrv;
1876         u64 timeout = IA64_MCA_RENDEZ_TIMEOUT;  /* platform specific */
1877         static struct notifier_block default_init_monarch_nb = {
1878                 .notifier_call = default_monarch_init_process,
1879                 .priority = 0/* we need to notified last */
1880         };
1881
1882         IA64_MCA_DEBUG("%s: begin\n", __FUNCTION__);
1883
1884         /* Clear the Rendez checkin flag for all cpus */
1885         for(i = 0 ; i < NR_CPUS; i++)
1886                 ia64_mc_info.imi_rendez_checkin[i] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1887
1888         /*
1889          * Register the rendezvous spinloop and wakeup mechanism with SAL
1890          */
1891
1892         /* Register the rendezvous interrupt vector with SAL */
1893         while (1) {
1894                 isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_INT,
1895                                               SAL_MC_PARAM_MECHANISM_INT,
1896                                               IA64_MCA_RENDEZ_VECTOR,
1897                                               timeout,
1898                                               SAL_MC_PARAM_RZ_ALWAYS);
1899                 rc = isrv.status;
1900                 if (rc == 0)
1901                         break;
1902                 if (rc == -2) {
1903                         printk(KERN_INFO "Increasing MCA rendezvous timeout from "
1904                                 "%ld to %ld milliseconds\n", timeout, isrv.v0);
1905                         timeout = isrv.v0;
1906                         (void) notify_die(DIE_MCA_NEW_TIMEOUT, "MCA", NULL, timeout, 0, 0);
1907                         continue;
1908                 }
1909                 printk(KERN_ERR "Failed to register rendezvous interrupt "
1910                        "with SAL (status %ld)\n", rc);
1911                 return;
1912         }
1913
1914         /* Register the wakeup interrupt vector with SAL */
1915         isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_WAKEUP,
1916                                       SAL_MC_PARAM_MECHANISM_INT,
1917                                       IA64_MCA_WAKEUP_VECTOR,
1918                                       0, 0);
1919         rc = isrv.status;
1920         if (rc) {
1921                 printk(KERN_ERR "Failed to register wakeup interrupt with SAL "
1922                        "(status %ld)\n", rc);
1923                 return;
1924         }
1925
1926         IA64_MCA_DEBUG("%s: registered MCA rendezvous spinloop and wakeup mech.\n", __FUNCTION__);
1927
1928         ia64_mc_info.imi_mca_handler        = ia64_tpa(mca_hldlr_ptr->fp);
1929         /*
1930          * XXX - disable SAL checksum by setting size to 0; should be
1931          *      ia64_tpa(ia64_os_mca_dispatch_end) - ia64_tpa(ia64_os_mca_dispatch);
1932          */
1933         ia64_mc_info.imi_mca_handler_size       = 0;
1934
1935         /* Register the os mca handler with SAL */
1936         if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_MCA,
1937                                        ia64_mc_info.imi_mca_handler,
1938                                        ia64_tpa(mca_hldlr_ptr->gp),
1939                                        ia64_mc_info.imi_mca_handler_size,
1940                                        0, 0, 0)))
1941         {
1942                 printk(KERN_ERR "Failed to register OS MCA handler with SAL "
1943                        "(status %ld)\n", rc);
1944                 return;
1945         }
1946
1947         IA64_MCA_DEBUG("%s: registered OS MCA handler with SAL at 0x%lx, gp = 0x%lx\n", __FUNCTION__,
1948                        ia64_mc_info.imi_mca_handler, ia64_tpa(mca_hldlr_ptr->gp));
1949
1950         /*
1951          * XXX - disable SAL checksum by setting size to 0, should be
1952          * size of the actual init handler in mca_asm.S.
1953          */
1954         ia64_mc_info.imi_monarch_init_handler           = ia64_tpa(init_hldlr_ptr_monarch->fp);
1955         ia64_mc_info.imi_monarch_init_handler_size      = 0;
1956         ia64_mc_info.imi_slave_init_handler             = ia64_tpa(init_hldlr_ptr_slave->fp);
1957         ia64_mc_info.imi_slave_init_handler_size        = 0;
1958
1959         IA64_MCA_DEBUG("%s: OS INIT handler at %lx\n", __FUNCTION__,
1960                        ia64_mc_info.imi_monarch_init_handler);
1961
1962         /* Register the os init handler with SAL */
1963         if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_INIT,
1964                                        ia64_mc_info.imi_monarch_init_handler,
1965                                        ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1966                                        ia64_mc_info.imi_monarch_init_handler_size,
1967                                        ia64_mc_info.imi_slave_init_handler,
1968                                        ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1969                                        ia64_mc_info.imi_slave_init_handler_size)))
1970         {
1971                 printk(KERN_ERR "Failed to register m/s INIT handlers with SAL "
1972                        "(status %ld)\n", rc);
1973                 return;
1974         }
1975         if (register_die_notifier(&default_init_monarch_nb)) {
1976                 printk(KERN_ERR "Failed to register default monarch INIT process\n");
1977                 return;
1978         }
1979
1980         IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __FUNCTION__);
1981
1982         /*
1983          *  Configure the CMCI/P vector and handler. Interrupts for CMC are
1984          *  per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).
1985          */
1986         register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
1987         register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
1988         ia64_mca_cmc_vector_setup();       /* Setup vector on BSP */
1989
1990         /* Setup the MCA rendezvous interrupt vector */
1991         register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
1992
1993         /* Setup the MCA wakeup interrupt vector */
1994         register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);
1995
1996 #ifdef CONFIG_ACPI
1997         /* Setup the CPEI/P handler */
1998         register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
1999 #endif
2000
2001         /* Initialize the areas set aside by the OS to buffer the
2002          * platform/processor error states for MCA/INIT/CMC
2003          * handling.
2004          */
2005         ia64_log_init(SAL_INFO_TYPE_MCA);
2006         ia64_log_init(SAL_INFO_TYPE_INIT);
2007         ia64_log_init(SAL_INFO_TYPE_CMC);
2008         ia64_log_init(SAL_INFO_TYPE_CPE);
2009
2010         mca_init = 1;
2011         printk(KERN_INFO "MCA related initialization done\n");
2012 }
2013
2014 /*
2015  * ia64_mca_late_init
2016  *
2017  *      Opportunity to setup things that require initialization later
2018  *      than ia64_mca_init.  Setup a timer to poll for CPEs if the
2019  *      platform doesn't support an interrupt driven mechanism.
2020  *
2021  *  Inputs  :   None
2022  *  Outputs :   Status
2023  */
2024 static int __init
2025 ia64_mca_late_init(void)
2026 {
2027         if (!mca_init)
2028                 return 0;
2029
2030         register_hotcpu_notifier(&mca_cpu_notifier);
2031
2032         /* Setup the CMCI/P vector and handler */
2033         init_timer(&cmc_poll_timer);
2034         cmc_poll_timer.function = ia64_mca_cmc_poll;
2035
2036         /* Unmask/enable the vector */
2037         cmc_polling_enabled = 0;
2038         schedule_work(&cmc_enable_work);
2039
2040         IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __FUNCTION__);
2041
2042 #ifdef CONFIG_ACPI
2043         /* Setup the CPEI/P vector and handler */
2044         cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
2045         init_timer(&cpe_poll_timer);
2046         cpe_poll_timer.function = ia64_mca_cpe_poll;
2047
2048         {
2049                 irq_desc_t *desc;
2050                 unsigned int irq;
2051
2052                 if (cpe_vector >= 0) {
2053                         /* If platform supports CPEI, enable the irq. */
2054                         irq = local_vector_to_irq(cpe_vector);
2055                         if (irq > 0) {
2056                                 cpe_poll_enabled = 0;
2057                                 desc = irq_desc + irq;
2058                                 desc->status |= IRQ_PER_CPU;
2059                                 setup_irq(irq, &mca_cpe_irqaction);
2060                                 ia64_cpe_irq = irq;
2061                                 ia64_mca_register_cpev(cpe_vector);
2062                                 IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n",
2063                                         __FUNCTION__);
2064                                 return 0;
2065                         }
2066                         printk(KERN_ERR "%s: Failed to find irq for CPE "
2067                                         "interrupt handler, vector %d\n",
2068                                         __FUNCTION__, cpe_vector);
2069                 }
2070                 /* If platform doesn't support CPEI, get the timer going. */
2071                 if (cpe_poll_enabled) {
2072                         ia64_mca_cpe_poll(0UL);
2073                         IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
2074                 }
2075         }
2076 #endif
2077
2078         return 0;
2079 }
2080
2081 device_initcall(ia64_mca_late_init);