2 * linux/arch/m68k/kernel/traps.c
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
18 * Sets up all exception vectors
21 #include <linux/config.h>
22 #include <linux/sched.h>
23 #include <linux/signal.h>
24 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/a.out.h>
28 #include <linux/user.h>
29 #include <linux/string.h>
30 #include <linux/linkage.h>
31 #include <linux/init.h>
32 #include <linux/ptrace.h>
33 #include <linux/kallsyms.h>
35 #include <asm/setup.h>
37 #include <asm/system.h>
38 #include <asm/uaccess.h>
39 #include <asm/traps.h>
40 #include <asm/pgalloc.h>
41 #include <asm/machdep.h>
42 #include <asm/siginfo.h>
44 /* assembler routines */
45 asmlinkage void system_call(void);
46 asmlinkage void buserr(void);
47 asmlinkage void trap(void);
48 asmlinkage void nmihandler(void);
49 #ifdef CONFIG_M68KFPU_EMU
50 asmlinkage void fpu_emu(void);
53 e_vector vectors[256] = {
54 [VEC_BUSERR] = buserr,
55 [VEC_SYS] = system_call,
58 /* nmi handler for the Amiga */
64 * this must be called very early as the kernel might
65 * use some instruction that are emulated on the 060
67 void __init base_trap_init(void)
70 extern e_vector *sun3x_prom_vbr;
72 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
75 /* setup the exception vector table */
76 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
79 /* set up ISP entry points */
80 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
82 vectors[VEC_UNIMPII] = unimp_vec;
86 void __init trap_init (void)
90 vectors[VEC_SPUR] = bad_inthandler;
91 for (i = VEC_INT1; i <= VEC_INT7; i++)
92 vectors[i] = auto_inthandler;
94 for (i = 0; i < VEC_USER; i++)
98 for (i = VEC_USER; i < 256; i++)
99 vectors[i] = mach_inthandler;
101 #ifdef CONFIG_M68KFPU_EMU
103 vectors[VEC_LINE11] = fpu_emu;
106 if (CPU_IS_040 && !FPU_IS_EMU) {
107 /* set up FPSP entry points */
108 asmlinkage void dz_vec(void) asm ("dz");
109 asmlinkage void inex_vec(void) asm ("inex");
110 asmlinkage void ovfl_vec(void) asm ("ovfl");
111 asmlinkage void unfl_vec(void) asm ("unfl");
112 asmlinkage void snan_vec(void) asm ("snan");
113 asmlinkage void operr_vec(void) asm ("operr");
114 asmlinkage void bsun_vec(void) asm ("bsun");
115 asmlinkage void fline_vec(void) asm ("fline");
116 asmlinkage void unsupp_vec(void) asm ("unsupp");
118 vectors[VEC_FPDIVZ] = dz_vec;
119 vectors[VEC_FPIR] = inex_vec;
120 vectors[VEC_FPOVER] = ovfl_vec;
121 vectors[VEC_FPUNDER] = unfl_vec;
122 vectors[VEC_FPNAN] = snan_vec;
123 vectors[VEC_FPOE] = operr_vec;
124 vectors[VEC_FPBRUC] = bsun_vec;
125 vectors[VEC_LINE11] = fline_vec;
126 vectors[VEC_FPUNSUP] = unsupp_vec;
129 if (CPU_IS_060 && !FPU_IS_EMU) {
130 /* set up IFPSP entry points */
131 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
132 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
133 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
134 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
135 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
136 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
137 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
138 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
139 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
141 vectors[VEC_FPNAN] = snan_vec6;
142 vectors[VEC_FPOE] = operr_vec6;
143 vectors[VEC_FPOVER] = ovfl_vec6;
144 vectors[VEC_FPUNDER] = unfl_vec6;
145 vectors[VEC_FPDIVZ] = dz_vec6;
146 vectors[VEC_FPIR] = inex_vec6;
147 vectors[VEC_LINE11] = fline_vec6;
148 vectors[VEC_FPUNSUP] = unsupp_vec6;
149 vectors[VEC_UNIMPEA] = effadd_vec6;
152 /* if running on an amiga, make the NMI interrupt do nothing */
154 vectors[VEC_INT7] = nmihandler;
159 static const char *vec_names[] = {
160 [VEC_RESETSP] = "RESET SP",
161 [VEC_RESETPC] = "RESET PC",
162 [VEC_BUSERR] = "BUS ERROR",
163 [VEC_ADDRERR] = "ADDRESS ERROR",
164 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
165 [VEC_ZERODIV] = "ZERO DIVIDE",
167 [VEC_TRAP] = "TRAPcc",
168 [VEC_PRIV] = "PRIVILEGE VIOLATION",
169 [VEC_TRACE] = "TRACE",
170 [VEC_LINE10] = "LINE 1010",
171 [VEC_LINE11] = "LINE 1111",
172 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
173 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
174 [VEC_FORMAT] = "FORMAT ERROR",
175 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
176 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
177 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
178 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
179 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
180 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
181 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
182 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
183 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
184 [VEC_SPUR] = "SPURIOUS INTERRUPT",
185 [VEC_INT1] = "LEVEL 1 INT",
186 [VEC_INT2] = "LEVEL 2 INT",
187 [VEC_INT3] = "LEVEL 3 INT",
188 [VEC_INT4] = "LEVEL 4 INT",
189 [VEC_INT5] = "LEVEL 5 INT",
190 [VEC_INT6] = "LEVEL 6 INT",
191 [VEC_INT7] = "LEVEL 7 INT",
192 [VEC_SYS] = "SYSCALL",
193 [VEC_TRAP1] = "TRAP #1",
194 [VEC_TRAP2] = "TRAP #2",
195 [VEC_TRAP3] = "TRAP #3",
196 [VEC_TRAP4] = "TRAP #4",
197 [VEC_TRAP5] = "TRAP #5",
198 [VEC_TRAP6] = "TRAP #6",
199 [VEC_TRAP7] = "TRAP #7",
200 [VEC_TRAP8] = "TRAP #8",
201 [VEC_TRAP9] = "TRAP #9",
202 [VEC_TRAP10] = "TRAP #10",
203 [VEC_TRAP11] = "TRAP #11",
204 [VEC_TRAP12] = "TRAP #12",
205 [VEC_TRAP13] = "TRAP #13",
206 [VEC_TRAP14] = "TRAP #14",
207 [VEC_TRAP15] = "TRAP #15",
208 [VEC_FPBRUC] = "FPCP BSUN",
209 [VEC_FPIR] = "FPCP INEXACT",
210 [VEC_FPDIVZ] = "FPCP DIV BY 0",
211 [VEC_FPUNDER] = "FPCP UNDERFLOW",
212 [VEC_FPOE] = "FPCP OPERAND ERROR",
213 [VEC_FPOVER] = "FPCP OVERFLOW",
214 [VEC_FPNAN] = "FPCP SNAN",
215 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
216 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
217 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
218 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
219 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
220 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
221 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
222 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
223 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
226 static const char *space_names[] = {
228 [USER_DATA] = "User Data",
229 [USER_PROGRAM] = "User Program",
233 [FC_CONTROL] = "Control",
236 [SUPER_DATA] = "Super Data",
237 [SUPER_PROGRAM] = "Super Program",
241 void die_if_kernel(char *,struct pt_regs *,int);
242 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
243 unsigned long error_code);
244 int send_fault_sig(struct pt_regs *regs);
246 asmlinkage void trap_c(struct frame *fp);
248 #if defined (CONFIG_M68060)
249 static inline void access_error060 (struct frame *fp)
251 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
254 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
257 if (fslw & MMU060_BPE) {
258 /* branch prediction error -> clear branch cache */
259 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
260 "orl #0x00400000,%/d0\n\t"
263 /* return if there's no other error */
264 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
268 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
269 unsigned long errorcode;
270 unsigned long addr = fp->un.fmt4.effaddr;
272 if (fslw & MMU060_MA)
273 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
276 if (fslw & MMU060_DESC_ERR) {
277 __flush_tlb040_one(addr);
283 printk("errorcode = %d\n", errorcode );
285 do_page_fault(&fp->ptregs, addr, errorcode);
286 } else if (fslw & (MMU060_SEE)){
287 /* Software Emulation Error.
288 * fault during mem_read/mem_write in ifpsp060/os.S
290 send_fault_sig(&fp->ptregs);
291 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
292 send_fault_sig(&fp->ptregs) > 0) {
293 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
294 printk( "68060 access error, fslw=%lx\n", fslw );
298 #endif /* CONFIG_M68060 */
300 #if defined (CONFIG_M68040)
301 static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
304 mm_segment_t old_fs = get_fs();
306 set_fs(MAKE_MM_SEG(wbs));
309 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
311 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
313 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
320 static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
324 mm_segment_t old_fs = get_fs();
326 /* set_fs can not be moved, otherwise put_user() may oops */
327 set_fs(MAKE_MM_SEG(wbs));
329 switch (wbs & WBSIZ_040) {
331 res = put_user(wbd & 0xff, (char *)wba);
334 res = put_user(wbd & 0xffff, (short *)wba);
337 res = put_user(wbd, (int *)wba);
341 /* set_fs can not be moved, otherwise put_user() may oops */
346 printk("do_040writeback1, res=%d\n",res);
352 /* after an exception in a writeback the stack frame corresponding
353 * to that exception is discarded, set a few bits in the old frame
354 * to simulate what it should look like
356 static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
358 fp->un.fmt7.faddr = wba;
359 fp->un.fmt7.ssw = wbs & 0xff;
360 if (wba != current->thread.faddr)
361 fp->un.fmt7.ssw |= MA_040;
364 static inline void do_040writebacks(struct frame *fp)
368 if (fp->un.fmt7.wb1s & WBV_040)
369 printk("access_error040: cannot handle 1st writeback. oops.\n");
372 if ((fp->un.fmt7.wb2s & WBV_040) &&
373 !(fp->un.fmt7.wb2s & WBTT_040)) {
374 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
377 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
379 fp->un.fmt7.wb2s = 0;
382 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
383 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
384 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
388 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
390 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
391 fp->un.fmt7.wb3s &= (~WBV_040);
392 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
393 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
396 fp->un.fmt7.wb3s = 0;
400 send_fault_sig(&fp->ptregs);
404 * called from sigreturn(), must ensure userspace code didn't
405 * manipulate exception frame to circumvent protection, then complete
407 * we just clear TM2 to turn it into an userspace access
409 asmlinkage void berr_040cleanup(struct frame *fp)
411 fp->un.fmt7.wb2s &= ~4;
412 fp->un.fmt7.wb3s &= ~4;
414 do_040writebacks(fp);
417 static inline void access_error040(struct frame *fp)
419 unsigned short ssw = fp->un.fmt7.ssw;
423 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
424 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
425 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
426 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
427 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
428 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
432 unsigned long addr = fp->un.fmt7.faddr;
433 unsigned long errorcode;
436 * The MMU status has to be determined AFTER the address
437 * has been corrected if there was a misaligned access (MA).
440 addr = (addr + 7) & -8;
442 /* MMU error, get the MMUSR info for this access */
443 mmusr = probe040(!(ssw & RW_040), addr, ssw);
445 printk("mmusr = %lx\n", mmusr);
448 if (!(mmusr & MMU_R_040)) {
449 /* clear the invalid atc entry */
450 __flush_tlb040_one(addr);
454 /* despite what documentation seems to say, RMW
455 * accesses have always both the LK and RW bits set */
456 if (!(ssw & RW_040) || (ssw & LK_040))
459 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
461 printk("do_page_fault() !=0 \n");
463 if (user_mode(&fp->ptregs)){
464 /* delay writebacks after signal delivery */
466 printk(".. was usermode - return\n");
470 /* disable writeback into user space from kernel
471 * (if do_page_fault didn't fix the mapping,
472 * the writeback won't do good)
475 printk(".. disabling wb2\n");
477 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
478 fp->un.fmt7.wb2s &= ~WBV_040;
480 } else if (send_fault_sig(&fp->ptregs) > 0) {
481 printk("68040 access error, ssw=%x\n", ssw);
485 do_040writebacks(fp);
487 #endif /* CONFIG_M68040 */
489 #if defined(CONFIG_SUN3)
490 #include <asm/sun3mmu.h>
492 extern int mmu_emu_handle_fault (unsigned long, int, int);
494 /* sun3 version of bus_error030 */
496 static inline void bus_error030 (struct frame *fp)
498 unsigned char buserr_type = sun3_get_buserr ();
499 unsigned long addr, errorcode;
500 unsigned short ssw = fp->un.fmtb.ssw;
501 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
505 printk ("Instruction fault at %#010lx\n",
507 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
509 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
511 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
512 ssw & RW ? "read" : "write",
514 space_names[ssw & DFC], fp->ptregs.pc);
518 * Check if this page should be demand-mapped. This needs to go before
519 * the testing for a bad kernel-space access (demand-mapping applies
520 * to kernel accesses too).
524 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
525 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
529 /* Check for kernel-space pagefault (BAD). */
530 if (fp->ptregs.sr & PS_S) {
531 /* kernel fault must be a data fault to user space */
532 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
533 // try checking the kernel mappings before surrender
534 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
536 /* instruction fault or kernel data fault! */
538 printk ("Instruction fault at %#010lx\n",
541 /* was this fault incurred testing bus mappings? */
542 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
543 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
544 send_fault_sig(&fp->ptregs);
548 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
549 ssw & RW ? "read" : "write",
551 space_names[ssw & DFC], fp->ptregs.pc);
553 printk ("BAD KERNEL BUSERR\n");
555 die_if_kernel("Oops", &fp->ptregs,0);
556 force_sig(SIGKILL, current);
561 if (!(ssw & (FC | FB)) && !(ssw & DF))
562 /* not an instruction fault or data fault! BAD */
563 panic ("USER BUSERR w/o instruction or data fault");
567 /* First handle the data fault, if any. */
569 addr = fp->un.fmtb.daddr;
571 // errorcode bit 0: 0 -> no page 1 -> protection fault
572 // errorcode bit 1: 0 -> read fault 1 -> write fault
574 // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
575 // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
577 if (buserr_type & SUN3_BUSERR_PROTERR)
579 else if (buserr_type & SUN3_BUSERR_INVALID)
583 printk ("*** unexpected busfault type=%#04x\n", buserr_type);
584 printk ("invalid %s access at %#lx from pc %#lx\n",
585 !(ssw & RW) ? "write" : "read", addr,
588 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
589 force_sig (SIGBUS, current);
593 //todo: wtf is RM bit? --m
594 if (!(ssw & RW) || ssw & RM)
597 /* Handle page fault. */
598 do_page_fault (&fp->ptregs, addr, errorcode);
600 /* Retry the data fault now. */
604 /* Now handle the instruction fault. */
606 /* Get the fault address. */
607 if (fp->ptregs.format == 0xA)
608 addr = fp->ptregs.pc + 4;
610 addr = fp->un.fmtb.baddr;
614 if (buserr_type & SUN3_BUSERR_INVALID) {
615 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
616 do_page_fault (&fp->ptregs, addr, 0);
619 printk ("protection fault on insn access (segv).\n");
621 force_sig (SIGSEGV, current);
625 #if defined(CPU_M68020_OR_M68030)
626 static inline void bus_error030 (struct frame *fp)
628 volatile unsigned short temp;
629 unsigned short mmusr;
630 unsigned long addr, errorcode;
631 unsigned short ssw = fp->un.fmtb.ssw;
635 printk ("pid = %x ", current->pid);
636 printk ("SSW=%#06x ", ssw);
639 printk ("Instruction fault at %#010lx\n",
641 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
643 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
645 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
646 ssw & RW ? "read" : "write",
648 space_names[ssw & DFC], fp->ptregs.pc);
651 /* ++andreas: If a data fault and an instruction fault happen
652 at the same time map in both pages. */
654 /* First handle the data fault, if any. */
656 addr = fp->un.fmtb.daddr;
659 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
662 : "a" (&temp), "a" (addr), "d" (ssw));
664 asm volatile ("ptestr %2,%1@,#7\n\t"
666 : : "a" (&temp), "a" (addr), "d" (ssw));
671 printk("mmusr is %#x for addr %#lx in task %p\n",
672 mmusr, addr, current);
673 printk("descriptor address is %#lx, contents %#lx\n",
674 __va(desc), *(unsigned long *)__va(desc));
677 errorcode = (mmusr & MMU_I) ? 0 : 1;
678 if (!(ssw & RW) || (ssw & RM))
681 if (mmusr & (MMU_I | MMU_WP)) {
683 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
684 ssw & RW ? "read" : "write",
686 space_names[ssw & DFC], fp->ptregs.pc);
689 /* Don't try to do anything further if an exception was
691 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
693 } else if (!(mmusr & MMU_I)) {
694 /* probably a 020 cas fault */
695 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
696 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
697 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
698 printk("invalid %s access at %#lx from pc %#lx\n",
699 !(ssw & RW) ? "write" : "read", addr,
701 die_if_kernel("Oops",&fp->ptregs,mmusr);
702 force_sig(SIGSEGV, current);
706 static volatile long tlong;
709 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
710 !(ssw & RW) ? "write" : "read", addr,
712 asm volatile ("ptestr #1,%1@,#0\n\t"
715 : "a" (&temp), "a" (addr));
718 printk ("level 0 mmusr is %#x\n", mmusr);
720 asm volatile ("pmove %%tt0,%0@"
723 printk("tt0 is %#lx, ", tlong);
724 asm volatile ("pmove %%tt1,%0@"
727 printk("tt1 is %#lx\n", tlong);
730 printk("Unknown SIGSEGV - 1\n");
732 die_if_kernel("Oops",&fp->ptregs,mmusr);
733 force_sig(SIGSEGV, current);
737 /* setup an ATC entry for the access about to be retried */
738 if (!(ssw & RW) || (ssw & RM))
739 asm volatile ("ploadw %1,%0@" : /* no outputs */
740 : "a" (addr), "d" (ssw));
742 asm volatile ("ploadr %1,%0@" : /* no outputs */
743 : "a" (addr), "d" (ssw));
746 /* Now handle the instruction fault. */
748 if (!(ssw & (FC|FB)))
751 if (fp->ptregs.sr & PS_S) {
752 printk("Instruction fault at %#010lx\n",
755 printk ("BAD KERNEL BUSERR\n");
756 die_if_kernel("Oops",&fp->ptregs,0);
757 force_sig(SIGKILL, current);
761 /* get the fault address */
762 if (fp->ptregs.format == 10)
763 addr = fp->ptregs.pc + 4;
765 addr = fp->un.fmtb.baddr;
769 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
770 /* Insn fault on same page as data fault. But we
771 should still create the ATC entry. */
772 goto create_atc_entry;
775 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
778 : "a" (&temp), "a" (addr));
780 asm volatile ("ptestr #1,%1@,#7\n\t"
782 : : "a" (&temp), "a" (addr));
787 printk ("mmusr is %#x for addr %#lx in task %p\n",
788 mmusr, addr, current);
789 printk ("descriptor address is %#lx, contents %#lx\n",
790 __va(desc), *(unsigned long *)__va(desc));
794 do_page_fault (&fp->ptregs, addr, 0);
795 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
796 printk ("invalid insn access at %#lx from pc %#lx\n",
797 addr, fp->ptregs.pc);
799 printk("Unknown SIGSEGV - 2\n");
801 die_if_kernel("Oops",&fp->ptregs,mmusr);
802 force_sig(SIGSEGV, current);
807 /* setup an ATC entry for the access about to be retried */
808 asm volatile ("ploadr #2,%0@" : /* no outputs */
811 #endif /* CPU_M68020_OR_M68030 */
812 #endif /* !CONFIG_SUN3 */
814 asmlinkage void buserr_c(struct frame *fp)
816 /* Only set esp0 if coming from user mode */
817 if (user_mode(&fp->ptregs))
818 current->thread.esp0 = (unsigned long) fp;
821 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
824 switch (fp->ptregs.format) {
825 #if defined (CONFIG_M68060)
826 case 4: /* 68060 access error */
827 access_error060 (fp);
830 #if defined (CONFIG_M68040)
831 case 0x7: /* 68040 access error */
832 access_error040 (fp);
835 #if defined (CPU_M68020_OR_M68030)
842 die_if_kernel("bad frame format",&fp->ptregs,0);
844 printk("Unknown SIGSEGV - 4\n");
846 force_sig(SIGSEGV, current);
851 static int kstack_depth_to_print = 48;
853 void show_trace(unsigned long *stack)
855 unsigned long *endstack;
859 printk("Call Trace:");
860 addr = (unsigned long)stack + THREAD_SIZE - 1;
861 endstack = (unsigned long *)(addr & -THREAD_SIZE);
863 while (stack + 1 <= endstack) {
866 * If the address is either in the text segment of the
867 * kernel, or in the region which contains vmalloc'ed
868 * memory, it *may* be the address of a calling
869 * routine; if so, print it so that someone tracing
870 * down the cause of the crash will be able to figure
871 * out the call path that was taken.
873 if (__kernel_text_address(addr)) {
874 #ifndef CONFIG_KALLSYMS
878 printk(" [<%08lx>]", addr);
879 print_symbol(" %s\n", addr);
886 void show_registers(struct pt_regs *regs)
888 struct frame *fp = (struct frame *)regs;
889 mm_segment_t old_fs = get_fs();
895 printk("PC: [<%08lx>]",regs->pc);
896 print_symbol(" %s", regs->pc);
897 printk("\nSR: %04x SP: %p a2: %08lx\n",
898 regs->sr, regs, regs->a2);
899 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
900 regs->d0, regs->d1, regs->d2, regs->d3);
901 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
902 regs->d4, regs->d5, regs->a0, regs->a1);
904 printk("Process %s (pid: %d, task=%p)\n",
905 current->comm, current->pid, current);
906 addr = (unsigned long)&fp->un;
907 printk("Frame format=%X ", regs->format);
908 switch (regs->format) {
910 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
911 addr += sizeof(fp->un.fmt2);
914 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
915 addr += sizeof(fp->un.fmt3);
918 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
919 : "eff addr=%08lx pc=%08lx\n"),
920 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
921 addr += sizeof(fp->un.fmt4);
924 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
925 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
926 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
927 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
928 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
929 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
930 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
931 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
932 printk("push data: %08lx %08lx %08lx %08lx\n",
933 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
935 addr += sizeof(fp->un.fmt7);
938 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
939 addr += sizeof(fp->un.fmt9);
942 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
943 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
944 fp->un.fmta.daddr, fp->un.fmta.dobuf);
945 addr += sizeof(fp->un.fmta);
948 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
949 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
950 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
951 printk("baddr=%08lx dibuf=%08lx ver=%x\n",
952 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
953 addr += sizeof(fp->un.fmtb);
958 show_stack(NULL, (unsigned long *)addr);
962 cp = (u16 *)regs->pc;
963 for (i = -8; i < 16; i++) {
964 if (get_user(c, cp + i) && i >= 0) {
965 printk(" Bad PC value.");
968 printk(i ? " %04x" : " <%04x>", c);
974 void show_stack(struct task_struct *task, unsigned long *stack)
977 unsigned long *endstack;
982 stack = (unsigned long *)task->thread.esp0;
984 stack = (unsigned long *)&stack;
986 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
988 printk("Stack from %08lx:", (unsigned long)stack);
990 for (i = 0; i < kstack_depth_to_print; i++) {
991 if (p + 1 > endstack)
995 printk(" %08lx", *p++);
1002 * The architecture-independent backtrace generator
1004 void dump_stack(void)
1006 unsigned long stack;
1011 EXPORT_SYMBOL(dump_stack);
1013 void bad_super_trap (struct frame *fp)
1016 if (fp->ptregs.vector < 4*sizeof(vec_names)/sizeof(vec_names[0]))
1017 printk ("*** %s *** FORMAT=%X\n",
1018 vec_names[(fp->ptregs.vector) >> 2],
1021 printk ("*** Exception %d *** FORMAT=%X\n",
1022 (fp->ptregs.vector) >> 2,
1024 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
1025 unsigned short ssw = fp->un.fmtb.ssw;
1027 printk ("SSW=%#06x ", ssw);
1030 printk ("Pipe stage C instruction fault at %#010lx\n",
1031 (fp->ptregs.format) == 0xA ?
1032 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1034 printk ("Pipe stage B instruction fault at %#010lx\n",
1035 (fp->ptregs.format) == 0xA ?
1036 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1038 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1039 ssw & RW ? "read" : "write",
1040 fp->un.fmtb.daddr, space_names[ssw & DFC],
1043 printk ("Current process id is %d\n", current->pid);
1044 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1047 asmlinkage void trap_c(struct frame *fp)
1052 if (fp->ptregs.sr & PS_S) {
1053 if ((fp->ptregs.vector >> 2) == VEC_TRACE) {
1054 /* traced a trapping instruction */
1055 current->ptrace |= PT_DTRACE;
1061 /* send the appropriate signal to the user program */
1062 switch ((fp->ptregs.vector) >> 2) {
1064 info.si_code = BUS_ADRALN;
1070 info.si_code = ILL_ILLOPC;
1074 info.si_code = ILL_PRVOPC;
1078 info.si_code = ILL_COPROC;
1095 info.si_code = ILL_ILLTRP;
1101 info.si_code = FPE_FLTINV;
1105 info.si_code = FPE_FLTRES;
1109 info.si_code = FPE_FLTDIV;
1113 info.si_code = FPE_FLTUND;
1117 info.si_code = FPE_FLTOVF;
1121 info.si_code = FPE_INTDIV;
1126 info.si_code = FPE_INTOVF;
1129 case VEC_TRACE: /* ptrace single step */
1130 info.si_code = TRAP_TRACE;
1133 case VEC_TRAP15: /* breakpoint */
1134 info.si_code = TRAP_BRKPT;
1138 info.si_code = ILL_ILLOPC;
1142 info.si_signo = sig;
1144 switch (fp->ptregs.format) {
1146 info.si_addr = (void *) fp->ptregs.pc;
1149 info.si_addr = (void *) fp->un.fmt2.iaddr;
1152 info.si_addr = (void *) fp->un.fmt7.effaddr;
1155 info.si_addr = (void *) fp->un.fmt9.iaddr;
1158 info.si_addr = (void *) fp->un.fmta.daddr;
1161 info.si_addr = (void *) fp->un.fmtb.daddr;
1164 force_sig_info (sig, &info, current);
1167 void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1169 if (!(fp->sr & PS_S))
1173 printk("%s: %08x\n",str,nr);
1179 * This function is called if an error occur while accessing
1180 * user-space from the fpsp040 code.
1182 asmlinkage void fpsp040_die(void)
1187 #ifdef CONFIG_M68KFPU_EMU
1188 asmlinkage void fpemu_signal(int signal, int code, void *addr)
1192 info.si_signo = signal;
1194 info.si_code = code;
1195 info.si_addr = addr;
1196 force_sig_info(signal, &info, current);