3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/config.h>
27 #include <linux/init.h>
28 #include <linux/sched.h>
29 #include <linux/ioport.h>
31 #include <linux/console.h>
32 #include <linux/mc146818rtc.h>
33 #include <linux/delay.h>
35 #if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
36 #include <linux/ide.h>
40 #include <asm/bootinfo.h>
42 #include <asm/mipsregs.h>
43 #include <asm/reboot.h>
44 #include <asm/pgtable.h>
45 #include <asm/mach-au1x00/au1000.h>
46 #include <asm/mach-au1x00/au1xxx_dbdma.h>
48 #ifdef CONFIG_MIPS_PB1200
49 #include <asm/mach-pb1x00/pb1200.h>
52 #ifdef CONFIG_MIPS_DB1200
53 #include <asm/mach-db1x00/db1200.h>
54 #define PB1200_ETH_INT DB1200_ETH_INT
55 #define PB1200_IDE_INT DB1200_IDE_INT
58 extern void _board_init_irq(void);
59 extern void (*board_init_irq)(void);
61 #ifdef CONFIG_BLK_DEV_IDE_AU1XXX
62 extern struct ide_ops *ide_ops;
63 extern struct ide_ops au1xxx_ide_ops;
64 extern u32 au1xxx_ide_virtbase;
65 extern u64 au1xxx_ide_physbase;
66 extern int au1xxx_ide_irq;
70 chan_tab_t *ide_read_ch, *ide_write_ch;
71 u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
73 dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
74 #endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
76 void board_reset (void)
81 void __init board_setup(void)
87 /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
88 * but it is board specific code, so put it here.
90 pin_func = au_readl(SYS_PINFUNC);
92 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
93 au_writel(pin_func, SYS_PINFUNC);
95 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
99 #if defined( CONFIG_I2C_ALGO_AU1550 )
103 /* Select SMBUS in CPLD */
104 bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
106 pin_func = au_readl(SYS_PINFUNC);
108 pin_func &= ~(3<<17 | 1<<4);
109 /* Set GPIOs correctly */
111 au_writel(pin_func, SYS_PINFUNC);
114 /* The i2c driver depends on 50Mhz clock */
115 freq0 = au_readl(SYS_FREQCTRL0);
117 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
118 freq0 |= (3<<SYS_FC_FRDIV1_BIT);
119 /* 396Mhz / (3+1)*2 == 49.5Mhz */
120 au_writel(freq0, SYS_FREQCTRL0);
123 au_writel(freq0, SYS_FREQCTRL0);
126 clksrc = au_readl(SYS_CLKSRC);
128 clksrc &= ~0x01f00000;
129 /* bit 22 is EXTCLK0 for PSC0 */
130 clksrc |= (0x3 << 22);
131 au_writel(clksrc, SYS_CLKSRC);
136 #ifdef CONFIG_FB_AU1200
137 argptr = prom_getcmdline();
138 #ifdef CONFIG_MIPS_PB1200
139 strcat(argptr, " video=au1200fb:panel:s11");
141 #ifdef CONFIG_MIPS_DB1200
142 strcat(argptr, " video=au1200fb:panel:s7");
146 #if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
148 * Iniz IDE parameters
150 ide_ops = &au1xxx_ide_ops;
151 au1xxx_ide_irq = PB1200_IDE_INT;
152 au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
153 au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
155 * change PIO or PIO+Ddma
156 * check the GPIO-5 pin condition. pb1200:s18_dot */
157 switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0;
160 /* The Pb1200 development board uses external MUX for PSC0 to
161 support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
163 #if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
164 #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
165 Refer to Pb1200/Db1200 documentation.
166 #elif defined( CONFIG_AU1550_PSC_SPI )
167 bcsr->resets |= BCSR_RESETS_PCS0MUX;
168 #elif defined( CONFIG_I2C_ALGO_AU1550 )
169 bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
173 #ifdef CONFIG_MIPS_PB1200
174 printk("AMD Alchemy Pb1200 Board\n");
176 #ifdef CONFIG_MIPS_DB1200
177 printk("AMD Alchemy Db1200 Board\n");
180 /* Setup Pb1200 External Interrupt Controller */
182 extern void (*board_init_irq)(void);
183 extern void _board_init_irq(void);
184 board_init_irq = _board_init_irq;