arch/powerpc/boot/dts/mpc834x_mds.dts

   1 /*
   2  * MPC8349E MDS Device Tree Source
   3  *
   4  * Copyright 2005, 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8349EMDS";
  14         compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         aliases {
  19                 ethernet0 = &enet0;
  20                 ethernet1 = &enet1;
  21                 serial0 = &serial0;
  22                 serial1 = &serial1;
  23                 pci0 = &pci0;
  24                 pci1 = &pci1;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 PowerPC,8349@0 {
  32                         device_type = "cpu";
  33                         reg = <0>;
  34                         d-cache-line-size = <20>;       // 32 bytes
  35                         i-cache-line-size = <20>;       // 32 bytes
  36                         d-cache-size = <8000>;          // L1, 32K
  37                         i-cache-size = <8000>;          // L1, 32K
  38                         timebase-frequency = <0>;       // from bootloader
  39                         bus-frequency = <0>;            // from bootloader
  40                         clock-frequency = <0>;          // from bootloader
  41                 };
  42         };
  43
  44         memory {
  45                 device_type = "memory";
  46                 reg = <00000000 10000000>;      // 256MB at 0
  47         };
  48
  49         bcsr@e2400000 {
  50                 device_type = "board-control";
  51                 reg = <e2400000 8000>;
  52         };
  53
  54         soc8349@e0000000 {
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 device_type = "soc";
  58                 ranges = <0 e0000000 00100000>;
  59                 reg = <e0000000 00000200>;
  60                 bus-frequency = <0>;
  61
  62                 wdt@200 {
  63                         device_type = "watchdog";
  64                         compatible = "mpc83xx_wdt";
  65                         reg = <200 100>;
  66                 };
  67
  68                 i2c@3000 {
  69                         #address-cells = <1>;
  70                         #size-cells = <0>;
  71                         cell-index = <0>;
  72                         compatible = "fsl-i2c";
  73                         reg = <3000 100>;
  74                         interrupts = <e 8>;
  75                         interrupt-parent = < &ipic >;
  76                         dfsrr;
  77
  78                         rtc@68 {
  79                                 compatible = "dallas,ds1374";
  80                                 reg = <68>;
  81                         };
  82                 };
  83
  84                 i2c@3100 {
  85                         #address-cells = <1>;
  86                         #size-cells = <0>;
  87                         cell-index = <1>;
  88                         compatible = "fsl-i2c";
  89                         reg = <3100 100>;
  90                         interrupts = <f 8>;
  91                         interrupt-parent = < &ipic >;
  92                         dfsrr;
  93                 };
  94
  95                 spi@7000 {
  96                         device_type = "spi";
  97                         compatible = "fsl_spi";
  98                         reg = <7000 1000>;
  99                         interrupts = <10 8>;
 100                         interrupt-parent = < &ipic >;
 101                         mode = "cpu";
 102                 };
 103
 104                 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
 105                 /* port = 0 or 1 */
 106                 usb@22000 {
 107                         compatible = "fsl-usb2-mph";
 108                         reg = <22000 1000>;
 109                         #address-cells = <1>;
 110                         #size-cells = <0>;
 111                         interrupt-parent = < &ipic >;
 112                         interrupts = <27 8>;
 113                         phy_type = "ulpi";
 114                         port1;
 115                 };
 116                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
 117                 usb@23000 {
 118                         compatible = "fsl-usb2-dr";
 119                         reg = <23000 1000>;
 120                         #address-cells = <1>;
 121                         #size-cells = <0>;
 122                         interrupt-parent = < &ipic >;
 123                         interrupts = <26 8>;
 124                         dr_mode = "otg";
 125                         phy_type = "ulpi";
 126                 };
 127
 128                 mdio@24520 {
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131                         compatible = "fsl,gianfar-mdio";
 132                         reg = <24520 20>;
 133
 134                         phy0: ethernet-phy@0 {
 135                                 interrupt-parent = < &ipic >;
 136                                 interrupts = <11 8>;
 137                                 reg = <0>;
 138                                 device_type = "ethernet-phy";
 139                         };
 140                         phy1: ethernet-phy@1 {
 141                                 interrupt-parent = < &ipic >;
 142                                 interrupts = <12 8>;
 143                                 reg = <1>;
 144                                 device_type = "ethernet-phy";
 145                         };
 146                 };
 147
 148                 enet0: ethernet@24000 {
 149                         cell-index = <0>;
 150                         device_type = "network";
 151                         model = "TSEC";
 152                         compatible = "gianfar";
 153                         reg = <24000 1000>;
 154                         local-mac-address = [ 00 00 00 00 00 00 ];
 155                         interrupts = <20 8 21 8 22 8>;
 156                         interrupt-parent = < &ipic >;
 157                         phy-handle = < &phy0 >;
 158                         linux,network-index = <0>;
 159                 };
 160
 161                 enet1: ethernet@25000 {
 162                         cell-index = <1>;
 163                         device_type = "network";
 164                         model = "TSEC";
 165                         compatible = "gianfar";
 166                         reg = <25000 1000>;
 167                         local-mac-address = [ 00 00 00 00 00 00 ];
 168                         interrupts = <23 8 24 8 25 8>;
 169                         interrupt-parent = < &ipic >;
 170                         phy-handle = < &phy1 >;
 171                         linux,network-index = <1>;
 172                 };
 173
 174                 serial0: serial@4500 {
 175                         cell-index = <0>;
 176                         device_type = "serial";
 177                         compatible = "ns16550";
 178                         reg = <4500 100>;
 179                         clock-frequency = <0>;
 180                         interrupts = <9 8>;
 181                         interrupt-parent = < &ipic >;
 182                 };
 183
 184                 serial1: serial@4600 {
 185                         cell-index = <1>;
 186                         device_type = "serial";
 187                         compatible = "ns16550";
 188                         reg = <4600 100>;
 189                         clock-frequency = <0>;
 190                         interrupts = <a 8>;
 191                         interrupt-parent = < &ipic >;
 192                 };
 193
 194                 /* May need to remove if on a part without crypto engine */
 195                 crypto@30000 {
 196                         device_type = "crypto";
 197                         model = "SEC2";
 198                         compatible = "talitos";
 199                         reg = <30000 10000>;
 200                         interrupts = <b 8>;
 201                         interrupt-parent = < &ipic >;
 202                         num-channels = <4>;
 203                         channel-fifo-len = <18>;
 204                         exec-units-mask = <0000007e>;
 205                         /* desc mask is for rev2.0,
 206                          * we need runtime fixup for >2.0 */
 207                         descriptor-types-mask = <01010ebf>;
 208                 };
 209
 210                 /* IPIC
 211                  * interrupts cell = <intr #, sense>
 212                  * sense values match linux IORESOURCE_IRQ_* defines:
 213                  * sense == 8: Level, low assertion
 214                  * sense == 2: Edge, high-to-low change
 215                  */
 216                 ipic: pic@700 {
 217                         interrupt-controller;
 218                         #address-cells = <0>;
 219                         #interrupt-cells = <2>;
 220                         reg = <700 100>;
 221                         device_type = "ipic";
 222                 };
 223         };
 224
 225         pci0: pci@e0008500 {
 226                 cell-index = <1>;
 227                 interrupt-map-mask = <f800 0 0 7>;
 228                 interrupt-map = <
 229
 230                                 /* IDSEL 0x11 */
 231                                  8800 0 0 1 &ipic 14 8
 232                                  8800 0 0 2 &ipic 15 8
 233                                  8800 0 0 3 &ipic 16 8
 234                                  8800 0 0 4 &ipic 17 8
 235
 236                                 /* IDSEL 0x12 */
 237                                  9000 0 0 1 &ipic 16 8
 238                                  9000 0 0 2 &ipic 17 8
 239                                  9000 0 0 3 &ipic 14 8
 240                                  9000 0 0 4 &ipic 15 8
 241
 242                                 /* IDSEL 0x13 */
 243                                  9800 0 0 1 &ipic 17 8
 244                                  9800 0 0 2 &ipic 14 8
 245                                  9800 0 0 3 &ipic 15 8
 246                                  9800 0 0 4 &ipic 16 8
 247
 248                                 /* IDSEL 0x15 */
 249                                  a800 0 0 1 &ipic 14 8
 250                                  a800 0 0 2 &ipic 15 8
 251                                  a800 0 0 3 &ipic 16 8
 252                                  a800 0 0 4 &ipic 17 8
 253
 254                                 /* IDSEL 0x16 */
 255                                  b000 0 0 1 &ipic 17 8
 256                                  b000 0 0 2 &ipic 14 8
 257                                  b000 0 0 3 &ipic 15 8
 258                                  b000 0 0 4 &ipic 16 8
 259
 260                                 /* IDSEL 0x17 */
 261                                  b800 0 0 1 &ipic 16 8
 262                                  b800 0 0 2 &ipic 17 8
 263                                  b800 0 0 3 &ipic 14 8
 264                                  b800 0 0 4 &ipic 15 8
 265
 266                                 /* IDSEL 0x18 */
 267                                  c000 0 0 1 &ipic 15 8
 268                                  c000 0 0 2 &ipic 16 8
 269                                  c000 0 0 3 &ipic 17 8
 270                                  c000 0 0 4 &ipic 14 8>;
 271                 interrupt-parent = < &ipic >;
 272                 interrupts = <42 8>;
 273                 bus-range = <0 0>;
 274                 ranges = <02000000 0 90000000 90000000 0 10000000
 275                           42000000 0 80000000 80000000 0 10000000
 276                           01000000 0 00000000 e2000000 0 00100000>;
 277                 clock-frequency = <3f940aa>;
 278                 #interrupt-cells = <1>;
 279                 #size-cells = <2>;
 280                 #address-cells = <3>;
 281                 reg = <e0008500 100>;
 282                 compatible = "fsl,mpc8349-pci";
 283                 device_type = "pci";
 284         };
 285
 286         pci1: pci@e0008600 {
 287                 cell-index = <2>;
 288                 interrupt-map-mask = <f800 0 0 7>;
 289                 interrupt-map = <
 290
 291                                 /* IDSEL 0x11 */
 292                                  8800 0 0 1 &ipic 14 8
 293                                  8800 0 0 2 &ipic 15 8
 294                                  8800 0 0 3 &ipic 16 8
 295                                  8800 0 0 4 &ipic 17 8
 296
 297                                 /* IDSEL 0x12 */
 298                                  9000 0 0 1 &ipic 16 8
 299                                  9000 0 0 2 &ipic 17 8
 300                                  9000 0 0 3 &ipic 14 8
 301                                  9000 0 0 4 &ipic 15 8
 302
 303                                 /* IDSEL 0x13 */
 304                                  9800 0 0 1 &ipic 17 8
 305                                  9800 0 0 2 &ipic 14 8
 306                                  9800 0 0 3 &ipic 15 8
 307                                  9800 0 0 4 &ipic 16 8
 308
 309                                 /* IDSEL 0x15 */
 310                                  a800 0 0 1 &ipic 14 8
 311                                  a800 0 0 2 &ipic 15 8
 312                                  a800 0 0 3 &ipic 16 8
 313                                  a800 0 0 4 &ipic 17 8
 314
 315                                 /* IDSEL 0x16 */
 316                                  b000 0 0 1 &ipic 17 8
 317                                  b000 0 0 2 &ipic 14 8
 318                                  b000 0 0 3 &ipic 15 8
 319                                  b000 0 0 4 &ipic 16 8
 320
 321                                 /* IDSEL 0x17 */
 322                                  b800 0 0 1 &ipic 16 8
 323                                  b800 0 0 2 &ipic 17 8
 324                                  b800 0 0 3 &ipic 14 8
 325                                  b800 0 0 4 &ipic 15 8
 326
 327                                 /* IDSEL 0x18 */
 328                                  c000 0 0 1 &ipic 15 8
 329                                  c000 0 0 2 &ipic 16 8
 330                                  c000 0 0 3 &ipic 17 8
 331                                  c000 0 0 4 &ipic 14 8>;
 332                 interrupt-parent = < &ipic >;
 333                 interrupts = <42 8>;
 334                 bus-range = <0 0>;
 335                 ranges = <02000000 0 b0000000 b0000000 0 10000000
 336                           42000000 0 a0000000 a0000000 0 10000000
 337                           01000000 0 00000000 e2100000 0 00100000>;
 338                 clock-frequency = <3f940aa>;
 339                 #interrupt-cells = <1>;
 340                 #size-cells = <2>;
 341                 #address-cells = <3>;
 342                 reg = <e0008600 100>;
 343                 compatible = "fsl,mpc8349-pci";
 344                 device_type = "pci";
 345         };
 346 };