2 * MPC8379E MDS Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "fsl,mpc8379emds";
16 compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
41 clock-frequency = <0>;
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
53 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
54 reg = <0xe0005000 0x1000>;
55 interrupts = <77 0x8>;
56 interrupt-parent = <&ipic>;
58 // booting from NOR flash
59 ranges = <0 0x0 0xfe000000 0x02000000
60 1 0x0 0xf8000000 0x00008000
61 3 0x0 0xe0600000 0x00008000>;
66 compatible = "cfi-flash";
67 reg = <0 0x0 0x2000000>;
77 reg = <0x100000 0x800000>;
81 reg = <0x1d00000 0x200000>;
85 reg = <0x1f00000 0x100000>;
91 compatible = "fsl,mpc837xmds-bcsr";
97 compatible = "fsl,mpc8379-fcm-nand",
102 reg = <0x0 0x100000>;
107 reg = <0x100000 0x300000>;
111 reg = <0x400000 0x1c00000>;
117 #address-cells = <1>;
120 compatible = "simple-bus";
121 ranges = <0x0 0xe0000000 0x00100000>;
122 reg = <0xe0000000 0x00000200>;
126 compatible = "mpc83xx_wdt";
131 #address-cells = <1>;
134 compatible = "fsl-i2c";
135 reg = <0x3000 0x100>;
136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>;
142 #address-cells = <1>;
145 compatible = "fsl-i2c";
146 reg = <0x3100 0x100>;
147 interrupts = <15 0x8>;
148 interrupt-parent = <&ipic>;
154 compatible = "fsl,spi";
155 reg = <0x7000 0x1000>;
156 interrupts = <16 0x8>;
157 interrupt-parent = <&ipic>;
162 #address-cells = <1>;
164 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
166 ranges = <0 0x8100 0x1a8>;
167 interrupt-parent = <&ipic>;
171 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
174 interrupt-parent = <&ipic>;
178 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
181 interrupt-parent = <&ipic>;
185 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
188 interrupt-parent = <&ipic>;
192 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
195 interrupt-parent = <&ipic>;
201 compatible = "fsl-usb2-dr";
202 reg = <0x23000 0x1000>;
203 #address-cells = <1>;
205 interrupt-parent = <&ipic>;
206 interrupts = <38 0x8>;
212 #address-cells = <1>;
214 compatible = "fsl,gianfar-mdio";
215 reg = <0x24520 0x20>;
216 phy2: ethernet-phy@2 {
217 interrupt-parent = <&ipic>;
218 interrupts = <17 0x8>;
220 device_type = "ethernet-phy";
222 phy3: ethernet-phy@3 {
223 interrupt-parent = <&ipic>;
224 interrupts = <18 0x8>;
226 device_type = "ethernet-phy";
230 enet0: ethernet@24000 {
232 device_type = "network";
234 compatible = "gianfar";
235 reg = <0x24000 0x1000>;
236 local-mac-address = [ 00 00 00 00 00 00 ];
237 interrupts = <32 0x8 33 0x8 34 0x8>;
238 phy-connection-type = "mii";
239 interrupt-parent = <&ipic>;
240 phy-handle = <&phy2>;
243 enet1: ethernet@25000 {
245 device_type = "network";
247 compatible = "gianfar";
248 reg = <0x25000 0x1000>;
249 local-mac-address = [ 00 00 00 00 00 00 ];
250 interrupts = <35 0x8 36 0x8 37 0x8>;
251 phy-connection-type = "mii";
252 interrupt-parent = <&ipic>;
253 phy-handle = <&phy3>;
256 serial0: serial@4500 {
258 device_type = "serial";
259 compatible = "ns16550";
260 reg = <0x4500 0x100>;
261 clock-frequency = <0>;
262 interrupts = <9 0x8>;
263 interrupt-parent = <&ipic>;
266 serial1: serial@4600 {
268 device_type = "serial";
269 compatible = "ns16550";
270 reg = <0x4600 0x100>;
271 clock-frequency = <0>;
272 interrupts = <10 0x8>;
273 interrupt-parent = <&ipic>;
277 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
278 "fsl,sec2.1", "fsl,sec2.0";
279 reg = <0x30000 0x10000>;
280 interrupts = <11 0x8>;
281 interrupt-parent = <&ipic>;
282 fsl,num-channels = <4>;
283 fsl,channel-fifo-len = <24>;
284 fsl,exec-units-mask = <0x9fe>;
285 fsl,descriptor-types-mask = <0x3ab0ebf>;
290 compatible = "fsl,esdhc";
291 reg = <0x2e000 0x1000>;
292 interrupts = <42 0x8>;
293 interrupt-parent = <&ipic>;
297 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
298 reg = <0x18000 0x1000>;
299 interrupts = <44 0x8>;
300 interrupt-parent = <&ipic>;
304 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
305 reg = <0x19000 0x1000>;
306 interrupts = <45 0x8>;
307 interrupt-parent = <&ipic>;
311 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
312 reg = <0x1a000 0x1000>;
313 interrupts = <46 0x8>;
314 interrupt-parent = <&ipic>;
318 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
319 reg = <0x1b000 0x1000>;
320 interrupts = <47 0x8>;
321 interrupt-parent = <&ipic>;
325 * interrupts cell = <intr #, sense>
326 * sense values match linux IORESOURCE_IRQ_* defines:
327 * sense == 8: Level, low assertion
328 * sense == 2: Edge, high-to-low change
331 compatible = "fsl,ipic";
332 interrupt-controller;
333 #address-cells = <0>;
334 #interrupt-cells = <2>;
341 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
345 0x8800 0x0 0x0 0x1 &ipic 20 0x8
346 0x8800 0x0 0x0 0x2 &ipic 21 0x8
347 0x8800 0x0 0x0 0x3 &ipic 22 0x8
348 0x8800 0x0 0x0 0x4 &ipic 23 0x8
351 0x9000 0x0 0x0 0x1 &ipic 22 0x8
352 0x9000 0x0 0x0 0x2 &ipic 23 0x8
353 0x9000 0x0 0x0 0x3 &ipic 20 0x8
354 0x9000 0x0 0x0 0x4 &ipic 21 0x8
357 0x9800 0x0 0x0 0x1 &ipic 23 0x8
358 0x9800 0x0 0x0 0x2 &ipic 20 0x8
359 0x9800 0x0 0x0 0x3 &ipic 21 0x8
360 0x9800 0x0 0x0 0x4 &ipic 22 0x8
363 0xa800 0x0 0x0 0x1 &ipic 20 0x8
364 0xa800 0x0 0x0 0x2 &ipic 21 0x8
365 0xa800 0x0 0x0 0x3 &ipic 22 0x8
366 0xa800 0x0 0x0 0x4 &ipic 23 0x8
369 0xb000 0x0 0x0 0x1 &ipic 23 0x8
370 0xb000 0x0 0x0 0x2 &ipic 20 0x8
371 0xb000 0x0 0x0 0x3 &ipic 21 0x8
372 0xb000 0x0 0x0 0x4 &ipic 22 0x8
375 0xb800 0x0 0x0 0x1 &ipic 22 0x8
376 0xb800 0x0 0x0 0x2 &ipic 23 0x8
377 0xb800 0x0 0x0 0x3 &ipic 20 0x8
378 0xb800 0x0 0x0 0x4 &ipic 21 0x8
381 0xc000 0x0 0x0 0x1 &ipic 21 0x8
382 0xc000 0x0 0x0 0x2 &ipic 22 0x8
383 0xc000 0x0 0x0 0x3 &ipic 23 0x8
384 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
385 interrupt-parent = <&ipic>;
386 interrupts = <66 0x8>;
387 bus-range = <0x0 0x0>;
388 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
389 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
390 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
391 clock-frequency = <0>;
392 #interrupt-cells = <1>;
394 #address-cells = <3>;
395 reg = <0xe0008500 0x100>;
396 compatible = "fsl,mpc8349-pci";