2 * MPC8379E RDB Device Tree Source
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "fsl,mpc8379rdb";
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
40 clock-frequency = <0>;
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>; // 256MB at 0
52 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00008000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
77 compatible = "fsl,mpc8379-fcm-nand",
79 reg = <0x1 0x0 0x8000>;
87 reg = <0x100000 0x300000>;
90 reg = <0x400000 0x1c00000>;
99 compatible = "simple-bus";
100 ranges = <0x0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
110 gpio1: gpio-controller@c00 {
112 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
114 interrupts = <74 0x8>;
115 interrupt-parent = <&ipic>;
119 gpio2: gpio-controller@d00 {
121 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
123 interrupts = <75 0x8>;
124 interrupt-parent = <&ipic>;
129 #address-cells = <1>;
131 compatible = "simple-bus";
132 sleep = <&pmc 0x0c000000>;
136 #address-cells = <1>;
139 compatible = "fsl-i2c";
140 reg = <0x3000 0x100>;
141 interrupts = <14 0x8>;
142 interrupt-parent = <&ipic>;
146 compatible = "national,lm75";
151 compatible = "at24,24c256";
156 compatible = "dallas,ds1339";
162 compatible = "fsl,mc9s08qg8-mpc8379erdb",
163 "fsl,mcu-mpc8349emitx";
170 compatible = "fsl,mpc8379-esdhc";
171 reg = <0x2e000 0x1000>;
172 interrupts = <42 0x8>;
173 interrupt-parent = <&ipic>;
174 /* Filled in by U-Boot */
175 clock-frequency = <0>;
180 #address-cells = <1>;
183 compatible = "fsl-i2c";
184 reg = <0x3100 0x100>;
185 interrupts = <15 0x8>;
186 interrupt-parent = <&ipic>;
192 compatible = "fsl,spi";
193 reg = <0x7000 0x1000>;
194 interrupts = <16 0x8>;
195 interrupt-parent = <&ipic>;
200 #address-cells = <1>;
202 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
204 ranges = <0 0x8100 0x1a8>;
205 interrupt-parent = <&ipic>;
209 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
212 interrupt-parent = <&ipic>;
216 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
219 interrupt-parent = <&ipic>;
223 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
226 interrupt-parent = <&ipic>;
230 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
233 interrupt-parent = <&ipic>;
239 compatible = "fsl-usb2-dr";
240 reg = <0x23000 0x1000>;
241 #address-cells = <1>;
243 interrupt-parent = <&ipic>;
244 interrupts = <38 0x8>;
246 sleep = <&pmc 0x00c00000>;
250 #address-cells = <1>;
252 compatible = "fsl,gianfar-mdio";
253 reg = <0x24520 0x20>;
254 phy2: ethernet-phy@2 {
255 interrupt-parent = <&ipic>;
256 interrupts = <17 0x8>;
258 device_type = "ethernet-phy";
262 device_type = "tbi-phy";
267 #address-cells = <1>;
269 compatible = "fsl,gianfar-tbi";
270 reg = <0x25520 0x20>;
274 device_type = "tbi-phy";
278 enet0: ethernet@24000 {
280 device_type = "network";
282 compatible = "gianfar";
283 reg = <0x24000 0x1000>;
284 local-mac-address = [ 00 00 00 00 00 00 ];
285 interrupts = <32 0x8 33 0x8 34 0x8>;
286 phy-connection-type = "mii";
287 interrupt-parent = <&ipic>;
288 tbi-handle = <&tbi0>;
289 phy-handle = <&phy2>;
290 sleep = <&pmc 0xc0000000>;
294 enet1: ethernet@25000 {
296 device_type = "network";
298 compatible = "gianfar";
299 reg = <0x25000 0x1000>;
300 local-mac-address = [ 00 00 00 00 00 00 ];
301 interrupts = <35 0x8 36 0x8 37 0x8>;
302 phy-connection-type = "mii";
303 interrupt-parent = <&ipic>;
304 fixed-link = <1 1 1000 0 0>;
305 tbi-handle = <&tbi1>;
306 sleep = <&pmc 0x30000000>;
310 serial0: serial@4500 {
312 device_type = "serial";
313 compatible = "ns16550";
314 reg = <0x4500 0x100>;
315 clock-frequency = <0>;
316 interrupts = <9 0x8>;
317 interrupt-parent = <&ipic>;
320 serial1: serial@4600 {
322 device_type = "serial";
323 compatible = "ns16550";
324 reg = <0x4600 0x100>;
325 clock-frequency = <0>;
326 interrupts = <10 0x8>;
327 interrupt-parent = <&ipic>;
331 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
332 "fsl,sec2.1", "fsl,sec2.0";
333 reg = <0x30000 0x10000>;
334 interrupts = <11 0x8>;
335 interrupt-parent = <&ipic>;
336 fsl,num-channels = <4>;
337 fsl,channel-fifo-len = <24>;
338 fsl,exec-units-mask = <0x9fe>;
339 fsl,descriptor-types-mask = <0x3ab0ebf>;
340 sleep = <&pmc 0x03000000>;
344 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
345 reg = <0x18000 0x1000>;
346 interrupts = <44 0x8>;
347 interrupt-parent = <&ipic>;
348 sleep = <&pmc 0x000000c0>;
352 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
353 reg = <0x19000 0x1000>;
354 interrupts = <45 0x8>;
355 interrupt-parent = <&ipic>;
356 sleep = <&pmc 0x00000030>;
360 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
361 reg = <0x1a000 0x1000>;
362 interrupts = <46 0x8>;
363 interrupt-parent = <&ipic>;
364 sleep = <&pmc 0x0000000c>;
368 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
369 reg = <0x1b000 0x1000>;
370 interrupts = <47 0x8>;
371 interrupt-parent = <&ipic>;
372 sleep = <&pmc 0x00000003>;
376 * interrupts cell = <intr #, sense>
377 * sense values match linux IORESOURCE_IRQ_* defines:
378 * sense == 8: Level, low assertion
379 * sense == 2: Edge, high-to-low change
381 ipic: interrupt-controller@700 {
382 compatible = "fsl,ipic";
383 interrupt-controller;
384 #address-cells = <0>;
385 #interrupt-cells = <2>;
390 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
391 reg = <0xb00 0x100 0xa00 0x100>;
392 interrupts = <80 0x8>;
393 interrupt-parent = <&ipic>;
398 interrupt-map-mask = <0xf800 0 0 7>;
400 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
402 /* IDSEL AD14 IRQ6 inta */
403 0x7000 0x0 0x0 0x1 &ipic 22 0x8
405 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
406 0x7800 0x0 0x0 0x1 &ipic 21 0x8
407 0x7800 0x0 0x0 0x2 &ipic 22 0x8
408 0x7800 0x0 0x0 0x4 &ipic 23 0x8
410 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
411 0xE000 0x0 0x0 0x1 &ipic 23 0x8
412 0xE000 0x0 0x0 0x2 &ipic 21 0x8
413 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
414 interrupt-parent = <&ipic>;
415 interrupts = <66 0x8>;
416 bus-range = <0x0 0x0>;
417 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
418 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
419 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
420 sleep = <&pmc 0x00010000>;
421 clock-frequency = <66666666>;
422 #interrupt-cells = <1>;
424 #address-cells = <3>;
425 reg = <0xe0008500 0x100 /* internal registers */
426 0xe0008300 0x8>; /* config space access registers */
427 compatible = "fsl,mpc8349-pci";