arch/powerpc/boot/dts/prpmc2800.dts

   1 /* Device Tree Source for Motorola PrPMC2800
   2  *
   3  * Author: Mark A. Greer <mgreer@mvista.com>
   4  *
   5  * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
   6  * the terms of the GNU General Public License version 2.  This program
   7  * is licensed "as is" without any warranty of any kind, whether express
   8  * or implied.
   9  *
  10  * Property values that are labeled as "Default" will be updated by bootwrapper
  11  * if it can determine the exact PrPMC type.
  12  */
  13
  14 / {
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17         model = "PrPMC280/PrPMC2800"; /* Default */
  18         compatible = "motorola,PrPMC2800";
  19         coherency-off;
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 PowerPC,7447 {
  26                         device_type = "cpu";
  27                         reg = <0>;
  28                         clock-frequency = <2bb0b140>;   /* Default (733 MHz) */
  29                         bus-frequency = <7f28155>;      /* 133.333333 MHz */
  30                         timebase-frequency = <1fca055>; /* 33.333333 MHz */
  31                         i-cache-line-size = <20>;
  32                         d-cache-line-size = <20>;
  33                         i-cache-size = <8000>;
  34                         d-cache-size = <8000>;
  35                 };
  36         };
  37
  38         memory {
  39                 device_type = "memory";
  40                 reg = <00000000 20000000>;      /* Default (512MB) */
  41         };
  42
  43         mv64x60@f1000000 { /* Marvell Discovery */
  44                 #address-cells = <1>;
  45                 #size-cells = <1>;
  46                 #interrupt-cells = <1>;
  47                 model = "mv64360";                      /* Default */
  48                 compatible = "marvell,mv64x60";
  49                 clock-frequency = <7f28155>;            /* 133.333333 MHz */
  50                 reg = <f1000000 00010000>;
  51                 virtual-reg = <f1000000>;
  52                 ranges = <88000000 88000000 01000000    /* PCI 0 I/O Space */
  53                           80000000 80000000 08000000    /* PCI 0 MEM Space */
  54                           a0000000 a0000000 04000000    /* User FLASH */
  55                           00000000 f1000000 00010000    /* Bridge's regs */
  56                           f2000000 f2000000 00040000>;  /* Integrated SRAM */
  57
  58                 flash@a0000000 {
  59                         device_type = "rom";
  60                         compatible = "direct-mapped";
  61                         reg = <a0000000 4000000>; /* Default (64MB) */
  62                         probe-type = "CFI";
  63                         bank-width = <4>;
  64                         partitions = <00000000 00100000 /* RO */
  65                                       00100000 00040001 /* RW */
  66                                       00140000 00400000 /* RO */
  67                                       00540000 039c0000 /* RO */
  68                                       03f00000 00100000>; /* RO */
  69                         partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
  70                 };
  71
  72                 mdio {
  73                         #address-cells = <1>;
  74                         #size-cells = <0>;
  75                         device_type = "mdio";
  76                         compatible = "marvell,mv64x60-mdio";
  77                         ethernet-phy@1 {
  78                                 device_type = "ethernet-phy";
  79                                 compatible = "broadcom,bcm5421";
  80                                 interrupts = <4c>;      /* GPP 12 */
  81                                 interrupt-parent = <&/mv64x60/pic>;
  82                                 reg = <1>;
  83                         };
  84                         ethernet-phy@3 {
  85                                 device_type = "ethernet-phy";
  86                                 compatible = "broadcom,bcm5421";
  87                                 interrupts = <4c>;      /* GPP 12 */
  88                                 interrupt-parent = <&/mv64x60/pic>;
  89                                 reg = <3>;
  90                         };
  91                 };
  92
  93                 ethernet@2000 {
  94                         reg = <2000 2000>;
  95                         eth0 {
  96                                 device_type = "network";
  97                                 compatible = "marvell,mv64x60-eth";
  98                                 block-index = <0>;
  99                                 interrupts = <20>;
 100                                 interrupt-parent = <&/mv64x60/pic>;
 101                                 phy = <&/mv64x60/mdio/ethernet-phy@1>;
 102                                 local-mac-address = [ 00 00 00 00 00 00 ];
 103                         };
 104                         eth1 {
 105                                 device_type = "network";
 106                                 compatible = "marvell,mv64x60-eth";
 107                                 block-index = <1>;
 108                                 interrupts = <21>;
 109                                 interrupt-parent = <&/mv64x60/pic>;
 110                                 phy = <&/mv64x60/mdio/ethernet-phy@3>;
 111                                 local-mac-address = [ 00 00 00 00 00 00 ];
 112                         };
 113                 };
 114
 115                 sdma@4000 {
 116                         device_type = "dma";
 117                         compatible = "marvell,mv64x60-sdma";
 118                         reg = <4000 c18>;
 119                         virtual-reg = <f1004000>;
 120                         interrupt-base = <0>;
 121                         interrupts = <24>;
 122                         interrupt-parent = <&/mv64x60/pic>;
 123                 };
 124
 125                 sdma@6000 {
 126                         device_type = "dma";
 127                         compatible = "marvell,mv64x60-sdma";
 128                         reg = <6000 c18>;
 129                         virtual-reg = <f1006000>;
 130                         interrupt-base = <0>;
 131                         interrupts = <26>;
 132                         interrupt-parent = <&/mv64x60/pic>;
 133                 };
 134
 135                 brg@b200 {
 136                         compatible = "marvell,mv64x60-brg";
 137                         reg = <b200 8>;
 138                         clock-src = <8>;
 139                         clock-frequency = <7ed6b40>;
 140                         current-speed = <2580>;
 141                         bcr = <0>;
 142                 };
 143
 144                 brg@b208 {
 145                         compatible = "marvell,mv64x60-brg";
 146                         reg = <b208 8>;
 147                         clock-src = <8>;
 148                         clock-frequency = <7ed6b40>;
 149                         current-speed = <2580>;
 150                         bcr = <0>;
 151                 };
 152
 153                 cunit@f200 {
 154                         reg = <f200 200>;
 155                 };
 156
 157                 mpscrouting@b400 {
 158                         reg = <b400 c>;
 159                 };
 160
 161                 mpscintr@b800 {
 162                         reg = <b800 100>;
 163                         virtual-reg = <f100b800>;
 164                 };
 165
 166                 mpsc@8000 {
 167                         device_type = "serial";
 168                         compatible = "marvell,mpsc";
 169                         reg = <8000 38>;
 170                         virtual-reg = <f1008000>;
 171                         sdma = <&/mv64x60/sdma@4000>;
 172                         brg = <&/mv64x60/brg@b200>;
 173                         cunit = <&/mv64x60/cunit@f200>;
 174                         mpscrouting = <&/mv64x60/mpscrouting@b400>;
 175                         mpscintr = <&/mv64x60/mpscintr@b800>;
 176                         block-index = <0>;
 177                         max_idle = <28>;
 178                         chr_1 = <0>;
 179                         chr_2 = <0>;
 180                         chr_10 = <3>;
 181                         mpcr = <0>;
 182                         interrupts = <28>;
 183                         interrupt-parent = <&/mv64x60/pic>;
 184                 };
 185
 186                 mpsc@9000 {
 187                         device_type = "serial";
 188                         compatible = "marvell,mpsc";
 189                         reg = <9000 38>;
 190                         virtual-reg = <f1009000>;
 191                         sdma = <&/mv64x60/sdma@6000>;
 192                         brg = <&/mv64x60/brg@b208>;
 193                         cunit = <&/mv64x60/cunit@f200>;
 194                         mpscrouting = <&/mv64x60/mpscrouting@b400>;
 195                         mpscintr = <&/mv64x60/mpscintr@b800>;
 196                         block-index = <1>;
 197                         max_idle = <28>;
 198                         chr_1 = <0>;
 199                         chr_2 = <0>;
 200                         chr_10 = <3>;
 201                         mpcr = <0>;
 202                         interrupts = <2a>;
 203                         interrupt-parent = <&/mv64x60/pic>;
 204                 };
 205
 206                 wdt@b410 {                      /* watchdog timer */
 207                         compatible = "marvell,mv64x60-wdt";
 208                         reg = <b410 8>;
 209                         timeout = <a>;          /* wdt timeout in seconds */
 210                 };
 211
 212                 i2c@c000 {
 213                         device_type = "i2c";
 214                         compatible = "marvell,mv64x60-i2c";
 215                         reg = <c000 20>;
 216                         virtual-reg = <f100c000>;
 217                         freq_m = <8>;
 218                         freq_n = <3>;
 219                         timeout = <3e8>;                /* 1000 = 1 second */
 220                         retries = <1>;
 221                         interrupts = <25>;
 222                         interrupt-parent = <&/mv64x60/pic>;
 223                 };
 224
 225                 pic {
 226                         #interrupt-cells = <1>;
 227                         #address-cells = <0>;
 228                         compatible = "marvell,mv64x60-pic";
 229                         reg = <0000 88>;
 230                         interrupt-controller;
 231                 };
 232
 233                 mpp@f000 {
 234                         compatible = "marvell,mv64x60-mpp";
 235                         reg = <f000 10>;
 236                 };
 237
 238                 gpp@f100 {
 239                         compatible = "marvell,mv64x60-gpp";
 240                         reg = <f100 20>;
 241                 };
 242
 243                 pci@80000000 {
 244                         #address-cells = <3>;
 245                         #size-cells = <2>;
 246                         #interrupt-cells = <1>;
 247                         device_type = "pci";
 248                         compatible = "marvell,mv64x60-pci";
 249                         reg = <0cf8 8>;
 250                         ranges = <01000000 0        0 88000000 0 01000000
 251                                   02000000 0 80000000 80000000 0 08000000>;
 252                         bus-range = <0 ff>;
 253                         clock-frequency = <3EF1480>;
 254                         interrupt-pci-iack = <0c34>;
 255                         interrupt-parent = <&/mv64x60/pic>;
 256                         interrupt-map-mask = <f800 0 0 7>;
 257                         interrupt-map = <
 258                                 /* IDSEL 0x0a */
 259                                 5000 0 0 1 &/mv64x60/pic 50
 260                                 5000 0 0 2 &/mv64x60/pic 51
 261                                 5000 0 0 3 &/mv64x60/pic 5b
 262                                 5000 0 0 4 &/mv64x60/pic 5d
 263
 264                                 /* IDSEL 0x0b */
 265                                 5800 0 0 1 &/mv64x60/pic 5b
 266                                 5800 0 0 2 &/mv64x60/pic 5d
 267                                 5800 0 0 3 &/mv64x60/pic 50
 268                                 5800 0 0 4 &/mv64x60/pic 51
 269
 270                                 /* IDSEL 0x0c */
 271                                 6000 0 0 1 &/mv64x60/pic 5b
 272                                 6000 0 0 2 &/mv64x60/pic 5d
 273                                 6000 0 0 3 &/mv64x60/pic 50
 274                                 6000 0 0 4 &/mv64x60/pic 51
 275
 276                                 /* IDSEL 0x0d */
 277                                 6800 0 0 1 &/mv64x60/pic 5d
 278                                 6800 0 0 2 &/mv64x60/pic 50
 279                                 6800 0 0 3 &/mv64x60/pic 51
 280                                 6800 0 0 4 &/mv64x60/pic 5b
 281                         >;
 282                 };
 283
 284                 cpu-error@0070 {
 285                         compatible = "marvell,mv64x60-cpu-error";
 286                         reg = <0070 10 0128 28>;
 287                         interrupts = <03>;
 288                         interrupt-parent = <&/mv64x60/pic>;
 289                 };
 290
 291                 sram-ctrl@0380 {
 292                         compatible = "marvell,mv64x60-sram-ctrl";
 293                         reg = <0380 80>;
 294                         interrupts = <0d>;
 295                         interrupt-parent = <&/mv64x60/pic>;
 296                 };
 297
 298                 pci-error@1d40 {
 299                         compatible = "marvell,mv64x60-pci-error";
 300                         reg = <1d40 40 0c28 4>;
 301                         interrupts = <0c>;
 302                         interrupt-parent = <&/mv64x60/pic>;
 303                 };
 304
 305                 mem-ctrl@1400 {
 306                         compatible = "marvell,mv64x60-mem-ctrl";
 307                         reg = <1400 60>;
 308                         interrupts = <11>;
 309                         interrupt-parent = <&/mv64x60/pic>;
 310                 };
 311         };
 312
 313         chosen {
 314                 bootargs = "ip=on";
 315                 linux,stdout-path = "/mv64x60@f1000000/mpsc@8000";
 316         };
 317 };