2 * Copyright (C) 2001 Allan Trautman, IBM Corporation
3 * Copyright (C) 2005,2007 Stephen Rothwell, IBM Corp
5 * iSeries specific routines for PCI.
7 * Based on code from pci.c and iSeries_pci.c 32bit
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/list.h>
25 #include <linux/string.h>
26 #include <linux/init.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
30 #include <asm/types.h>
34 #include <asm/machdep.h>
35 #include <asm/pci-bridge.h>
36 #include <asm/iommu.h>
37 #include <asm/abs_addr.h>
38 #include <asm/firmware.h>
40 #include <asm/iseries/hv_types.h>
41 #include <asm/iseries/hv_call_xm.h>
42 #include <asm/iseries/mf.h>
43 #include <asm/iseries/iommu.h>
45 #include <asm/ppc-pci.h>
51 #define PCI_RETRY_MAX 3
52 static int limit_pci_retries = 1; /* Set Retry Error on. */
56 * Each Entry size is 4 MB * 1024 Entries = 4GB I/O address space.
58 #define IOMM_TABLE_MAX_ENTRIES 1024
59 #define IOMM_TABLE_ENTRY_SIZE 0x0000000000400000UL
60 #define BASE_IO_MEMORY 0xE000000000000000UL
62 static unsigned long max_io_memory = BASE_IO_MEMORY;
63 static long current_iomm_table_entry;
68 static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
69 static u8 iobar_table[IOMM_TABLE_MAX_ENTRIES];
71 static const char pci_io_text[] = "iSeries PCI I/O";
72 static DEFINE_SPINLOCK(iomm_table_lock);
75 * Generate a Direct Select Address for the Hypervisor
77 static inline u64 iseries_ds_addr(struct device_node *node)
79 struct pci_dn *pdn = PCI_DN(node);
81 return ((u64)pdn->busno << 48) + ((u64)pdn->bussubno << 40)
86 * Size of Bus VPD data
88 #define BUS_VPDSIZE 1024
93 #define VPD_END_OF_AREA 0x79
94 #define VPD_ID_STRING 0x82
95 #define VPD_VENDOR_AREA 0x84
100 #define VPD_FRU_FRAME_ID 0x4649 /* "FI" */
101 #define VPD_SLOT_MAP_FORMAT 0x4D46 /* "MF" */
102 #define VPD_SLOT_MAP 0x534D /* "SM" */
105 * Structures of the areas
107 struct mfg_vpd_area {
113 #define MFG_ENTRY_SIZE 3
119 char card_location[3];
123 #define SLOT_ENTRY_SIZE 16
126 * Parse the Slot Area
128 static void __init iseries_parse_slot_area(struct slot_map *map, int len,
129 HvAgentId agent, u8 *phb, char card[4])
132 * Parse Slot label until we find the one requested
135 if (map->agent == agent) {
137 * If Phb wasn't found, grab the entry first one found.
141 /* Found it, extract the data. */
142 if (map->phb == *phb) {
143 memcpy(card, &map->card_location, 3);
148 /* Point to the next Slot */
149 map = (struct slot_map *)((char *)map + SLOT_ENTRY_SIZE);
150 len -= SLOT_ENTRY_SIZE;
157 static void __init iseries_parse_mfg_area(struct mfg_vpd_area *area, int len,
158 HvAgentId agent, u8 *phb, u8 *frame, char card[4])
160 u16 slot_map_fmt = 0;
164 int mfg_tag_len = area->length;
165 /* Frame ID (FI 4649020310 ) */
166 if (area->tag == VPD_FRU_FRAME_ID)
167 *frame = area->data1;
168 /* Slot Map Format (MF 4D46020004 ) */
169 else if (area->tag == VPD_SLOT_MAP_FORMAT)
170 slot_map_fmt = (area->data1 * 256)
172 /* Slot Map (SM 534D90 */
173 else if (area->tag == VPD_SLOT_MAP) {
174 struct slot_map *slot_map;
176 if (slot_map_fmt == 0x1004)
177 slot_map = (struct slot_map *)((char *)area
178 + MFG_ENTRY_SIZE + 1);
180 slot_map = (struct slot_map *)((char *)area
182 iseries_parse_slot_area(slot_map, mfg_tag_len,
186 * Point to the next Mfg Area
187 * Use defined size, sizeof give wrong answer
189 area = (struct mfg_vpd_area *)((char *)area + mfg_tag_len
191 len -= (mfg_tag_len + MFG_ENTRY_SIZE);
196 * Look for "BUS".. Data is not Null terminated.
197 * PHBID of 0xFF indicates PHB was not found in VPD Data.
199 static u8 __init iseries_parse_phbid(u8 *area, int len)
202 if ((*area == 'B') && (*(area + 1) == 'U')
203 && (*(area + 2) == 'S')) {
216 * Parse out the VPD Areas
218 static void __init iseries_parse_vpd(u8 *data, int data_len,
219 HvAgentId agent, u8 *frame, char card[4])
223 while (data_len > 0) {
227 if (tag == VPD_END_OF_AREA)
229 len = *(data + 1) + (*(data + 2) * 256);
232 if (tag == VPD_ID_STRING)
233 phb = iseries_parse_phbid(data, len);
234 else if (tag == VPD_VENDOR_AREA)
235 iseries_parse_mfg_area((struct mfg_vpd_area *)data, len,
236 agent, &phb, frame, card);
237 /* Point to next Area. */
243 static int __init iseries_get_location_code(u16 bus, HvAgentId agent,
244 u8 *frame, char card[4])
248 u8 *bus_vpd = kmalloc(BUS_VPDSIZE, GFP_KERNEL);
250 if (bus_vpd == NULL) {
251 printk("PCI: Bus VPD Buffer allocation failure.\n");
254 bus_vpd_len = HvCallPci_getBusVpd(bus, iseries_hv_addr(bus_vpd),
256 if (bus_vpd_len == 0) {
257 printk("PCI: Bus VPD Buffer zero length.\n");
260 /* printk("PCI: bus_vpd: %p, %d\n",bus_vpd, bus_vpd_len); */
261 /* Make sure this is what I think it is */
262 if (*bus_vpd != VPD_ID_STRING) {
263 printk("PCI: Bus VPD Buffer missing starting tag.\n");
266 iseries_parse_vpd(bus_vpd, bus_vpd_len, agent, frame, card);
274 * Prints the device information.
275 * - Pass in pci_dev* pointer to the device.
276 * - Pass in the device count
279 * PCI: Bus 0, Device 26, Vendor 0x12AE Frame 1, Card C10 Ethernet
282 static void __init iseries_device_information(struct pci_dev *pdev, int count,
283 u16 bus, HvSubBusNumber subbus)
289 agent = ISERIES_PCI_AGENTID(ISERIES_GET_DEVICE_FROM_SUBBUS(subbus),
290 ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus));
292 if (iseries_get_location_code(bus, agent, &frame, card)) {
293 printk("%d. PCI: Bus%3d, Device%3d, Vendor %04X Frame%3d, "
294 "Card %4s 0x%04X\n", count, bus,
295 PCI_SLOT(pdev->devfn), pdev->vendor, frame,
296 card, (int)(pdev->class >> 8));
301 * iomm_table_allocate_entry
303 * Adds pci_dev entry in address translation table
305 * - Allocates the number of entries required in table base on BAR
307 * - Allocates starting at BASE_IO_MEMORY and increases.
308 * - The size is round up to be a multiple of entry size.
309 * - CurrentIndex is incremented to keep track of the last entry.
310 * - Builds the resource entry for allocated BARs.
312 static void __init iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
314 struct resource *bar_res = &dev->resource[bar_num];
315 long bar_size = pci_resource_len(dev, bar_num);
318 * No space to allocate, quick exit, skip Allocation.
323 * Set Resource values.
325 spin_lock(&iomm_table_lock);
326 bar_res->name = pci_io_text;
327 bar_res->start = BASE_IO_MEMORY +
328 IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
329 bar_res->end = bar_res->start + bar_size - 1;
331 * Allocate the number of table entries needed for BAR.
333 while (bar_size > 0 ) {
334 iomm_table[current_iomm_table_entry] = dev->sysdata;
335 iobar_table[current_iomm_table_entry] = bar_num;
336 bar_size -= IOMM_TABLE_ENTRY_SIZE;
337 ++current_iomm_table_entry;
339 max_io_memory = BASE_IO_MEMORY +
340 IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
341 spin_unlock(&iomm_table_lock);
345 * allocate_device_bars
347 * - Allocates ALL pci_dev BAR's and updates the resources with the
348 * BAR value. BARS with zero length will have the resources
349 * The HvCallPci_getBarParms is used to get the size of the BAR
350 * space. It calls iomm_table_allocate_entry to allocate
352 * - Loops through The Bar resources(0 - 5) including the ROM
355 static void __init allocate_device_bars(struct pci_dev *dev)
359 for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num)
360 iomm_table_allocate_entry(dev, bar_num);
364 * Log error information to system console.
365 * Filter out the device not there errors.
366 * PCI: EADs Connect Failed 0x18.58.10 Rc: 0x00xx
367 * PCI: Read Vendor Failed 0x18.58.10 Rc: 0x00xx
368 * PCI: Connect Bus Unit Failed 0x18.58.10 Rc: 0x00xx
370 static void pci_log_error(char *error, int bus, int subbus,
371 int agent, int hv_res)
373 if (hv_res == 0x0302)
375 printk(KERN_ERR "PCI: %s Failed: 0x%02X.%02X.%02X Rc: 0x%04X",
376 error, bus, subbus, agent, hv_res);
380 * Look down the chain to find the matching Device Device
382 static struct device_node *find_device_node(int bus, int devfn)
384 struct device_node *node;
386 for (node = NULL; (node = of_find_all_nodes(node)); ) {
387 struct pci_dn *pdn = PCI_DN(node);
389 if (pdn && (bus == pdn->busno) && (devfn == pdn->devfn))
396 * iSeries_pci_final_fixup(void)
398 void __init iSeries_pci_final_fixup(void)
400 struct pci_dev *pdev = NULL;
401 struct device_node *node;
404 /* Fix up at the device node and pci_dev relationship */
405 mf_display_src(0xC9000100);
407 printk("pcibios_final_fixup\n");
408 for_each_pci_dev(pdev) {
411 unsigned char bus = pdev->bus->number;
413 node = find_device_node(bus, pdev->devfn);
414 printk("pci dev %p (%x.%x), node %p\n", pdev, bus,
417 printk("PCI: Device Tree not found for 0x%016lX\n",
418 (unsigned long)pdev);
422 agent = of_get_property(node, "linux,agent-id", NULL);
423 sub_bus = of_get_property(node, "linux,subbus", NULL);
424 if (agent && sub_bus) {
425 u8 irq = iSeries_allocate_IRQ(bus, 0, *sub_bus);
428 err = HvCallXm_connectBusUnit(bus, *sub_bus,
431 pci_log_error("Connect Bus Unit",
432 bus, *sub_bus, *agent, err);
434 err = HvCallPci_configStore8(bus, *sub_bus,
435 *agent, PCI_INTERRUPT_LINE, irq);
437 pci_log_error("PciCfgStore Irq Failed!",
438 bus, *sub_bus, *agent, err);
445 pdev->sysdata = node;
446 PCI_DN(node)->pcidev = pdev;
447 allocate_device_bars(pdev);
448 iseries_device_information(pdev, num_dev, bus, *sub_bus);
449 iommu_devnode_init_iSeries(pdev, node);
451 iSeries_activate_IRQs();
452 mf_display_src(0xC9000200);
456 * Config space read and write functions.
457 * For now at least, we look for the device node for the bus and devfn
458 * that we are asked to access. It may be possible to translate the devfn
459 * to a subbus and deviceid more directly.
461 static u64 hv_cfg_read_func[4] = {
462 HvCallPciConfigLoad8, HvCallPciConfigLoad16,
463 HvCallPciConfigLoad32, HvCallPciConfigLoad32
466 static u64 hv_cfg_write_func[4] = {
467 HvCallPciConfigStore8, HvCallPciConfigStore16,
468 HvCallPciConfigStore32, HvCallPciConfigStore32
472 * Read PCI config space
474 static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
475 int offset, int size, u32 *val)
477 struct device_node *node = find_device_node(bus->number, devfn);
479 struct HvCallPci_LoadReturn ret;
482 return PCIBIOS_DEVICE_NOT_FOUND;
485 return PCIBIOS_BAD_REGISTER_NUMBER;
488 fn = hv_cfg_read_func[(size - 1) & 3];
489 HvCall3Ret16(fn, &ret, iseries_ds_addr(node), offset, 0);
493 return PCIBIOS_DEVICE_NOT_FOUND; /* or something */
501 * Write PCI config space
504 static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
505 int offset, int size, u32 val)
507 struct device_node *node = find_device_node(bus->number, devfn);
512 return PCIBIOS_DEVICE_NOT_FOUND;
514 return PCIBIOS_BAD_REGISTER_NUMBER;
516 fn = hv_cfg_write_func[(size - 1) & 3];
517 ret = HvCall4(fn, iseries_ds_addr(node), offset, val, 0);
520 return PCIBIOS_DEVICE_NOT_FOUND;
525 static struct pci_ops iSeries_pci_ops = {
526 .read = iSeries_pci_read_config,
527 .write = iSeries_pci_write_config
532 * -> On Failure, print and log information.
533 * Increment Retry Count, if exceeds max, panic partition.
535 * PCI: Device 23.90 ReadL I/O Error( 0): 0x1234
536 * PCI: Device 23.90 ReadL Retry( 1)
537 * PCI: Device 23.90 ReadL Retry Successful(1)
539 static int check_return_code(char *type, struct device_node *dn,
543 struct pci_dn *pdn = PCI_DN(dn);
546 printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n",
547 type, pdn->busno, pdn->devfn,
550 * Bump the retry and check for retry count exceeded.
551 * If, Exceeded, panic the system.
553 if (((*retry) > PCI_RETRY_MAX) &&
554 (limit_pci_retries > 0)) {
555 mf_display_src(0xB6000103);
557 panic("PCI: Hardware I/O Error, SRC B6000103, "
558 "Automatic Reboot Disabled.\n");
560 return -1; /* Retry Try */
566 * Translate the I/O Address into a device node, bar, and bar offset.
567 * Note: Make sure the passed variable end up on the stack to avoid
568 * the exposure of being device global.
570 static inline struct device_node *xlate_iomm_address(
571 const volatile void __iomem *addr,
572 u64 *dsaptr, u64 *bar_offset, const char *func)
574 unsigned long orig_addr;
575 unsigned long base_addr;
577 struct device_node *dn;
579 orig_addr = (unsigned long __force)addr;
580 if ((orig_addr < BASE_IO_MEMORY) || (orig_addr >= max_io_memory)) {
581 static unsigned long last_jiffies;
582 static int num_printed;
584 if ((jiffies - last_jiffies) > 60 * HZ) {
585 last_jiffies = jiffies;
588 if (num_printed++ < 10)
590 "iSeries_%s: invalid access at IO address %p\n",
594 base_addr = orig_addr - BASE_IO_MEMORY;
595 ind = base_addr / IOMM_TABLE_ENTRY_SIZE;
596 dn = iomm_table[ind];
599 int barnum = iobar_table[ind];
600 *dsaptr = iseries_ds_addr(dn) | (barnum << 24);
601 *bar_offset = base_addr % IOMM_TABLE_ENTRY_SIZE;
603 panic("PCI: Invalid PCI IO address detected!\n");
608 * Read MM I/O Instructions for the iSeries
609 * On MM I/O error, all ones are returned and iSeries_pci_IoError is cal
610 * else, data is returned in Big Endian format.
612 static u8 iseries_readb(const volatile void __iomem *addr)
617 struct HvCallPci_LoadReturn ret;
618 struct device_node *dn =
619 xlate_iomm_address(addr, &dsa, &bar_offset, "read_byte");
624 HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, bar_offset, 0);
625 } while (check_return_code("RDB", dn, &retry, ret.rc) != 0);
630 static u16 iseries_readw_be(const volatile void __iomem *addr)
635 struct HvCallPci_LoadReturn ret;
636 struct device_node *dn =
637 xlate_iomm_address(addr, &dsa, &bar_offset, "read_word");
642 HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
644 } while (check_return_code("RDW", dn, &retry, ret.rc) != 0);
649 static u32 iseries_readl_be(const volatile void __iomem *addr)
654 struct HvCallPci_LoadReturn ret;
655 struct device_node *dn =
656 xlate_iomm_address(addr, &dsa, &bar_offset, "read_long");
661 HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
663 } while (check_return_code("RDL", dn, &retry, ret.rc) != 0);
669 * Write MM I/O Instructions for the iSeries
672 static void iseries_writeb(u8 data, volatile void __iomem *addr)
678 struct device_node *dn =
679 xlate_iomm_address(addr, &dsa, &bar_offset, "write_byte");
684 rc = HvCall4(HvCallPciBarStore8, dsa, bar_offset, data, 0);
685 } while (check_return_code("WWB", dn, &retry, rc) != 0);
688 static void iseries_writew_be(u16 data, volatile void __iomem *addr)
694 struct device_node *dn =
695 xlate_iomm_address(addr, &dsa, &bar_offset, "write_word");
700 rc = HvCall4(HvCallPciBarStore16, dsa, bar_offset, data, 0);
701 } while (check_return_code("WWW", dn, &retry, rc) != 0);
704 static void iseries_writel_be(u32 data, volatile void __iomem *addr)
710 struct device_node *dn =
711 xlate_iomm_address(addr, &dsa, &bar_offset, "write_long");
716 rc = HvCall4(HvCallPciBarStore32, dsa, bar_offset, data, 0);
717 } while (check_return_code("WWL", dn, &retry, rc) != 0);
720 static u16 iseries_readw(const volatile void __iomem *addr)
722 return le16_to_cpu(iseries_readw_be(addr));
725 static u32 iseries_readl(const volatile void __iomem *addr)
727 return le32_to_cpu(iseries_readl_be(addr));
730 static void iseries_writew(u16 data, volatile void __iomem *addr)
732 iseries_writew_be(cpu_to_le16(data), addr);
735 static void iseries_writel(u32 data, volatile void __iomem *addr)
737 iseries_writel(cpu_to_le32(data), addr);
740 static void iseries_readsb(const volatile void __iomem *addr, void *buf,
745 *(dst++) = iseries_readb(addr);
748 static void iseries_readsw(const volatile void __iomem *addr, void *buf,
753 *(dst++) = iseries_readw_be(addr);
756 static void iseries_readsl(const volatile void __iomem *addr, void *buf,
761 *(dst++) = iseries_readl_be(addr);
764 static void iseries_writesb(volatile void __iomem *addr, const void *buf,
769 iseries_writeb(*(src++), addr);
772 static void iseries_writesw(volatile void __iomem *addr, const void *buf,
775 const u16 *src = buf;
777 iseries_writew_be(*(src++), addr);
780 static void iseries_writesl(volatile void __iomem *addr, const void *buf,
783 const u32 *src = buf;
785 iseries_writel_be(*(src++), addr);
788 static void iseries_memset_io(volatile void __iomem *addr, int c,
791 volatile char __iomem *d = addr;
794 iseries_writeb(c, d++);
797 static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
801 const volatile char __iomem *s = src;
804 *d++ = iseries_readb(s++);
807 static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
811 volatile char __iomem *d = dest;
814 iseries_writeb(*s++, d++);
817 /* We only set MMIO ops. The default PIO ops will be default
818 * to the MMIO ops + pci_io_base which is 0 on iSeries as
819 * expected so both should work.
821 * Note that we don't implement the readq/writeq versions as
822 * I don't know of an HV call for doing so. Thus, the default
823 * operation will be used instead, which will fault a the value
824 * return by iSeries for MMIO addresses always hits a non mapped
825 * area. This is as good as the BUG() we used to have there.
827 static struct ppc_pci_io __initdata iseries_pci_io = {
828 .readb = iseries_readb,
829 .readw = iseries_readw,
830 .readl = iseries_readl,
831 .readw_be = iseries_readw_be,
832 .readl_be = iseries_readl_be,
833 .writeb = iseries_writeb,
834 .writew = iseries_writew,
835 .writel = iseries_writel,
836 .writew_be = iseries_writew_be,
837 .writel_be = iseries_writel_be,
838 .readsb = iseries_readsb,
839 .readsw = iseries_readsw,
840 .readsl = iseries_readsl,
841 .writesb = iseries_writesb,
842 .writesw = iseries_writesw,
843 .writesl = iseries_writesl,
844 .memset_io = iseries_memset_io,
845 .memcpy_fromio = iseries_memcpy_fromio,
846 .memcpy_toio = iseries_memcpy_toio,
850 * iSeries_pcibios_init
853 * This function checks for all possible system PCI host bridges that connect
854 * PCI buses. The system hypervisor is queried as to the guest partition
855 * ownership status. A pci_controller is built for any bus which is partially
856 * owned or fully owned by this guest partition.
858 void __init iSeries_pcibios_init(void)
860 struct pci_controller *phb;
861 struct device_node *root = of_find_node_by_path("/");
862 struct device_node *node = NULL;
864 /* Install IO hooks */
865 ppc_pci_io = iseries_pci_io;
869 /* iSeries has no IO space in the common sense, it needs to set
875 printk(KERN_CRIT "iSeries_pcibios_init: can't find root "
879 while ((node = of_get_next_child(root, node)) != NULL) {
883 if ((node->type == NULL) || (strcmp(node->type, "pci") != 0))
886 busp = of_get_property(node, "bus-range", NULL);
890 printk("bus %d appears to exist\n", bus);
891 phb = pcibios_alloc_controller(node);
894 /* All legacy iSeries PHBs are in domain zero */
895 phb->global_number = 0;
897 phb->pci_mem_offset = bus;
898 phb->first_busno = bus;
899 phb->last_busno = bus;
900 phb->ops = &iSeries_pci_ops;