2 * arch/ppc/platforms/pmac_cpufreq.c
4 * Copyright (C) 2002 - 2004 Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #include <linux/config.h>
14 #include <linux/module.h>
15 #include <linux/types.h>
16 #include <linux/errno.h>
17 #include <linux/kernel.h>
18 #include <linux/delay.h>
19 #include <linux/sched.h>
20 #include <linux/adb.h>
21 #include <linux/pmu.h>
22 #include <linux/slab.h>
23 #include <linux/cpufreq.h>
24 #include <linux/init.h>
25 #include <linux/sysdev.h>
26 #include <linux/i2c.h>
27 #include <linux/hardirq.h>
29 #include <asm/machdep.h>
31 #include <asm/pmac_feature.h>
32 #include <asm/mmu_context.h>
33 #include <asm/sections.h>
34 #include <asm/cputable.h>
36 #include <asm/system.h>
37 #include <asm/open_pic.h>
39 /* WARNING !!! This will cause calibrate_delay() to be called,
40 * but this is an __init function ! So you MUST go edit
41 * init/main.c to make it non-init before enabling DEBUG_FREQ
46 * There is a problem with the core cpufreq code on SMP kernels,
47 * it won't recalculate the Bogomips properly
50 #warning "WARNING, CPUFREQ not recommended on SMP kernels"
53 extern void low_choose_7447a_dfs(int dfs);
54 extern void low_choose_750fx_pll(int pll);
55 extern void low_sleep_handler(void);
58 * Currently, PowerMac cpufreq supports only high & low frequencies
59 * that are set by the firmware
61 static unsigned int low_freq;
62 static unsigned int hi_freq;
63 static unsigned int cur_freq;
66 * Different models uses different mecanisms to switch the frequency
68 static int (*set_speed_proc)(int low_speed);
71 * Some definitions used by the various speedprocs
73 static u32 voltage_gpio;
74 static u32 frequency_gpio;
75 static u32 slew_done_gpio;
78 #define PMAC_CPU_LOW_SPEED 1
79 #define PMAC_CPU_HIGH_SPEED 0
81 /* There are only two frequency states for each processor. Values
82 * are in kHz for the time being.
84 #define CPUFREQ_HIGH PMAC_CPU_HIGH_SPEED
85 #define CPUFREQ_LOW PMAC_CPU_LOW_SPEED
87 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
90 {0, CPUFREQ_TABLE_END},
93 static inline void wakeup_decrementer(void)
95 set_dec(tb_ticks_per_jiffy);
96 /* No currently-supported powerbook has a 601,
97 * so use get_tbl, not native
99 last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
103 static inline void debug_calc_bogomips(void)
105 /* This will cause a recalc of bogomips and display the
106 * result. We backup/restore the value to avoid affecting the
107 * core cpufreq framework's own calculation.
109 extern void calibrate_delay(void);
111 unsigned long save_lpj = loops_per_jiffy;
113 loops_per_jiffy = save_lpj;
115 #endif /* DEBUG_FREQ */
117 /* Switch CPU speed under 750FX CPU control
119 static int __pmac cpu_750fx_cpu_speed(int low_speed)
122 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
125 low_choose_750fx_pll(low_speed);
128 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
129 debug_calc_bogomips();
135 /* Switch CPU speed using DFS */
136 static int __pmac dfs_set_cpu_speed(int low_speed)
138 if (low_speed == 0) {
139 /* ramping up, set voltage first */
140 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
141 /* Make sure we sleep for at least 1ms */
146 low_choose_7447a_dfs(low_speed);
148 if (low_speed == 1) {
149 /* ramping down, set voltage last */
150 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
157 static unsigned int __pmac dfs_get_cpu_speed(unsigned int cpu)
159 if (mfspr(SPRN_HID1) & HID1_DFS)
166 /* Switch CPU speed using slewing GPIOs
168 static int __pmac gpios_set_cpu_speed(int low_speed)
172 /* If ramping up, set voltage first */
173 if (low_speed == 0) {
174 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
175 /* Delay is way too big but it's ok, we schedule */
180 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
181 low_speed ? 0x04 : 0x05);
184 set_current_state(TASK_UNINTERRUPTIBLE);
186 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
187 } while((gpio & 0x02) == 0);
189 /* If ramping down, set voltage last */
190 if (low_speed == 1) {
191 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
192 /* Delay is way too big but it's ok, we schedule */
197 debug_calc_bogomips();
203 /* Switch CPU speed under PMU control
205 static int __pmac pmu_set_cpu_speed(int low_speed)
207 struct adb_request req;
208 unsigned long save_l2cr;
209 unsigned long save_l3cr;
214 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
216 /* Disable all interrupt sources on openpic */
217 openpic_set_priority(0xf);
219 /* Make sure the decrementer won't interrupt us */
220 asm volatile("mtdec %0" : : "r" (0x7fffffff));
221 /* Make sure any pending DEC interrupt occuring while we did
222 * the above didn't re-enable the DEC */
224 asm volatile("mtdec %0" : : "r" (0x7fffffff));
226 /* We can now disable MSR_EE */
229 /* Giveup the FPU & vec */
232 #ifdef CONFIG_ALTIVEC
233 if (cpu_has_feature(CPU_FTR_ALTIVEC))
234 enable_kernel_altivec();
235 #endif /* CONFIG_ALTIVEC */
237 /* Save & disable L2 and L3 caches */
238 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
239 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
241 /* Send the new speed command. My assumption is that this command
242 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
244 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
245 while (!req.complete)
248 /* Prepare the northbridge for the speed transition */
249 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
251 /* Call low level code to backup CPU state and recover from
256 /* Restore the northbridge */
257 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
259 /* Restore L2 cache */
260 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
261 _set_L2CR(save_l2cr);
262 /* Restore L3 cache */
263 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
264 _set_L3CR(save_l3cr);
266 /* Restore userland MMU context */
267 set_context(current->active_mm->context, current->active_mm->pgd);
270 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
273 /* Restore low level PMU operations */
276 /* Restore decrementer */
277 wakeup_decrementer();
279 /* Restore interrupts */
280 openpic_set_priority(0);
282 /* Let interrupts flow again ... */
286 debug_calc_bogomips();
294 static int __pmac do_set_cpu_speed(int speed_mode)
296 struct cpufreq_freqs freqs;
298 freqs.old = cur_freq;
299 freqs.new = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
300 freqs.cpu = smp_processor_id();
302 if (freqs.old == freqs.new)
305 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
306 set_speed_proc(speed_mode == PMAC_CPU_LOW_SPEED);
307 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
308 cur_freq = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
313 static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy)
315 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
318 static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
319 unsigned int target_freq,
320 unsigned int relation)
322 unsigned int newstate = 0;
324 if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
325 target_freq, relation, &newstate))
328 return do_set_cpu_speed(newstate);
331 unsigned int __pmac pmac_get_one_cpufreq(int i)
333 /* Supports only one CPU for now */
334 return (i == 0) ? cur_freq : 0;
337 static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
339 if (policy->cpu != 0)
342 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
343 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
344 policy->cur = cur_freq;
346 return cpufreq_frequency_table_cpuinfo(policy, &pmac_cpu_freqs[0]);
349 static u32 __pmac read_gpio(struct device_node *np)
351 u32 *reg = (u32 *)get_property(np, "reg", NULL);
355 /* That works for all keylargos but shall be fixed properly
358 return 0x50 + (*reg);
361 static struct cpufreq_driver pmac_cpufreq_driver = {
362 .verify = pmac_cpufreq_verify,
363 .target = pmac_cpufreq_target,
364 .init = pmac_cpufreq_cpu_init,
366 .owner = THIS_MODULE,
370 static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
372 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
374 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
376 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
381 * Check to see if it's GPIO driven or PMU only
383 * The way we extract the GPIO address is slightly hackish, but it
384 * works well enough for now. We need to abstract the whole GPIO
385 * stuff sooner or later anyway
389 voltage_gpio = read_gpio(volt_gpio_np);
391 frequency_gpio = read_gpio(freq_gpio_np);
392 if (slew_done_gpio_np)
393 slew_done_gpio = read_gpio(slew_done_gpio_np);
395 /* If we use the frequency GPIOs, calculate the min/max speeds based
396 * on the bus frequencies
398 if (frequency_gpio && slew_done_gpio) {
402 freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
404 if (freqs == NULL || lenp != 2) {
405 printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
408 ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
410 printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
414 /* Get the min/max bus frequencies */
415 low_freq = min(freqs[0], freqs[1]);
416 hi_freq = max(freqs[0], freqs[1]);
418 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
419 * frequency, it claims it to be around 84Mhz on some models while
420 * it appears to be approx. 101Mhz on all. Let's hack around here...
421 * fortunately, we don't need to be too precise
423 if (low_freq < 98000000)
424 low_freq = 101000000;
426 /* Convert those to CPU core clocks */
427 low_freq = (low_freq * (*ratio)) / 2000;
428 hi_freq = (hi_freq * (*ratio)) / 2000;
430 /* Now we get the frequencies, we read the GPIO to see what is out current
433 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
434 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
436 set_speed_proc = gpios_set_cpu_speed;
440 /* If we use the PMU, look for the min & max frequencies in the
443 value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
446 low_freq = (*value) / 1000;
447 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
449 if (low_freq < 100000)
452 value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
455 hi_freq = (*value) / 1000;
456 set_speed_proc = pmu_set_cpu_speed;
461 static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
463 struct device_node *volt_gpio_np;
465 struct cpufreq_driver *driver = &pmac_cpufreq_driver;
467 /* Look for voltage GPIO */
468 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
469 reg = (u32 *)get_property(volt_gpio_np, "reg", NULL);
472 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
476 /* OF only reports the high frequency */
478 low_freq = cur_freq/2;
480 /* Read actual frequency from CPU */
481 driver->get = dfs_get_cpu_speed;
482 cur_freq = driver->get(0);
483 set_speed_proc = dfs_set_cpu_speed;
488 /* Currently, we support the following machines:
490 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
491 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
492 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
493 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
494 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
495 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
496 * - Recent MacRISC3 laptops
497 * - All new machines with 7447A CPUs
499 static int __init pmac_cpufreq_setup(void)
501 struct device_node *cpunode;
504 if (strstr(cmd_line, "nocpufreq"))
507 /* Assume only one CPU */
508 cpunode = find_type_devices("cpu");
512 /* Get current cpu clock freq */
513 value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
516 cur_freq = (*value) / 1000;
518 /* Check for 7447A based MacRISC3 */
519 if (machine_is_compatible("MacRISC3") &&
520 get_property(cpunode, "dynamic-power-step", NULL) &&
521 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
522 pmac_cpufreq_init_7447A(cpunode);
523 /* Check for other MacRISC3 machines */
524 } else if (machine_is_compatible("PowerBook3,4") ||
525 machine_is_compatible("PowerBook3,5") ||
526 machine_is_compatible("MacRISC3")) {
527 pmac_cpufreq_init_MacRISC3(cpunode);
528 /* Else check for iBook2 500/600 */
529 } else if (machine_is_compatible("PowerBook4,1")) {
532 set_speed_proc = pmu_set_cpu_speed;
534 /* Else check for TiPb 400 & 500 */
535 else if (machine_is_compatible("PowerBook3,2")) {
536 /* We only know about the 400 MHz and the 500Mhz model
537 * they both have 300 MHz as low frequency
539 if (cur_freq < 350000 || cur_freq > 550000)
543 set_speed_proc = pmu_set_cpu_speed;
545 /* Else check for 750FX */
546 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000) {
547 if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
550 value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
553 low_freq = (*value) / 1000;
554 set_speed_proc = cpu_750fx_cpu_speed;
557 if (set_speed_proc == NULL)
560 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
561 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
563 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
564 printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
565 low_freq/1000, hi_freq/1000, cur_freq/1000);
567 return cpufreq_register_driver(&pmac_cpufreq_driver);
570 module_init(pmac_cpufreq_setup);