arch/sparc64/kernel/irq.c

   1 /* irq.c: UltraSparc IRQ handling/init/registry.
   2  *
   3  * Copyright (C) 1997, 2007  David S. Miller  (davem@davemloft.net)
   4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/sched.h>
  10 #include <linux/ptrace.h>
  11 #include <linux/errno.h>
  12 #include <linux/kernel_stat.h>
  13 #include <linux/signal.h>
  14 #include <linux/mm.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/slab.h>
  17 #include <linux/random.h>
  18 #include <linux/init.h>
  19 #include <linux/delay.h>
  20 #include <linux/proc_fs.h>
  21 #include <linux/seq_file.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/irq.h>
  24 #include <linux/msi.h>
  25
  26 #include <asm/ptrace.h>
  27 #include <asm/processor.h>
  28 #include <asm/atomic.h>
  29 #include <asm/system.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32 #include <asm/sbus.h>
  33 #include <asm/iommu.h>
  34 #include <asm/upa.h>
  35 #include <asm/oplib.h>
  36 #include <asm/prom.h>
  37 #include <asm/timer.h>
  38 #include <asm/smp.h>
  39 #include <asm/starfire.h>
  40 #include <asm/uaccess.h>
  41 #include <asm/cache.h>
  42 #include <asm/cpudata.h>
  43 #include <asm/auxio.h>
  44 #include <asm/head.h>
  45 #include <asm/hypervisor.h>
  46
  47 /* UPA nodes send interrupt packet to UltraSparc with first data reg
  48  * value low 5 (7 on Starfire) bits holding the IRQ identifier being
  49  * delivered.  We must translate this into a non-vector IRQ so we can
  50  * set the softint on this cpu.
  51  *
  52  * To make processing these packets efficient and race free we use
  53  * an array of irq buckets below.  The interrupt vector handler in
  54  * entry.S feeds incoming packets into per-cpu pil-indexed lists.
  55  * The IVEC handler does not need to act atomically, the PIL dispatch
  56  * code uses CAS to get an atomic snapshot of the list and clear it
  57  * at the same time.
  58  *
  59  * If you make changes to ino_bucket, please update hand coded assembler
  60  * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
  61  */
  62 struct ino_bucket {
  63         /* Next handler in per-CPU IRQ worklist.  We know that
  64          * bucket pointers have the high 32-bits clear, so to
  65          * save space we only store the bits we need.
  66          */
  67 /*0x00*/unsigned int irq_chain;
  68
  69         /* Virtual interrupt number assigned to this INO.  */
  70 /*0x04*/unsigned int virt_irq;
  71 };
  72
  73 #define NUM_IVECS       (IMAP_INR + 1)
  74 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
  75
  76 #define __irq_ino(irq) \
  77         (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
  78 #define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
  79 #define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
  80
  81 /* This has to be in the main kernel image, it cannot be
  82  * turned into per-cpu data.  The reason is that the main
  83  * kernel image is locked into the TLB and this structure
  84  * is accessed from the vectored interrupt trap handler.  If
  85  * access to this structure takes a TLB miss it could cause
  86  * the 5-level sparc v9 trap stack to overflow.
  87  */
  88 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
  89
  90 static struct {
  91         unsigned int irq;
  92         unsigned int dev_handle;
  93         unsigned int dev_ino;
  94 } virt_to_real_irq_table[NR_IRQS];
  95
  96 static unsigned char virt_irq_alloc(unsigned int real_irq)
  97 {
  98         unsigned char ent;
  99
 100         BUILD_BUG_ON(NR_IRQS >= 256);
 101
 102         for (ent = 1; ent < NR_IRQS; ent++) {
 103                 if (!virt_to_real_irq_table[ent].irq)
 104                         break;
 105         }
 106         if (ent >= NR_IRQS) {
 107                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 108                 return 0;
 109         }
 110
 111         virt_to_real_irq_table[ent].irq = real_irq;
 112
 113         return ent;
 114 }
 115
 116 #ifdef CONFIG_PCI_MSI
 117 static void virt_irq_free(unsigned int virt_irq)
 118 {
 119         unsigned int real_irq;
 120
 121         if (virt_irq >= NR_IRQS)
 122                 return;
 123
 124         real_irq = virt_to_real_irq_table[virt_irq].irq;
 125         virt_to_real_irq_table[virt_irq].irq = 0;
 126
 127         __bucket(real_irq)->virt_irq = 0;
 128 }
 129 #endif
 130
 131 static unsigned int virt_to_real_irq(unsigned char virt_irq)
 132 {
 133         return virt_to_real_irq_table[virt_irq].irq;
 134 }
 135
 136 /*
 137  * /proc/interrupts printing:
 138  */
 139
 140 int show_interrupts(struct seq_file *p, void *v)
 141 {
 142         int i = *(loff_t *) v, j;
 143         struct irqaction * action;
 144         unsigned long flags;
 145
 146         if (i == 0) {
 147                 seq_printf(p, "           ");
 148                 for_each_online_cpu(j)
 149                         seq_printf(p, "CPU%d       ",j);
 150                 seq_putc(p, '\n');
 151         }
 152
 153         if (i < NR_IRQS) {
 154                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 155                 action = irq_desc[i].action;
 156                 if (!action)
 157                         goto skip;
 158                 seq_printf(p, "%3d: ",i);
 159 #ifndef CONFIG_SMP
 160                 seq_printf(p, "%10u ", kstat_irqs(i));
 161 #else
 162                 for_each_online_cpu(j)
 163                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 164 #endif
 165                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
 166                 seq_printf(p, "  %s", action->name);
 167
 168                 for (action=action->next; action; action = action->next)
 169                         seq_printf(p, ", %s", action->name);
 170
 171                 seq_putc(p, '\n');
 172 skip:
 173                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 174         }
 175         return 0;
 176 }
 177
 178 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 179 {
 180         unsigned int tid;
 181
 182         if (this_is_starfire) {
 183                 tid = starfire_translate(imap, cpuid);
 184                 tid <<= IMAP_TID_SHIFT;
 185                 tid &= IMAP_TID_UPA;
 186         } else {
 187                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 188                         unsigned long ver;
 189
 190                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 191                         if ((ver >> 32UL) == __JALAPENO_ID ||
 192                             (ver >> 32UL) == __SERRANO_ID) {
 193                                 tid = cpuid << IMAP_TID_SHIFT;
 194                                 tid &= IMAP_TID_JBUS;
 195                         } else {
 196                                 unsigned int a = cpuid & 0x1f;
 197                                 unsigned int n = (cpuid >> 5) & 0x1f;
 198
 199                                 tid = ((a << IMAP_AID_SHIFT) |
 200                                        (n << IMAP_NID_SHIFT));
 201                                 tid &= (IMAP_AID_SAFARI |
 202                                         IMAP_NID_SAFARI);;
 203                         }
 204                 } else {
 205                         tid = cpuid << IMAP_TID_SHIFT;
 206                         tid &= IMAP_TID_UPA;
 207                 }
 208         }
 209
 210         return tid;
 211 }
 212
 213 struct irq_handler_data {
 214         unsigned long   iclr;
 215         unsigned long   imap;
 216
 217         void            (*pre_handler)(unsigned int, void *, void *);
 218         void            *pre_handler_arg1;
 219         void            *pre_handler_arg2;
 220 };
 221
 222 static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
 223 {
 224         unsigned int real_irq = virt_to_real_irq(virt_irq);
 225         struct ino_bucket *bucket = NULL;
 226
 227         if (likely(real_irq))
 228                 bucket = __bucket(real_irq);
 229
 230         return bucket;
 231 }
 232
 233 #ifdef CONFIG_SMP
 234 static int irq_choose_cpu(unsigned int virt_irq)
 235 {
 236         cpumask_t mask = irq_desc[virt_irq].affinity;
 237         int cpuid;
 238
 239         if (cpus_equal(mask, CPU_MASK_ALL)) {
 240                 static int irq_rover;
 241                 static DEFINE_SPINLOCK(irq_rover_lock);
 242                 unsigned long flags;
 243
 244                 /* Round-robin distribution... */
 245         do_round_robin:
 246                 spin_lock_irqsave(&irq_rover_lock, flags);
 247
 248                 while (!cpu_online(irq_rover)) {
 249                         if (++irq_rover >= NR_CPUS)
 250                                 irq_rover = 0;
 251                 }
 252                 cpuid = irq_rover;
 253                 do {
 254                         if (++irq_rover >= NR_CPUS)
 255                                 irq_rover = 0;
 256                 } while (!cpu_online(irq_rover));
 257
 258                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 259         } else {
 260                 cpumask_t tmp;
 261
 262                 cpus_and(tmp, cpu_online_map, mask);
 263
 264                 if (cpus_empty(tmp))
 265                         goto do_round_robin;
 266
 267                 cpuid = first_cpu(tmp);
 268         }
 269
 270         return cpuid;
 271 }
 272 #else
 273 static int irq_choose_cpu(unsigned int virt_irq)
 274 {
 275         return real_hard_smp_processor_id();
 276 }
 277 #endif
 278
 279 static void sun4u_irq_enable(unsigned int virt_irq)
 280 {
 281         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 282
 283         if (likely(data)) {
 284                 unsigned long cpuid, imap, val;
 285                 unsigned int tid;
 286
 287                 cpuid = irq_choose_cpu(virt_irq);
 288                 imap = data->imap;
 289
 290                 tid = sun4u_compute_tid(imap, cpuid);
 291
 292                 val = upa_readq(imap);
 293                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
 294                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
 295                 val |= tid | IMAP_VALID;
 296                 upa_writeq(val, imap);
 297         }
 298 }
 299
 300 static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
 301 {
 302         sun4u_irq_enable(virt_irq);
 303 }
 304
 305 static void sun4u_irq_disable(unsigned int virt_irq)
 306 {
 307         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 308
 309         if (likely(data)) {
 310                 unsigned long imap = data->imap;
 311                 u32 tmp = upa_readq(imap);
 312
 313                 tmp &= ~IMAP_VALID;
 314                 upa_writeq(tmp, imap);
 315         }
 316 }
 317
 318 static void sun4u_irq_end(unsigned int virt_irq)
 319 {
 320         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 321         struct irq_desc *desc = irq_desc + virt_irq;
 322
 323         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 324                 return;
 325
 326         if (likely(data))
 327                 upa_writeq(ICLR_IDLE, data->iclr);
 328 }
 329
 330 static void sun4v_irq_enable(unsigned int virt_irq)
 331 {
 332         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 333         unsigned int ino = bucket - &ivector_table[0];
 334
 335         if (likely(bucket)) {
 336                 unsigned long cpuid;
 337                 int err;
 338
 339                 cpuid = irq_choose_cpu(virt_irq);
 340
 341                 err = sun4v_intr_settarget(ino, cpuid);
 342                 if (err != HV_EOK)
 343                         printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 344                                "err(%d)\n", ino, cpuid, err);
 345                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 346                 if (err != HV_EOK)
 347                         printk(KERN_ERR "sun4v_intr_setstate(%x): "
 348                                "err(%d)\n", ino, err);
 349                 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 350                 if (err != HV_EOK)
 351                         printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
 352                                ino, err);
 353         }
 354 }
 355
 356 static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
 357 {
 358         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 359         unsigned int ino = bucket - &ivector_table[0];
 360
 361         if (likely(bucket)) {
 362                 unsigned long cpuid;
 363                 int err;
 364
 365                 cpuid = irq_choose_cpu(virt_irq);
 366
 367                 err = sun4v_intr_settarget(ino, cpuid);
 368                 if (err != HV_EOK)
 369                         printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 370                                "err(%d)\n", ino, cpuid, err);
 371         }
 372 }
 373
 374 static void sun4v_irq_disable(unsigned int virt_irq)
 375 {
 376         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 377         unsigned int ino = bucket - &ivector_table[0];
 378
 379         if (likely(bucket)) {
 380                 int err;
 381
 382                 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 383                 if (err != HV_EOK)
 384                         printk(KERN_ERR "sun4v_intr_setenabled(%x): "
 385                                "err(%d)\n", ino, err);
 386         }
 387 }
 388
 389 #ifdef CONFIG_PCI_MSI
 390 static void sun4v_msi_enable(unsigned int virt_irq)
 391 {
 392         sun4v_irq_enable(virt_irq);
 393         unmask_msi_irq(virt_irq);
 394 }
 395
 396 static void sun4v_msi_disable(unsigned int virt_irq)
 397 {
 398         mask_msi_irq(virt_irq);
 399         sun4v_irq_disable(virt_irq);
 400 }
 401 #endif
 402
 403 static void sun4v_irq_end(unsigned int virt_irq)
 404 {
 405         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 406         unsigned int ino = bucket - &ivector_table[0];
 407         struct irq_desc *desc = irq_desc + virt_irq;
 408
 409         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 410                 return;
 411
 412         if (likely(bucket)) {
 413                 int err;
 414
 415                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 416                 if (err != HV_EOK)
 417                         printk(KERN_ERR "sun4v_intr_setstate(%x): "
 418                                "err(%d)\n", ino, err);
 419         }
 420 }
 421
 422 static void sun4v_virq_enable(unsigned int virt_irq)
 423 {
 424         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 425
 426         if (likely(bucket)) {
 427                 unsigned long cpuid, dev_handle, dev_ino;
 428                 int err;
 429
 430                 cpuid = irq_choose_cpu(virt_irq);
 431
 432                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
 433                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
 434
 435                 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 436                 if (err != HV_EOK)
 437                         printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 438                                "err(%d)\n",
 439                                dev_handle, dev_ino, cpuid, err);
 440                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
 441                                             HV_INTR_STATE_IDLE);
 442                 if (err != HV_EOK)
 443                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 444                                 "HV_INTR_STATE_IDLE): err(%d)\n",
 445                                dev_handle, dev_ino, err);
 446                 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 447                                             HV_INTR_ENABLED);
 448                 if (err != HV_EOK)
 449                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 450                                "HV_INTR_ENABLED): err(%d)\n",
 451                                dev_handle, dev_ino, err);
 452         }
 453 }
 454
 455 static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
 456 {
 457         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 458
 459         if (likely(bucket)) {
 460                 unsigned long cpuid, dev_handle, dev_ino;
 461                 int err;
 462
 463                 cpuid = irq_choose_cpu(virt_irq);
 464
 465                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
 466                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
 467
 468                 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 469                 if (err != HV_EOK)
 470                         printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 471                                "err(%d)\n",
 472                                dev_handle, dev_ino, cpuid, err);
 473         }
 474 }
 475
 476 static void sun4v_virq_disable(unsigned int virt_irq)
 477 {
 478         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 479
 480         if (likely(bucket)) {
 481                 unsigned long dev_handle, dev_ino;
 482                 int err;
 483
 484                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
 485                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
 486
 487                 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 488                                             HV_INTR_DISABLED);
 489                 if (err != HV_EOK)
 490                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 491                                "HV_INTR_DISABLED): err(%d)\n",
 492                                dev_handle, dev_ino, err);
 493         }
 494 }
 495
 496 static void sun4v_virq_end(unsigned int virt_irq)
 497 {
 498         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 499         struct irq_desc *desc = irq_desc + virt_irq;
 500
 501         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 502                 return;
 503
 504         if (likely(bucket)) {
 505                 unsigned long dev_handle, dev_ino;
 506                 int err;
 507
 508                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
 509                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
 510
 511                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
 512                                             HV_INTR_STATE_IDLE);
 513                 if (err != HV_EOK)
 514                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 515                                 "HV_INTR_STATE_IDLE): err(%d)\n",
 516                                dev_handle, dev_ino, err);
 517         }
 518 }
 519
 520 static void run_pre_handler(unsigned int virt_irq)
 521 {
 522         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 523         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 524
 525         if (likely(data->pre_handler)) {
 526                 data->pre_handler(__irq_ino(__irq(bucket)),
 527                                   data->pre_handler_arg1,
 528                                   data->pre_handler_arg2);
 529         }
 530 }
 531
 532 static struct irq_chip sun4u_irq = {
 533         .typename       = "sun4u",
 534         .enable         = sun4u_irq_enable,
 535         .disable        = sun4u_irq_disable,
 536         .end            = sun4u_irq_end,
 537         .set_affinity   = sun4u_set_affinity,
 538 };
 539
 540 static struct irq_chip sun4u_irq_ack = {
 541         .typename       = "sun4u+ack",
 542         .enable         = sun4u_irq_enable,
 543         .disable        = sun4u_irq_disable,
 544         .ack            = run_pre_handler,
 545         .end            = sun4u_irq_end,
 546         .set_affinity   = sun4u_set_affinity,
 547 };
 548
 549 static struct irq_chip sun4v_irq = {
 550         .typename       = "sun4v",
 551         .enable         = sun4v_irq_enable,
 552         .disable        = sun4v_irq_disable,
 553         .end            = sun4v_irq_end,
 554         .set_affinity   = sun4v_set_affinity,
 555 };
 556
 557 static struct irq_chip sun4v_irq_ack = {
 558         .typename       = "sun4v+ack",
 559         .enable         = sun4v_irq_enable,
 560         .disable        = sun4v_irq_disable,
 561         .ack            = run_pre_handler,
 562         .end            = sun4v_irq_end,
 563         .set_affinity   = sun4v_set_affinity,
 564 };
 565
 566 #ifdef CONFIG_PCI_MSI
 567 static struct irq_chip sun4v_msi = {
 568         .typename       = "sun4v+msi",
 569         .mask           = mask_msi_irq,
 570         .unmask         = unmask_msi_irq,
 571         .enable         = sun4v_msi_enable,
 572         .disable        = sun4v_msi_disable,
 573         .ack            = run_pre_handler,
 574         .end            = sun4v_irq_end,
 575         .set_affinity   = sun4v_set_affinity,
 576 };
 577 #endif
 578
 579 static struct irq_chip sun4v_virq = {
 580         .typename       = "vsun4v",
 581         .enable         = sun4v_virq_enable,
 582         .disable        = sun4v_virq_disable,
 583         .end            = sun4v_virq_end,
 584         .set_affinity   = sun4v_virt_set_affinity,
 585 };
 586
 587 static struct irq_chip sun4v_virq_ack = {
 588         .typename       = "vsun4v+ack",
 589         .enable         = sun4v_virq_enable,
 590         .disable        = sun4v_virq_disable,
 591         .ack            = run_pre_handler,
 592         .end            = sun4v_virq_end,
 593         .set_affinity   = sun4v_virt_set_affinity,
 594 };
 595
 596 void irq_install_pre_handler(int virt_irq,
 597                              void (*func)(unsigned int, void *, void *),
 598                              void *arg1, void *arg2)
 599 {
 600         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 601         struct irq_chip *chip;
 602
 603         data->pre_handler = func;
 604         data->pre_handler_arg1 = arg1;
 605         data->pre_handler_arg2 = arg2;
 606
 607         chip = get_irq_chip(virt_irq);
 608         if (chip == &sun4u_irq_ack ||
 609             chip == &sun4v_irq_ack ||
 610             chip == &sun4v_virq_ack
 611 #ifdef CONFIG_PCI_MSI
 612             || chip == &sun4v_msi
 613 #endif
 614             )
 615                 return;
 616
 617         chip = (chip == &sun4u_irq ?
 618                 &sun4u_irq_ack :
 619                 (chip == &sun4v_irq ?
 620                  &sun4v_irq_ack : &sun4v_virq_ack));
 621         set_irq_chip(virt_irq, chip);
 622 }
 623
 624 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 625 {
 626         struct ino_bucket *bucket;
 627         struct irq_handler_data *data;
 628         int ino;
 629
 630         BUG_ON(tlb_type == hypervisor);
 631
 632         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 633         bucket = &ivector_table[ino];
 634         if (!bucket->virt_irq) {
 635                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 636                 set_irq_chip(bucket->virt_irq, &sun4u_irq);
 637         }
 638
 639         data = get_irq_chip_data(bucket->virt_irq);
 640         if (unlikely(data))
 641                 goto out;
 642
 643         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 644         if (unlikely(!data)) {
 645                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 646                 prom_halt();
 647         }
 648         set_irq_chip_data(bucket->virt_irq, data);
 649
 650         data->imap  = imap;
 651         data->iclr  = iclr;
 652
 653 out:
 654         return bucket->virt_irq;
 655 }
 656
 657 static unsigned int sun4v_build_common(unsigned long sysino,
 658                                        struct irq_chip *chip)
 659 {
 660         struct ino_bucket *bucket;
 661         struct irq_handler_data *data;
 662
 663         BUG_ON(tlb_type != hypervisor);
 664
 665         bucket = &ivector_table[sysino];
 666         if (!bucket->virt_irq) {
 667                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 668                 set_irq_chip(bucket->virt_irq, chip);
 669         }
 670
 671         data = get_irq_chip_data(bucket->virt_irq);
 672         if (unlikely(data))
 673                 goto out;
 674
 675         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 676         if (unlikely(!data)) {
 677                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 678                 prom_halt();
 679         }
 680         set_irq_chip_data(bucket->virt_irq, data);
 681
 682         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 683          * is done by hypervisor calls on sun4v platforms, not by direct
 684          * register accesses.
 685          */
 686         data->imap = ~0UL;
 687         data->iclr = ~0UL;
 688
 689 out:
 690         return bucket->virt_irq;
 691 }
 692
 693 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 694 {
 695         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
 696
 697         return sun4v_build_common(sysino, &sun4v_irq);
 698 }
 699
 700 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
 701 {
 702         unsigned long sysino, hv_err;
 703         unsigned int virq;
 704
 705         BUG_ON(devhandle & devino);
 706
 707         sysino = devhandle | devino;
 708         BUG_ON(sysino & ~(IMAP_IGN | IMAP_INO));
 709
 710         hv_err = sun4v_vintr_set_cookie(devhandle, devino, sysino);
 711         if (hv_err) {
 712                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
 713                             "err=%lu\n", devhandle, devino, hv_err);
 714                 prom_halt();
 715         }
 716
 717         virq = sun4v_build_common(sysino, &sun4v_virq);
 718
 719         virt_to_real_irq_table[virq].dev_handle = devhandle;
 720         virt_to_real_irq_table[virq].dev_ino = devino;
 721
 722         return virq;
 723 }
 724
 725 #ifdef CONFIG_PCI_MSI
 726 unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
 727                              unsigned int msi_start, unsigned int msi_end)
 728 {
 729         struct ino_bucket *bucket;
 730         struct irq_handler_data *data;
 731         unsigned long sysino;
 732         unsigned int devino;
 733
 734         BUG_ON(tlb_type != hypervisor);
 735
 736         /* Find a free devino in the given range.  */
 737         for (devino = msi_start; devino < msi_end; devino++) {
 738                 sysino = sun4v_devino_to_sysino(devhandle, devino);
 739                 bucket = &ivector_table[sysino];
 740                 if (!bucket->virt_irq)
 741                         break;
 742         }
 743         if (devino >= msi_end)
 744                 return 0;
 745
 746         sysino = sun4v_devino_to_sysino(devhandle, devino);
 747         bucket = &ivector_table[sysino];
 748         bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 749         *virt_irq_p = bucket->virt_irq;
 750         set_irq_chip(bucket->virt_irq, &sun4v_msi);
 751
 752         data = get_irq_chip_data(bucket->virt_irq);
 753         if (unlikely(data))
 754                 return devino;
 755
 756         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 757         if (unlikely(!data)) {
 758                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 759                 prom_halt();
 760         }
 761         set_irq_chip_data(bucket->virt_irq, data);
 762
 763         data->imap = ~0UL;
 764         data->iclr = ~0UL;
 765
 766         return devino;
 767 }
 768
 769 void sun4v_destroy_msi(unsigned int virt_irq)
 770 {
 771         virt_irq_free(virt_irq);
 772 }
 773 #endif
 774
 775 void ack_bad_irq(unsigned int virt_irq)
 776 {
 777         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 778         unsigned int ino = 0xdeadbeef;
 779
 780         if (bucket)
 781                 ino = bucket - &ivector_table[0];
 782
 783         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 784                ino, virt_irq);
 785 }
 786
 787 void handler_irq(int irq, struct pt_regs *regs)
 788 {
 789         struct ino_bucket *bucket;
 790         struct pt_regs *old_regs;
 791
 792         clear_softint(1 << irq);
 793
 794         old_regs = set_irq_regs(regs);
 795         irq_enter();
 796
 797         /* Sliiiick... */
 798         bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0));
 799         while (bucket) {
 800                 struct ino_bucket *next = __bucket(bucket->irq_chain);
 801
 802                 bucket->irq_chain = 0;
 803                 __do_IRQ(bucket->virt_irq);
 804
 805                 bucket = next;
 806         }
 807
 808         irq_exit();
 809         set_irq_regs(old_regs);
 810 }
 811
 812 #ifdef CONFIG_HOTPLUG_CPU
 813 void fixup_irqs(void)
 814 {
 815         unsigned int irq;
 816
 817         for (irq = 0; irq < NR_IRQS; irq++) {
 818                 unsigned long flags;
 819
 820                 spin_lock_irqsave(&irq_desc[irq].lock, flags);
 821                 if (irq_desc[irq].action &&
 822                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
 823                         if (irq_desc[irq].chip->set_affinity)
 824                                 irq_desc[irq].chip->set_affinity(irq,
 825                                         irq_desc[irq].affinity);
 826                 }
 827                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
 828         }
 829 }
 830 #endif
 831
 832 struct sun5_timer {
 833         u64     count0;
 834         u64     limit0;
 835         u64     count1;
 836         u64     limit1;
 837 };
 838
 839 static struct sun5_timer *prom_timers;
 840 static u64 prom_limit0, prom_limit1;
 841
 842 static void map_prom_timers(void)
 843 {
 844         struct device_node *dp;
 845         const unsigned int *addr;
 846
 847         /* PROM timer node hangs out in the top level of device siblings... */
 848         dp = of_find_node_by_path("/");
 849         dp = dp->child;
 850         while (dp) {
 851                 if (!strcmp(dp->name, "counter-timer"))
 852                         break;
 853                 dp = dp->sibling;
 854         }
 855
 856         /* Assume if node is not present, PROM uses different tick mechanism
 857          * which we should not care about.
 858          */
 859         if (!dp) {
 860                 prom_timers = (struct sun5_timer *) 0;
 861                 return;
 862         }
 863
 864         /* If PROM is really using this, it must be mapped by him. */
 865         addr = of_get_property(dp, "address", NULL);
 866         if (!addr) {
 867                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 868                 prom_timers = (struct sun5_timer *) 0;
 869                 return;
 870         }
 871         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 872 }
 873
 874 static void kill_prom_timer(void)
 875 {
 876         if (!prom_timers)
 877                 return;
 878
 879         /* Save them away for later. */
 880         prom_limit0 = prom_timers->limit0;
 881         prom_limit1 = prom_timers->limit1;
 882
 883         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 884          * We turn both off here just to be paranoid.
 885          */
 886         prom_timers->limit0 = 0;
 887         prom_timers->limit1 = 0;
 888
 889         /* Wheee, eat the interrupt packet too... */
 890         __asm__ __volatile__(
 891 "       mov     0x40, %%g2\n"
 892 "       ldxa    [%%g0] %0, %%g1\n"
 893 "       ldxa    [%%g2] %1, %%g1\n"
 894 "       stxa    %%g0, [%%g0] %0\n"
 895 "       membar  #Sync\n"
 896         : /* no outputs */
 897         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 898         : "g1", "g2");
 899 }
 900
 901 void init_irqwork_curcpu(void)
 902 {
 903         int cpu = hard_smp_processor_id();
 904
 905         trap_block[cpu].irq_worklist = 0;
 906 }
 907
 908 /* Please be very careful with register_one_mondo() and
 909  * sun4v_register_mondo_queues().
 910  *
 911  * On SMP this gets invoked from the CPU trampoline before
 912  * the cpu has fully taken over the trap table from OBP,
 913  * and it's kernel stack + %g6 thread register state is
 914  * not fully cooked yet.
 915  *
 916  * Therefore you cannot make any OBP calls, not even prom_printf,
 917  * from these two routines.
 918  */
 919 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
 920 {
 921         unsigned long num_entries = (qmask + 1) / 64;
 922         unsigned long status;
 923
 924         status = sun4v_cpu_qconf(type, paddr, num_entries);
 925         if (status != HV_EOK) {
 926                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 927                             "err %lu\n", type, paddr, num_entries, status);
 928                 prom_halt();
 929         }
 930 }
 931
 932 static void __cpuinit sun4v_register_mondo_queues(int this_cpu)
 933 {
 934         struct trap_per_cpu *tb = &trap_block[this_cpu];
 935
 936         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
 937                            tb->cpu_mondo_qmask);
 938         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
 939                            tb->dev_mondo_qmask);
 940         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
 941                            tb->resum_qmask);
 942         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
 943                            tb->nonresum_qmask);
 944 }
 945
 946 static void __cpuinit alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask, int use_bootmem)
 947 {
 948         unsigned long size = PAGE_ALIGN(qmask + 1);
 949         unsigned long order = get_order(size);
 950         void *p = NULL;
 951
 952         if (use_bootmem) {
 953                 p = __alloc_bootmem_low(size, size, 0);
 954         } else {
 955                 struct page *page = alloc_pages(GFP_ATOMIC | __GFP_ZERO, order);
 956                 if (page)
 957                         p = page_address(page);
 958         }
 959
 960         if (!p) {
 961                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 962                 prom_halt();
 963         }
 964
 965         *pa_ptr = __pa(p);
 966 }
 967
 968 static void __cpuinit alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask, int use_bootmem)
 969 {
 970         unsigned long size = PAGE_ALIGN(qmask + 1);
 971         unsigned long order = get_order(size);
 972         void *p = NULL;
 973
 974         if (use_bootmem) {
 975                 p = __alloc_bootmem_low(size, size, 0);
 976         } else {
 977                 struct page *page = alloc_pages(GFP_ATOMIC | __GFP_ZERO, order);
 978                 if (page)
 979                         p = page_address(page);
 980         }
 981
 982         if (!p) {
 983                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 984                 prom_halt();
 985         }
 986
 987         *pa_ptr = __pa(p);
 988 }
 989
 990 static void __cpuinit init_cpu_send_mondo_info(struct trap_per_cpu *tb, int use_bootmem)
 991 {
 992 #ifdef CONFIG_SMP
 993         void *page;
 994
 995         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 996
 997         if (use_bootmem)
 998                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 999         else
1000                 page = (void *) get_zeroed_page(GFP_ATOMIC);
1001
1002         if (!page) {
1003                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
1004                 prom_halt();
1005         }
1006
1007         tb->cpu_mondo_block_pa = __pa(page);
1008         tb->cpu_list_pa = __pa(page + 64);
1009 #endif
1010 }
1011
1012 /* Allocate and register the mondo and error queues for this cpu.  */
1013 void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load)
1014 {
1015         struct trap_per_cpu *tb = &trap_block[cpu];
1016
1017         if (alloc) {
1018                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask, use_bootmem);
1019                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask, use_bootmem);
1020                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask, use_bootmem);
1021                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask, use_bootmem);
1022                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask, use_bootmem);
1023                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, tb->nonresum_qmask, use_bootmem);
1024
1025                 init_cpu_send_mondo_info(tb, use_bootmem);
1026         }
1027
1028         if (load) {
1029                 if (cpu != hard_smp_processor_id()) {
1030                         prom_printf("SUN4V: init mondo on cpu %d not %d\n",
1031                                     cpu, hard_smp_processor_id());
1032                         prom_halt();
1033                 }
1034                 sun4v_register_mondo_queues(cpu);
1035         }
1036 }
1037
1038 static struct irqaction timer_irq_action = {
1039         .name = "timer",
1040 };
1041
1042 /* Only invoked on boot processor. */
1043 void __init init_IRQ(void)
1044 {
1045         map_prom_timers();
1046         kill_prom_timer();
1047         memset(&ivector_table[0], 0, sizeof(ivector_table));
1048
1049         if (tlb_type == hypervisor)
1050                 sun4v_init_mondo_queues(1, hard_smp_processor_id(), 1, 1);
1051
1052         /* We need to clear any IRQ's pending in the soft interrupt
1053          * registers, a spurious one could be left around from the
1054          * PROM timer which we just disabled.
1055          */
1056         clear_softint(get_softint());
1057
1058         /* Now that ivector table is initialized, it is safe
1059          * to receive IRQ vector traps.  We will normally take
1060          * one or two right now, in case some device PROM used
1061          * to boot us wants to speak to us.  We just ignore them.
1062          */
1063         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1064                              "or        %%g1, %0, %%g1\n\t"
1065                              "wrpr      %%g1, 0x0, %%pstate"
1066                              : /* No outputs */
1067                              : "i" (PSTATE_IE)
1068                              : "g1");
1069
1070         irq_desc[0].action = &timer_irq_action;
1071 }