1 /* $Id: pci_common.c,v 1.29 2002/02/01 00:56:03 davem Exp $
2 * pci_common.c: PCI controller common support.
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
7 #include <linux/string.h>
8 #include <linux/slab.h>
9 #include <linux/init.h>
13 #include <asm/of_device.h>
17 /* Fix self device of BUS and hook it into BUS->self.
18 * The pci_scan_bus does not do this for the host bridge.
20 void __init pci_fixup_host_bridge_self(struct pci_bus *pbus)
24 list_for_each_entry(pdev, &pbus->devices, bus_list) {
25 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_HOST) {
31 prom_printf("PCI: Critical error, cannot find host bridge PDEV.\n");
35 /* Find the OBP PROM device tree node for a PCI device. */
36 static struct device_node * __init
37 find_device_prom_node(struct pci_pbm_info *pbm, struct pci_dev *pdev,
38 struct device_node *bus_node,
39 struct linux_prom_pci_registers **pregs,
42 struct device_node *dp;
47 * Return the PBM's PROM node in case we are it's PCI device,
48 * as the PBM's reg property is different to standard PCI reg
49 * properties. We would delete this device entry otherwise,
50 * which confuses XFree86's device probing...
52 if ((pdev->bus->number == pbm->pci_bus->number) && (pdev->devfn == 0) &&
53 (pdev->vendor == PCI_VENDOR_ID_SUN) &&
54 (pdev->device == PCI_DEVICE_ID_SUN_PBM ||
55 pdev->device == PCI_DEVICE_ID_SUN_SCHIZO ||
56 pdev->device == PCI_DEVICE_ID_SUN_TOMATILLO ||
57 pdev->device == PCI_DEVICE_ID_SUN_SABRE ||
58 pdev->device == PCI_DEVICE_ID_SUN_HUMMINGBIRD))
63 struct linux_prom_pci_registers *regs;
64 struct property *prop;
67 prop = of_find_property(dp, "reg", &len);
72 if (((regs[0].phys_hi >> 8) & 0xff) == pdev->devfn) {
74 *nregs = len / sizeof(struct linux_prom_pci_registers);
85 /* Older versions of OBP on PCI systems encode 64-bit MEM
86 * space assignments incorrectly, this fixes them up. We also
87 * take the opportunity here to hide other kinds of bogus
90 static void __init fixup_obp_assignments(struct pci_dev *pdev,
91 struct pcidev_cookie *pcp)
95 if (pdev->vendor == PCI_VENDOR_ID_AL &&
96 (pdev->device == PCI_DEVICE_ID_AL_M7101 ||
97 pdev->device == PCI_DEVICE_ID_AL_M1533)) {
100 /* Zap all of the normal resources, they are
101 * meaningless and generate bogus resource collision
102 * messages. This is OpenBoot's ill-fated attempt to
103 * represent the implicit resources that these devices
106 pcp->num_prom_assignments = 0;
107 for (i = 0; i < 6; i++) {
108 pdev->resource[i].start =
109 pdev->resource[i].end =
110 pdev->resource[i].flags = 0;
112 pdev->resource[PCI_ROM_RESOURCE].start =
113 pdev->resource[PCI_ROM_RESOURCE].end =
114 pdev->resource[PCI_ROM_RESOURCE].flags = 0;
118 for (i = 0; i < pcp->num_prom_assignments; i++) {
119 struct linux_prom_pci_registers *ap;
122 ap = &pcp->prom_assignments[i];
123 space = ap->phys_hi >> 24;
124 if ((space & 0x3) == 2 &&
125 (space & 0x4) != 0) {
126 ap->phys_hi &= ~(0x7 << 24);
127 ap->phys_hi |= 0x3 << 24;
132 /* Fill in the PCI device cookie sysdata for the given
133 * PCI device. This cookie is the means by which one
134 * can get to OBP and PCI controller specific information
137 static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
138 struct pci_dev *pdev,
139 struct device_node *bus_node)
141 struct linux_prom_pci_registers *pregs = NULL;
142 struct pcidev_cookie *pcp;
143 struct device_node *dp;
144 struct property *prop;
147 dp = find_device_prom_node(pbm, pdev, bus_node,
150 /* If it is not in the OBP device tree then
151 * there must be a damn good reason for it.
153 * So what we do is delete the device from the
154 * PCI device tree completely. This scenario
155 * is seen, for example, on CP1500 for the
156 * second EBUS/HappyMeal pair if the external
157 * connector for it is not present.
159 pci_remove_bus_device(pdev);
163 pcp = kzalloc(sizeof(*pcp), GFP_ATOMIC);
165 prom_printf("PCI_COOKIE: Fatal malloc error, aborting...\n");
170 pcp->op = of_find_device_by_node(dp);
171 memcpy(pcp->prom_regs, pregs,
172 nregs * sizeof(struct linux_prom_pci_registers));
173 pcp->num_prom_regs = nregs;
175 /* We can't have the pcidev_cookie assignments be just
176 * direct pointers into the property value, since they
177 * are potentially modified by the probing process.
179 prop = of_find_property(dp, "assigned-addresses", &len);
181 pcp->num_prom_assignments = 0;
183 memcpy(pcp->prom_assignments, prop->value, len);
184 pcp->num_prom_assignments =
185 (len / sizeof(pcp->prom_assignments[0]));
188 if (strcmp(dp->name, "ebus") == 0) {
189 struct linux_prom_ebus_ranges *erng;
192 /* EBUS is special... */
193 prop = of_find_property(dp, "ranges", &len);
195 prom_printf("EBUS: Fatal error, no range property\n");
199 len = (len / sizeof(erng[0]));
200 for (iter = 0; iter < len; iter++) {
201 struct linux_prom_ebus_ranges *ep = &erng[iter];
202 struct linux_prom_pci_registers *ap;
204 ap = &pcp->prom_assignments[iter];
206 ap->phys_hi = ep->parent_phys_hi;
207 ap->phys_mid = ep->parent_phys_mid;
208 ap->phys_lo = ep->parent_phys_lo;
210 ap->size_lo = ep->size;
212 pcp->num_prom_assignments = len;
215 fixup_obp_assignments(pdev, pcp);
220 void __init pci_fill_in_pbm_cookies(struct pci_bus *pbus,
221 struct pci_pbm_info *pbm,
222 struct device_node *dp)
224 struct pci_dev *pdev, *pdev_next;
225 struct pci_bus *this_pbus, *pbus_next;
227 /* This must be _safe because the cookie fillin
228 routine can delete devices from the tree. */
229 list_for_each_entry_safe(pdev, pdev_next, &pbus->devices, bus_list)
230 pdev_cookie_fillin(pbm, pdev, dp);
232 list_for_each_entry_safe(this_pbus, pbus_next, &pbus->children, node) {
233 struct pcidev_cookie *pcp = this_pbus->self->sysdata;
235 pci_fill_in_pbm_cookies(this_pbus, pbm, pcp->prom_node);
239 static void __init bad_assignment(struct pci_dev *pdev,
240 struct linux_prom_pci_registers *ap,
241 struct resource *res,
244 prom_printf("PCI: Bogus PROM assignment. BUS[%02x] DEVFN[%x]\n",
245 pdev->bus->number, pdev->devfn);
247 prom_printf("PCI: phys[%08x:%08x:%08x] size[%08x:%08x]\n",
248 ap->phys_hi, ap->phys_mid, ap->phys_lo,
249 ap->size_hi, ap->size_lo);
251 prom_printf("PCI: RES[%016lx-->%016lx:(%lx)]\n",
252 res->start, res->end, res->flags);
257 static struct resource *
258 __init get_root_resource(struct linux_prom_pci_registers *ap,
259 struct pci_pbm_info *pbm)
261 int space = (ap->phys_hi >> 24) & 3;
265 /* Configuration space, silently ignore it. */
269 /* 16-bit IO space */
270 return &pbm->io_space;
273 /* 32-bit MEM space */
274 return &pbm->mem_space;
277 /* 64-bit MEM space, these are allocated out of
278 * the 32-bit mem_space range for the PBM, ie.
279 * we just zero out the upper 32-bits.
281 return &pbm->mem_space;
284 printk("PCI: What is resource space %x?\n", space);
289 static struct resource *
290 __init get_device_resource(struct linux_prom_pci_registers *ap,
291 struct pci_dev *pdev)
293 struct resource *res;
294 int breg = (ap->phys_hi & 0xff);
297 case PCI_ROM_ADDRESS:
298 /* Unfortunately I have seen several cases where
299 * buggy FCODE uses a space value of '1' (I/O space)
300 * in the register property for the ROM address
301 * so disable this sanity check for now.
305 int space = (ap->phys_hi >> 24) & 3;
307 /* It had better be MEM space. */
309 bad_assignment(pdev, ap, NULL, 0);
312 res = &pdev->resource[PCI_ROM_RESOURCE];
315 case PCI_BASE_ADDRESS_0:
316 case PCI_BASE_ADDRESS_1:
317 case PCI_BASE_ADDRESS_2:
318 case PCI_BASE_ADDRESS_3:
319 case PCI_BASE_ADDRESS_4:
320 case PCI_BASE_ADDRESS_5:
321 res = &pdev->resource[(breg - PCI_BASE_ADDRESS_0) / 4];
325 bad_assignment(pdev, ap, NULL, 0);
333 static int __init pdev_resource_collisions_expected(struct pci_dev *pdev)
335 if (pdev->vendor != PCI_VENDOR_ID_SUN)
338 if (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS ||
339 pdev->device == PCI_DEVICE_ID_SUN_RIO_1394 ||
340 pdev->device == PCI_DEVICE_ID_SUN_RIO_USB)
346 static void __init pdev_record_assignments(struct pci_pbm_info *pbm,
347 struct pci_dev *pdev)
349 struct pcidev_cookie *pcp = pdev->sysdata;
352 for (i = 0; i < pcp->num_prom_assignments; i++) {
353 struct linux_prom_pci_registers *ap;
354 struct resource *root, *res;
356 /* The format of this property is specified in
357 * the PCI Bus Binding to IEEE1275-1994.
359 ap = &pcp->prom_assignments[i];
360 root = get_root_resource(ap, pbm);
361 res = get_device_resource(ap, pdev);
362 if (root == NULL || res == NULL ||
366 /* Ok we know which resource this PROM assignment is
367 * for, sanity check it.
369 if ((res->start & 0xffffffffUL) != ap->phys_lo)
370 bad_assignment(pdev, ap, res, 1);
372 /* If it is a 64-bit MEM space assignment, verify that
373 * the resource is too and that the upper 32-bits match.
375 if (((ap->phys_hi >> 24) & 3) == 3) {
376 if (((res->flags & IORESOURCE_MEM) == 0) ||
377 ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
378 != PCI_BASE_ADDRESS_MEM_TYPE_64))
379 bad_assignment(pdev, ap, res, 1);
380 if ((res->start >> 32) != ap->phys_mid)
381 bad_assignment(pdev, ap, res, 1);
383 /* PBM cannot generate cpu initiated PIOs
384 * to the full 64-bit space. Therefore the
385 * upper 32-bits better be zero. If it is
386 * not, just skip it and we will assign it
387 * properly ourselves.
389 if ((res->start >> 32) != 0UL) {
390 printk(KERN_ERR "PCI: OBP assigns out of range MEM address "
391 "%016lx for region %ld on device %s\n",
392 res->start, (res - &pdev->resource[0]), pci_name(pdev));
397 /* Adjust the resource into the physical address space
400 pbm->parent->resource_adjust(pdev, res, root);
402 if (request_resource(root, res) < 0) {
403 /* OK, there is some conflict. But this is fine
404 * since we'll reassign it in the fixup pass.
406 * We notify the user that OBP made an error if it
407 * is a case we don't expect.
409 if (!pdev_resource_collisions_expected(pdev)) {
410 printk(KERN_ERR "PCI: Address space collision on region %ld "
411 "[%016lx:%016lx] of device %s\n",
412 (res - &pdev->resource[0]),
413 res->start, res->end,
420 void __init pci_record_assignments(struct pci_pbm_info *pbm,
421 struct pci_bus *pbus)
426 list_for_each_entry(dev, &pbus->devices, bus_list)
427 pdev_record_assignments(pbm, dev);
429 list_for_each_entry(bus, &pbus->children, node)
430 pci_record_assignments(pbm, bus);
433 /* Return non-zero if PDEV has implicit I/O resources even
434 * though it may not have an I/O base address register
437 static int __init has_implicit_io(struct pci_dev *pdev)
439 int class = pdev->class >> 8;
441 if (class == PCI_CLASS_NOT_DEFINED ||
442 class == PCI_CLASS_NOT_DEFINED_VGA ||
443 class == PCI_CLASS_STORAGE_IDE ||
444 (pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
450 static void __init pdev_assign_unassigned(struct pci_pbm_info *pbm,
451 struct pci_dev *pdev)
455 int i, io_seen, mem_seen;
457 io_seen = mem_seen = 0;
458 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
459 struct resource *root, *res;
460 unsigned long size, min, max, align;
462 res = &pdev->resource[i];
464 if (res->flags & IORESOURCE_IO)
466 else if (res->flags & IORESOURCE_MEM)
469 /* If it is already assigned or the resource does
470 * not exist, there is nothing to do.
472 if (res->parent != NULL || res->flags == 0UL)
475 /* Determine the root we allocate from. */
476 if (res->flags & IORESOURCE_IO) {
477 root = &pbm->io_space;
478 min = root->start + 0x400UL;
481 root = &pbm->mem_space;
483 max = min + 0x80000000UL;
486 size = res->end - res->start;
488 if (allocate_resource(root, res, size + 1, min, max, align, NULL, NULL) < 0) {
490 prom_printf("PCI: Failed to allocate resource %d for %s\n",
495 /* Update PCI config space. */
496 pbm->parent->base_address_update(pdev, i);
499 /* Special case, disable the ROM. Several devices
500 * act funny (ie. do not respond to memory space writes)
501 * when it is left enabled. A good example are Qlogic,ISP
504 pci_read_config_dword(pdev, PCI_ROM_ADDRESS, ®);
505 reg &= ~PCI_ROM_ADDRESS_ENABLE;
506 pci_write_config_dword(pdev, PCI_ROM_ADDRESS, reg);
508 /* If we saw I/O or MEM resources, enable appropriate
509 * bits in PCI command register.
511 if (io_seen || mem_seen) {
512 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
513 if (io_seen || has_implicit_io(pdev))
514 cmd |= PCI_COMMAND_IO;
516 cmd |= PCI_COMMAND_MEMORY;
517 pci_write_config_word(pdev, PCI_COMMAND, cmd);
520 /* If this is a PCI bridge or an IDE controller,
521 * enable bus mastering. In the former case also
522 * set the cache line size correctly.
524 if (((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI) ||
525 (((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) &&
526 ((pdev->class & 0x80) != 0))) {
527 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
528 cmd |= PCI_COMMAND_MASTER;
529 pci_write_config_word(pdev, PCI_COMMAND, cmd);
531 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
532 pci_write_config_byte(pdev,
538 void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
539 struct pci_bus *pbus)
544 list_for_each_entry(dev, &pbus->devices, bus_list)
545 pdev_assign_unassigned(pbm, dev);
547 list_for_each_entry(bus, &pbus->children, node)
548 pci_assign_unassigned(pbm, bus);
551 static void __init pdev_fixup_irq(struct pci_dev *pdev)
553 struct pcidev_cookie *pcp = pdev->sysdata;
554 struct of_device *op = pcp->op;
556 if (op->irqs[0] == 0xffffffff) {
557 pdev->irq = PCI_IRQ_NONE;
561 pdev->irq = op->irqs[0];
563 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
564 pdev->irq & PCI_IRQ_INO);
567 void __init pci_fixup_irq(struct pci_pbm_info *pbm,
568 struct pci_bus *pbus)
573 list_for_each_entry(dev, &pbus->devices, bus_list)
576 list_for_each_entry(bus, &pbus->children, node)
577 pci_fixup_irq(pbm, bus);
580 static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz)
583 u8 hdr_type, min_gnt, ltimer;
585 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
586 cmd |= PCI_COMMAND_MASTER;
587 pci_write_config_word(pdev, PCI_COMMAND, cmd);
589 /* Read it back, if the mastering bit did not
590 * get set, the device does not support bus
591 * mastering so we have nothing to do here.
593 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
594 if ((cmd & PCI_COMMAND_MASTER) == 0)
597 /* Set correct cache line size, 64-byte on all
598 * Sparc64 PCI systems. Note that the value is
599 * measured in 32-bit words.
601 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
604 pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type);
606 if (hdr_type != PCI_HEADER_TYPE_NORMAL)
609 /* If the latency timer is already programmed with a non-zero
610 * value, assume whoever set it (OBP or whoever) knows what
613 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, <imer);
617 /* XXX Since I'm tipping off the min grant value to
618 * XXX choose a suitable latency timer value, I also
619 * XXX considered making use of the max latency value
620 * XXX as well. Unfortunately I've seen too many bogusly
621 * XXX low settings for it to the point where it lacks
622 * XXX any usefulness. In one case, an ethernet card
623 * XXX claimed a min grant of 10 and a max latency of 5.
624 * XXX Now, if I had two such cards on the same bus I
625 * XXX could not set the desired burst period (calculated
626 * XXX from min grant) without violating the max latency
629 * XXX I blame dumb PC bios implementors for stuff like
630 * XXX this, most of them don't even try to do something
631 * XXX sensible with latency timer values and just set some
632 * XXX default value (usually 32) into every device.
635 pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt);
638 /* If no min_gnt setting then use a default
653 /* Use a default value when the min_gnt value
654 * is erroneously high.
656 if (((unsigned int) min_gnt << shift_factor) > 512 ||
657 ((min_gnt << shift_factor) & 0xff) == 0) {
658 ltimer = 8 << shift_factor;
660 ltimer = min_gnt << shift_factor;
664 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer);
667 void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
668 struct pci_bus *pbus)
670 struct pci_dev *pdev;
674 if (pbm->is_66mhz_capable == 0) {
680 list_for_each_entry(pdev, &pbus->devices, bus_list) {
681 pci_read_config_word(pdev, PCI_STATUS, &status);
682 if (!(status & PCI_STATUS_66MHZ)) {
688 pbm->all_devs_66mhz = all_are_66mhz;
690 printk("PCI%d(PBM%c): Bus running at %dMHz\n",
692 (pbm == &pbm->parent->pbm_A) ? 'A' : 'B',
693 (all_are_66mhz ? 66 : 33));
696 void pci_setup_busmastering(struct pci_pbm_info *pbm,
697 struct pci_bus *pbus)
703 is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz;
705 list_for_each_entry(dev, &pbus->devices, bus_list)
706 pdev_setup_busmastering(dev, is_66mhz);
708 list_for_each_entry(bus, &pbus->children, node)
709 pci_setup_busmastering(pbm, bus);
712 void pci_register_legacy_regions(struct resource *io_res,
713 struct resource *mem_res)
718 p = kzalloc(sizeof(*p), GFP_KERNEL);
722 p->name = "Video RAM area";
723 p->start = mem_res->start + 0xa0000UL;
724 p->end = p->start + 0x1ffffUL;
725 p->flags = IORESOURCE_BUSY;
726 request_resource(mem_res, p);
728 p = kzalloc(sizeof(*p), GFP_KERNEL);
732 p->name = "System ROM";
733 p->start = mem_res->start + 0xf0000UL;
734 p->end = p->start + 0xffffUL;
735 p->flags = IORESOURCE_BUSY;
736 request_resource(mem_res, p);
738 p = kzalloc(sizeof(*p), GFP_KERNEL);
742 p->name = "Video ROM";
743 p->start = mem_res->start + 0xc0000UL;
744 p->end = p->start + 0x7fffUL;
745 p->flags = IORESOURCE_BUSY;
746 request_resource(mem_res, p);
749 /* Generic helper routines for PCI error reporting. */
750 void pci_scan_for_target_abort(struct pci_controller_info *p,
751 struct pci_pbm_info *pbm,
752 struct pci_bus *pbus)
754 struct pci_dev *pdev;
757 list_for_each_entry(pdev, &pbus->devices, bus_list) {
758 u16 status, error_bits;
760 pci_read_config_word(pdev, PCI_STATUS, &status);
762 (status & (PCI_STATUS_SIG_TARGET_ABORT |
763 PCI_STATUS_REC_TARGET_ABORT));
765 pci_write_config_word(pdev, PCI_STATUS, error_bits);
766 printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n",
767 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
768 pci_name(pdev), status);
772 list_for_each_entry(bus, &pbus->children, node)
773 pci_scan_for_target_abort(p, pbm, bus);
776 void pci_scan_for_master_abort(struct pci_controller_info *p,
777 struct pci_pbm_info *pbm,
778 struct pci_bus *pbus)
780 struct pci_dev *pdev;
783 list_for_each_entry(pdev, &pbus->devices, bus_list) {
784 u16 status, error_bits;
786 pci_read_config_word(pdev, PCI_STATUS, &status);
788 (status & (PCI_STATUS_REC_MASTER_ABORT));
790 pci_write_config_word(pdev, PCI_STATUS, error_bits);
791 printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n",
792 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
793 pci_name(pdev), status);
797 list_for_each_entry(bus, &pbus->children, node)
798 pci_scan_for_master_abort(p, pbm, bus);
801 void pci_scan_for_parity_error(struct pci_controller_info *p,
802 struct pci_pbm_info *pbm,
803 struct pci_bus *pbus)
805 struct pci_dev *pdev;
808 list_for_each_entry(pdev, &pbus->devices, bus_list) {
809 u16 status, error_bits;
811 pci_read_config_word(pdev, PCI_STATUS, &status);
813 (status & (PCI_STATUS_PARITY |
814 PCI_STATUS_DETECTED_PARITY));
816 pci_write_config_word(pdev, PCI_STATUS, error_bits);
817 printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n",
818 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
819 pci_name(pdev), status);
823 list_for_each_entry(bus, &pbus->children, node)
824 pci_scan_for_parity_error(p, pbm, bus);