1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/config.h>
13 #include <linux/errno.h>
14 #include <linux/module.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/param.h>
18 #include <linux/string.h>
20 #include <linux/interrupt.h>
21 #include <linux/time.h>
22 #include <linux/timex.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/mc146818rtc.h>
26 #include <linux/delay.h>
27 #include <linux/profile.h>
28 #include <linux/bcd.h>
29 #include <linux/jiffies.h>
30 #include <linux/cpufreq.h>
31 #include <linux/percpu.h>
32 #include <linux/profile.h>
33 #include <linux/miscdevice.h>
34 #include <linux/rtc.h>
36 #include <asm/oplib.h>
37 #include <asm/mostek.h>
38 #include <asm/timer.h>
42 #include <asm/of_device.h>
43 #include <asm/starfire.h>
45 #include <asm/sections.h>
46 #include <asm/cpudata.h>
47 #include <asm/uaccess.h>
50 DEFINE_SPINLOCK(mostek_lock);
51 DEFINE_SPINLOCK(rtc_lock);
52 void __iomem *mstk48t02_regs = NULL;
54 unsigned long ds1287_regs = 0UL;
57 extern unsigned long wall_jiffies;
59 static void __iomem *mstk48t08_regs;
60 static void __iomem *mstk48t59_regs;
62 static int set_rtc_mmss(unsigned long);
64 #define TICK_PRIV_BIT (1UL << 63)
67 unsigned long profile_pc(struct pt_regs *regs)
69 unsigned long pc = instruction_pointer(regs);
71 if (in_lock_functions(pc))
72 return regs->u_regs[UREG_RETPC];
75 EXPORT_SYMBOL(profile_pc);
78 static void tick_disable_protection(void)
80 /* Set things up so user can access tick register for profiling
81 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
82 * read back of %tick after writing it.
88 "1: rd %%tick, %%g2\n"
89 " add %%g2, 6, %%g2\n"
90 " andn %%g2, %0, %%g2\n"
91 " wrpr %%g2, 0, %%tick\n"
98 static void tick_init_tick(unsigned long offset)
100 tick_disable_protection();
102 __asm__ __volatile__(
104 " andn %%g1, %1, %%g1\n"
106 " add %%g1, %0, %%g1\n"
108 "1: wr %%g1, 0x0, %%tick_cmpr\n"
109 " rd %%tick_cmpr, %%g0"
111 : "r" (offset), "r" (TICK_PRIV_BIT)
115 static unsigned long tick_get_tick(void)
119 __asm__ __volatile__("rd %%tick, %0\n\t"
123 return ret & ~TICK_PRIV_BIT;
126 static unsigned long tick_get_compare(void)
130 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
137 static unsigned long tick_add_compare(unsigned long adj)
139 unsigned long new_compare;
141 /* Workaround for Spitfire Errata (#54 I think??), I discovered
142 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
145 * On Blackbird writes to %tick_cmpr can fail, the
146 * workaround seems to be to execute the wr instruction
147 * at the start of an I-cache line, and perform a dummy
148 * read back from %tick_cmpr right after writing to it. -DaveM
150 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
151 "ba,pt %%xcc, 1f\n\t"
152 " add %0, %1, %0\n\t"
155 "wr %0, 0, %%tick_cmpr\n\t"
156 "rd %%tick_cmpr, %%g0"
157 : "=&r" (new_compare)
163 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
165 unsigned long new_tick, tmp;
167 /* Also need to handle Blackbird bug here too. */
168 __asm__ __volatile__("rd %%tick, %0\n\t"
170 "wrpr %0, 0, %%tick\n\t"
171 "andn %0, %4, %1\n\t"
172 "ba,pt %%xcc, 1f\n\t"
173 " add %1, %3, %1\n\t"
176 "wr %1, 0, %%tick_cmpr\n\t"
177 "rd %%tick_cmpr, %%g0"
178 : "=&r" (new_tick), "=&r" (tmp)
179 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
184 static struct sparc64_tick_ops tick_operations __read_mostly = {
185 .init_tick = tick_init_tick,
186 .get_tick = tick_get_tick,
187 .get_compare = tick_get_compare,
188 .add_tick = tick_add_tick,
189 .add_compare = tick_add_compare,
190 .softint_mask = 1UL << 0,
193 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
195 static void stick_init_tick(unsigned long offset)
197 /* Writes to the %tick and %stick register are not
198 * allowed on sun4v. The Hypervisor controls that
201 if (tlb_type != hypervisor) {
202 tick_disable_protection();
204 /* Let the user get at STICK too. */
205 __asm__ __volatile__(
206 " rd %%asr24, %%g2\n"
207 " andn %%g2, %0, %%g2\n"
208 " wr %%g2, 0, %%asr24"
210 : "r" (TICK_PRIV_BIT)
214 __asm__ __volatile__(
215 " rd %%asr24, %%g1\n"
216 " andn %%g1, %1, %%g1\n"
217 " add %%g1, %0, %%g1\n"
218 " wr %%g1, 0x0, %%asr25"
220 : "r" (offset), "r" (TICK_PRIV_BIT)
224 static unsigned long stick_get_tick(void)
228 __asm__ __volatile__("rd %%asr24, %0"
231 return ret & ~TICK_PRIV_BIT;
234 static unsigned long stick_get_compare(void)
238 __asm__ __volatile__("rd %%asr25, %0"
244 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
246 unsigned long new_tick, tmp;
248 __asm__ __volatile__("rd %%asr24, %0\n\t"
250 "wr %0, 0, %%asr24\n\t"
251 "andn %0, %4, %1\n\t"
254 : "=&r" (new_tick), "=&r" (tmp)
255 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
260 static unsigned long stick_add_compare(unsigned long adj)
262 unsigned long new_compare;
264 __asm__ __volatile__("rd %%asr25, %0\n\t"
267 : "=&r" (new_compare)
273 static struct sparc64_tick_ops stick_operations __read_mostly = {
274 .init_tick = stick_init_tick,
275 .get_tick = stick_get_tick,
276 .get_compare = stick_get_compare,
277 .add_tick = stick_add_tick,
278 .add_compare = stick_add_compare,
279 .softint_mask = 1UL << 16,
282 /* On Hummingbird the STICK/STICK_CMPR register is implemented
283 * in I/O space. There are two 64-bit registers each, the
284 * first holds the low 32-bits of the value and the second holds
287 * Since STICK is constantly updating, we have to access it carefully.
289 * The sequence we use to read is:
292 * 3) read high again, if it rolled re-read both low and high again.
294 * Writing STICK safely is also tricky:
295 * 1) write low to zero
299 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
300 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
302 static unsigned long __hbird_read_stick(void)
304 unsigned long ret, tmp1, tmp2, tmp3;
305 unsigned long addr = HBIRD_STICK_ADDR+8;
307 __asm__ __volatile__("ldxa [%1] %5, %2\n"
309 "sub %1, 0x8, %1\n\t"
310 "ldxa [%1] %5, %3\n\t"
311 "add %1, 0x8, %1\n\t"
312 "ldxa [%1] %5, %4\n\t"
314 "bne,a,pn %%xcc, 1b\n\t"
316 "sllx %4, 32, %4\n\t"
318 : "=&r" (ret), "=&r" (addr),
319 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
320 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
325 static unsigned long __hbird_read_compare(void)
327 unsigned long low, high;
328 unsigned long addr = HBIRD_STICKCMP_ADDR;
330 __asm__ __volatile__("ldxa [%2] %3, %0\n\t"
331 "add %2, 0x8, %2\n\t"
333 : "=&r" (low), "=&r" (high), "=&r" (addr)
334 : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
336 return (high << 32UL) | low;
339 static void __hbird_write_stick(unsigned long val)
341 unsigned long low = (val & 0xffffffffUL);
342 unsigned long high = (val >> 32UL);
343 unsigned long addr = HBIRD_STICK_ADDR;
345 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
346 "add %0, 0x8, %0\n\t"
347 "stxa %3, [%0] %4\n\t"
348 "sub %0, 0x8, %0\n\t"
351 : "0" (addr), "r" (low), "r" (high),
352 "i" (ASI_PHYS_BYPASS_EC_E));
355 static void __hbird_write_compare(unsigned long val)
357 unsigned long low = (val & 0xffffffffUL);
358 unsigned long high = (val >> 32UL);
359 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
361 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
362 "sub %0, 0x8, %0\n\t"
365 : "0" (addr), "r" (low), "r" (high),
366 "i" (ASI_PHYS_BYPASS_EC_E));
369 static void hbtick_init_tick(unsigned long offset)
373 tick_disable_protection();
375 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
376 * XXX into actually sending STICK interrupts. I think because
377 * XXX of how we store %tick_cmpr in head.S this somehow resets the
378 * XXX {TICK + STICK} interrupt mux. -DaveM
380 __hbird_write_stick(__hbird_read_stick());
382 val = __hbird_read_stick() & ~TICK_PRIV_BIT;
383 __hbird_write_compare(val + offset);
386 static unsigned long hbtick_get_tick(void)
388 return __hbird_read_stick() & ~TICK_PRIV_BIT;
391 static unsigned long hbtick_get_compare(void)
393 return __hbird_read_compare();
396 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
400 val = __hbird_read_stick() + adj;
401 __hbird_write_stick(val);
403 val &= ~TICK_PRIV_BIT;
404 __hbird_write_compare(val + offset);
409 static unsigned long hbtick_add_compare(unsigned long adj)
411 unsigned long val = __hbird_read_compare() + adj;
413 val &= ~TICK_PRIV_BIT;
414 __hbird_write_compare(val);
419 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
420 .init_tick = hbtick_init_tick,
421 .get_tick = hbtick_get_tick,
422 .get_compare = hbtick_get_compare,
423 .add_tick = hbtick_add_tick,
424 .add_compare = hbtick_add_compare,
425 .softint_mask = 1UL << 0,
428 /* timer_interrupt() needs to keep up the real-time clock,
429 * as well as call the "do_timer()" routine every clocktick
431 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
432 * interrupts, one at level14 and one with softint bit 0.
434 unsigned long timer_tick_offset __read_mostly;
436 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
438 #define TICK_SIZE (tick_nsec / 1000)
440 static inline void timer_check_rtc(void)
442 /* last time the cmos clock got updated */
443 static long last_rtc_update;
445 /* Determine when to update the Mostek clock. */
447 xtime.tv_sec > last_rtc_update + 660 &&
448 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
449 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
450 if (set_rtc_mmss(xtime.tv_sec) == 0)
451 last_rtc_update = xtime.tv_sec;
453 last_rtc_update = xtime.tv_sec - 600;
454 /* do it again in 60 s */
458 irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
460 unsigned long ticks, compare, pstate;
462 write_seqlock(&xtime_lock);
466 profile_tick(CPU_PROFILING, regs);
467 update_process_times(user_mode(regs));
471 /* Guarantee that the following sequences execute
474 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
475 "wrpr %0, %1, %%pstate"
479 compare = tick_ops->add_compare(timer_tick_offset);
480 ticks = tick_ops->get_tick();
482 /* Restore PSTATE_IE. */
483 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
486 } while (time_after_eq(ticks, compare));
490 write_sequnlock(&xtime_lock);
496 void timer_tick_interrupt(struct pt_regs *regs)
498 write_seqlock(&xtime_lock);
504 write_sequnlock(&xtime_lock);
508 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
509 static void __init kick_start_clock(void)
511 void __iomem *regs = mstk48t02_regs;
515 prom_printf("CLOCK: Clock was stopped. Kick start ");
517 spin_lock_irq(&mostek_lock);
519 /* Turn on the kick start bit to start the oscillator. */
520 tmp = mostek_read(regs + MOSTEK_CREG);
521 tmp |= MSTK_CREG_WRITE;
522 mostek_write(regs + MOSTEK_CREG, tmp);
523 tmp = mostek_read(regs + MOSTEK_SEC);
525 mostek_write(regs + MOSTEK_SEC, tmp);
526 tmp = mostek_read(regs + MOSTEK_HOUR);
527 tmp |= MSTK_KICK_START;
528 mostek_write(regs + MOSTEK_HOUR, tmp);
529 tmp = mostek_read(regs + MOSTEK_CREG);
530 tmp &= ~MSTK_CREG_WRITE;
531 mostek_write(regs + MOSTEK_CREG, tmp);
533 spin_unlock_irq(&mostek_lock);
535 /* Delay to allow the clock oscillator to start. */
536 sec = MSTK_REG_SEC(regs);
537 for (i = 0; i < 3; i++) {
538 while (sec == MSTK_REG_SEC(regs))
539 for (count = 0; count < 100000; count++)
542 sec = MSTK_REG_SEC(regs);
546 spin_lock_irq(&mostek_lock);
548 /* Turn off kick start and set a "valid" time and date. */
549 tmp = mostek_read(regs + MOSTEK_CREG);
550 tmp |= MSTK_CREG_WRITE;
551 mostek_write(regs + MOSTEK_CREG, tmp);
552 tmp = mostek_read(regs + MOSTEK_HOUR);
553 tmp &= ~MSTK_KICK_START;
554 mostek_write(regs + MOSTEK_HOUR, tmp);
555 MSTK_SET_REG_SEC(regs,0);
556 MSTK_SET_REG_MIN(regs,0);
557 MSTK_SET_REG_HOUR(regs,0);
558 MSTK_SET_REG_DOW(regs,5);
559 MSTK_SET_REG_DOM(regs,1);
560 MSTK_SET_REG_MONTH(regs,8);
561 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
562 tmp = mostek_read(regs + MOSTEK_CREG);
563 tmp &= ~MSTK_CREG_WRITE;
564 mostek_write(regs + MOSTEK_CREG, tmp);
566 spin_unlock_irq(&mostek_lock);
568 /* Ensure the kick start bit is off. If it isn't, turn it off. */
569 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
570 prom_printf("CLOCK: Kick start still on!\n");
572 spin_lock_irq(&mostek_lock);
574 tmp = mostek_read(regs + MOSTEK_CREG);
575 tmp |= MSTK_CREG_WRITE;
576 mostek_write(regs + MOSTEK_CREG, tmp);
578 tmp = mostek_read(regs + MOSTEK_HOUR);
579 tmp &= ~MSTK_KICK_START;
580 mostek_write(regs + MOSTEK_HOUR, tmp);
582 tmp = mostek_read(regs + MOSTEK_CREG);
583 tmp &= ~MSTK_CREG_WRITE;
584 mostek_write(regs + MOSTEK_CREG, tmp);
586 spin_unlock_irq(&mostek_lock);
589 prom_printf("CLOCK: Kick start procedure successful.\n");
592 /* Return nonzero if the clock chip battery is low. */
593 static int __init has_low_battery(void)
595 void __iomem *regs = mstk48t02_regs;
598 spin_lock_irq(&mostek_lock);
600 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
601 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
602 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
603 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
605 spin_unlock_irq(&mostek_lock);
607 return (data1 == data2); /* Was the write blocked? */
610 /* Probe for the real time clock chip. */
611 static void __init set_system_time(void)
613 unsigned int year, mon, day, hour, min, sec;
614 void __iomem *mregs = mstk48t02_regs;
616 unsigned long dregs = ds1287_regs;
618 unsigned long dregs = 0UL;
622 if (!mregs && !dregs) {
623 prom_printf("Something wrong, clock regs not mapped yet.\n");
628 spin_lock_irq(&mostek_lock);
630 /* Traditional Mostek chip. */
631 tmp = mostek_read(mregs + MOSTEK_CREG);
632 tmp |= MSTK_CREG_READ;
633 mostek_write(mregs + MOSTEK_CREG, tmp);
635 sec = MSTK_REG_SEC(mregs);
636 min = MSTK_REG_MIN(mregs);
637 hour = MSTK_REG_HOUR(mregs);
638 day = MSTK_REG_DOM(mregs);
639 mon = MSTK_REG_MONTH(mregs);
640 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
642 /* Dallas 12887 RTC chip. */
645 sec = CMOS_READ(RTC_SECONDS);
646 min = CMOS_READ(RTC_MINUTES);
647 hour = CMOS_READ(RTC_HOURS);
648 day = CMOS_READ(RTC_DAY_OF_MONTH);
649 mon = CMOS_READ(RTC_MONTH);
650 year = CMOS_READ(RTC_YEAR);
651 } while (sec != CMOS_READ(RTC_SECONDS));
653 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
661 if ((year += 1900) < 1970)
665 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
666 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
667 set_normalized_timespec(&wall_to_monotonic,
668 -xtime.tv_sec, -xtime.tv_nsec);
671 tmp = mostek_read(mregs + MOSTEK_CREG);
672 tmp &= ~MSTK_CREG_READ;
673 mostek_write(mregs + MOSTEK_CREG, tmp);
675 spin_unlock_irq(&mostek_lock);
679 /* davem suggests we keep this within the 4M locked kernel image */
680 static u32 starfire_get_time(void)
682 static char obp_gettod[32];
685 sprintf(obp_gettod, "h# %08x unix-gettod",
686 (unsigned int) (long) &unix_tod);
687 prom_feval(obp_gettod);
692 static int starfire_set_time(u32 val)
694 /* Do nothing, time is set using the service processor
695 * console on this platform.
700 static u32 hypervisor_get_time(void)
702 register unsigned long func asm("%o5");
703 register unsigned long arg0 asm("%o0");
704 register unsigned long arg1 asm("%o1");
708 func = HV_FAST_TOD_GET;
711 __asm__ __volatile__("ta %6"
712 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
713 : "0" (func), "1" (arg0), "2" (arg1),
717 if (arg0 == HV_EWOULDBLOCK) {
722 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
725 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
729 static int hypervisor_set_time(u32 secs)
731 register unsigned long func asm("%o5");
732 register unsigned long arg0 asm("%o0");
736 func = HV_FAST_TOD_SET;
738 __asm__ __volatile__("ta %4"
739 : "=&r" (func), "=&r" (arg0)
740 : "0" (func), "1" (arg0),
744 if (arg0 == HV_EWOULDBLOCK) {
749 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
752 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
756 static int __init clock_model_matches(char *model)
758 if (strcmp(model, "mk48t02") &&
759 strcmp(model, "mk48t08") &&
760 strcmp(model, "mk48t59") &&
761 strcmp(model, "m5819") &&
762 strcmp(model, "m5819p") &&
763 strcmp(model, "m5823") &&
764 strcmp(model, "ds1287"))
770 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
772 struct device_node *dp = op->node;
773 char *model = of_get_property(dp, "model", NULL);
774 unsigned long size, flags;
777 if (!model || !clock_model_matches(model))
780 /* On an Enterprise system there can be multiple mostek clocks.
781 * We should only match the one that is on the central FHC bus.
783 if (!strcmp(dp->parent->name, "fhc") &&
784 strcmp(dp->parent->parent->name, "central") != 0)
787 size = (op->resource[0].end - op->resource[0].start) + 1;
788 regs = of_ioremap(&op->resource[0], 0, size, "clock");
792 if (!strcmp(model, "ds1287") ||
793 !strcmp(model, "m5819") ||
794 !strcmp(model, "m5819p") ||
795 !strcmp(model, "m5823")) {
796 ds1287_regs = (unsigned long) regs;
797 } else if (model[5] == '0' && model[6] == '2') {
798 mstk48t02_regs = regs;
799 } else if(model[5] == '0' && model[6] == '8') {
800 mstk48t08_regs = regs;
801 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
803 mstk48t59_regs = regs;
804 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
807 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
809 local_irq_save(flags);
811 if (mstk48t02_regs != NULL) {
812 /* Report a low battery voltage condition. */
813 if (has_low_battery())
814 prom_printf("NVRAM: Low battery voltage!\n");
816 /* Kick start the clock if it is completely stopped. */
817 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
823 local_irq_restore(flags);
828 static struct of_device_id clock_match[] = {
838 static struct of_platform_driver clock_driver = {
840 .match_table = clock_match,
841 .probe = clock_probe,
844 static int __init clock_init(void)
846 if (this_is_starfire) {
847 xtime.tv_sec = starfire_get_time();
848 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
849 set_normalized_timespec(&wall_to_monotonic,
850 -xtime.tv_sec, -xtime.tv_nsec);
853 if (tlb_type == hypervisor) {
854 xtime.tv_sec = hypervisor_get_time();
855 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
856 set_normalized_timespec(&wall_to_monotonic,
857 -xtime.tv_sec, -xtime.tv_nsec);
861 return of_register_driver(&clock_driver, &of_bus_type);
864 /* Must be after subsys_initcall() so that busses are probed. Must
865 * be before device_initcall() because things like the RTC driver
866 * need to see the clock registers.
868 fs_initcall(clock_init);
870 /* This is gets the master TICK_INT timer going. */
871 static unsigned long sparc64_init_timers(void)
873 struct device_node *dp;
874 struct property *prop;
877 extern void smp_tick_init(void);
880 dp = of_find_node_by_path("/");
881 if (tlb_type == spitfire) {
882 unsigned long ver, manuf, impl;
884 __asm__ __volatile__ ("rdpr %%ver, %0"
886 manuf = ((ver >> 48) & 0xffff);
887 impl = ((ver >> 32) & 0xffff);
888 if (manuf == 0x17 && impl == 0x13) {
889 /* Hummingbird, aka Ultra-IIe */
890 tick_ops = &hbtick_operations;
891 prop = of_find_property(dp, "stick-frequency", NULL);
893 tick_ops = &tick_operations;
894 cpu_find_by_instance(0, &dp, NULL);
895 prop = of_find_property(dp, "clock-frequency", NULL);
898 tick_ops = &stick_operations;
899 prop = of_find_property(dp, "stick-frequency", NULL);
901 clock = *(unsigned int *) prop->value;
902 timer_tick_offset = clock / HZ;
911 static void sparc64_start_timers(void)
913 unsigned long pstate;
915 /* Guarantee that the following sequences execute
918 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
919 "wrpr %0, %1, %%pstate"
923 tick_ops->init_tick(timer_tick_offset);
925 /* Restore PSTATE_IE. */
926 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
934 unsigned long clock_tick_ref;
935 unsigned int ref_freq;
937 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
939 unsigned long sparc64_get_clock_tick(unsigned int cpu)
941 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
943 if (ft->clock_tick_ref)
944 return ft->clock_tick_ref;
945 return cpu_data(cpu).clock_tick;
948 #ifdef CONFIG_CPU_FREQ
950 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
953 struct cpufreq_freqs *freq = data;
954 unsigned int cpu = freq->cpu;
955 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
958 ft->ref_freq = freq->old;
959 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
961 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
962 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
963 (val == CPUFREQ_RESUMECHANGE)) {
964 cpu_data(cpu).clock_tick =
965 cpufreq_scale(ft->clock_tick_ref,
973 static struct notifier_block sparc64_cpufreq_notifier_block = {
974 .notifier_call = sparc64_cpufreq_notifier
977 #endif /* CONFIG_CPU_FREQ */
979 static struct time_interpolator sparc64_cpu_interpolator = {
980 .source = TIME_SOURCE_CPU,
982 .mask = 0xffffffffffffffffLL
985 /* The quotient formula is taken from the IA64 port. */
986 #define SPARC64_NSEC_PER_CYC_SHIFT 30UL
987 void __init time_init(void)
989 unsigned long clock = sparc64_init_timers();
991 sparc64_cpu_interpolator.frequency = clock;
992 register_time_interpolator(&sparc64_cpu_interpolator);
994 /* Now that the interpolator is registered, it is
995 * safe to start the timer ticking.
997 sparc64_start_timers();
999 timer_ticks_per_nsec_quotient =
1000 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
1001 (clock / 2)) / clock);
1003 #ifdef CONFIG_CPU_FREQ
1004 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1005 CPUFREQ_TRANSITION_NOTIFIER);
1009 unsigned long long sched_clock(void)
1011 unsigned long ticks = tick_ops->get_tick();
1013 return (ticks * timer_ticks_per_nsec_quotient)
1014 >> SPARC64_NSEC_PER_CYC_SHIFT;
1017 static int set_rtc_mmss(unsigned long nowtime)
1019 int real_seconds, real_minutes, chip_minutes;
1020 void __iomem *mregs = mstk48t02_regs;
1022 unsigned long dregs = ds1287_regs;
1024 unsigned long dregs = 0UL;
1026 unsigned long flags;
1030 * Not having a register set can lead to trouble.
1031 * Also starfire doesn't have a tod clock.
1033 if (!mregs && !dregs)
1037 spin_lock_irqsave(&mostek_lock, flags);
1039 /* Read the current RTC minutes. */
1040 tmp = mostek_read(mregs + MOSTEK_CREG);
1041 tmp |= MSTK_CREG_READ;
1042 mostek_write(mregs + MOSTEK_CREG, tmp);
1044 chip_minutes = MSTK_REG_MIN(mregs);
1046 tmp = mostek_read(mregs + MOSTEK_CREG);
1047 tmp &= ~MSTK_CREG_READ;
1048 mostek_write(mregs + MOSTEK_CREG, tmp);
1051 * since we're only adjusting minutes and seconds,
1052 * don't interfere with hour overflow. This avoids
1053 * messing with unknown time zones but requires your
1054 * RTC not to be off by more than 15 minutes
1056 real_seconds = nowtime % 60;
1057 real_minutes = nowtime / 60;
1058 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1059 real_minutes += 30; /* correct for half hour time zone */
1062 if (abs(real_minutes - chip_minutes) < 30) {
1063 tmp = mostek_read(mregs + MOSTEK_CREG);
1064 tmp |= MSTK_CREG_WRITE;
1065 mostek_write(mregs + MOSTEK_CREG, tmp);
1067 MSTK_SET_REG_SEC(mregs,real_seconds);
1068 MSTK_SET_REG_MIN(mregs,real_minutes);
1070 tmp = mostek_read(mregs + MOSTEK_CREG);
1071 tmp &= ~MSTK_CREG_WRITE;
1072 mostek_write(mregs + MOSTEK_CREG, tmp);
1074 spin_unlock_irqrestore(&mostek_lock, flags);
1078 spin_unlock_irqrestore(&mostek_lock, flags);
1084 unsigned char save_control, save_freq_select;
1086 /* Stolen from arch/i386/kernel/time.c, see there for
1087 * credits and descriptive comments.
1089 spin_lock_irqsave(&rtc_lock, flags);
1090 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1091 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1093 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1094 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1096 chip_minutes = CMOS_READ(RTC_MINUTES);
1097 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1098 BCD_TO_BIN(chip_minutes);
1099 real_seconds = nowtime % 60;
1100 real_minutes = nowtime / 60;
1101 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1105 if (abs(real_minutes - chip_minutes) < 30) {
1106 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1107 BIN_TO_BCD(real_seconds);
1108 BIN_TO_BCD(real_minutes);
1110 CMOS_WRITE(real_seconds,RTC_SECONDS);
1111 CMOS_WRITE(real_minutes,RTC_MINUTES);
1114 "set_rtc_mmss: can't update from %d to %d\n",
1115 chip_minutes, real_minutes);
1119 CMOS_WRITE(save_control, RTC_CONTROL);
1120 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1121 spin_unlock_irqrestore(&rtc_lock, flags);
1127 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1128 static unsigned char mini_rtc_status; /* bitmapped status byte. */
1130 /* months start at 0 now */
1131 static unsigned char days_in_mo[] =
1132 {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
1135 #define STARTOFTIME 1970
1136 #define SECDAY 86400L
1137 #define SECYR (SECDAY * 365)
1138 #define leapyear(year) ((year) % 4 == 0 && \
1139 ((year) % 100 != 0 || (year) % 400 == 0))
1140 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1141 #define days_in_month(a) (month_days[(a) - 1])
1143 static int month_days[12] = {
1144 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1148 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1150 static void GregorianDay(struct rtc_time * tm)
1155 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1157 lastYear = tm->tm_year - 1;
1160 * Number of leap corrections to apply up to end of last year
1162 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1165 * This year is a leap year if it is divisible by 4 except when it is
1166 * divisible by 100 unless it is divisible by 400
1168 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1170 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1172 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1175 tm->tm_wday = day % 7;
1178 static void to_tm(int tim, struct rtc_time *tm)
1181 register long hms, day;
1186 /* Hours, minutes, seconds are easy */
1187 tm->tm_hour = hms / 3600;
1188 tm->tm_min = (hms % 3600) / 60;
1189 tm->tm_sec = (hms % 3600) % 60;
1191 /* Number of years in days */
1192 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1193 day -= days_in_year(i);
1196 /* Number of months in days left */
1197 if (leapyear(tm->tm_year))
1198 days_in_month(FEBRUARY) = 29;
1199 for (i = 1; day >= days_in_month(i); i++)
1200 day -= days_in_month(i);
1201 days_in_month(FEBRUARY) = 28;
1204 /* Days are what is left over (+1) from all that. */
1205 tm->tm_mday = day + 1;
1208 * Determine the day of week
1213 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1214 * aka Unix time. So we have to convert to/from rtc_time.
1216 static inline void mini_get_rtc_time(struct rtc_time *time)
1218 unsigned long flags;
1221 spin_lock_irqsave(&rtc_lock, flags);
1223 if (this_is_starfire)
1224 seconds = starfire_get_time();
1225 else if (tlb_type == hypervisor)
1226 seconds = hypervisor_get_time();
1227 spin_unlock_irqrestore(&rtc_lock, flags);
1229 to_tm(seconds, time);
1230 time->tm_year -= 1900;
1234 static inline int mini_set_rtc_time(struct rtc_time *time)
1236 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1237 time->tm_mday, time->tm_hour,
1238 time->tm_min, time->tm_sec);
1239 unsigned long flags;
1242 spin_lock_irqsave(&rtc_lock, flags);
1244 if (this_is_starfire)
1245 err = starfire_set_time(seconds);
1246 else if (tlb_type == hypervisor)
1247 err = hypervisor_set_time(seconds);
1248 spin_unlock_irqrestore(&rtc_lock, flags);
1253 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1254 unsigned int cmd, unsigned long arg)
1256 struct rtc_time wtime;
1257 void __user *argp = (void __user *)arg;
1267 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1270 case RTC_UIE_ON: /* enable ints for RTC updates. */
1273 case RTC_RD_TIME: /* Read the time/date from RTC */
1274 /* this doesn't get week-day, who cares */
1275 memset(&wtime, 0, sizeof(wtime));
1276 mini_get_rtc_time(&wtime);
1278 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1280 case RTC_SET_TIME: /* Set the RTC */
1283 unsigned char leap_yr;
1285 if (!capable(CAP_SYS_TIME))
1288 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1291 year = wtime.tm_year + 1900;
1292 leap_yr = ((!(year % 4) && (year % 100)) ||
1295 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1))
1298 if (wtime.tm_mday < 0 || wtime.tm_mday >
1299 (days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr)))
1302 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1303 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1304 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1307 return mini_set_rtc_time(&wtime);
1314 static int mini_rtc_open(struct inode *inode, struct file *file)
1316 if (mini_rtc_status & RTC_IS_OPEN)
1319 mini_rtc_status |= RTC_IS_OPEN;
1324 static int mini_rtc_release(struct inode *inode, struct file *file)
1326 mini_rtc_status &= ~RTC_IS_OPEN;
1331 static struct file_operations mini_rtc_fops = {
1332 .owner = THIS_MODULE,
1333 .ioctl = mini_rtc_ioctl,
1334 .open = mini_rtc_open,
1335 .release = mini_rtc_release,
1338 static struct miscdevice rtc_mini_dev =
1342 .fops = &mini_rtc_fops,
1345 static int __init rtc_mini_init(void)
1349 if (tlb_type != hypervisor && !this_is_starfire)
1352 printk(KERN_INFO "Mini RTC Driver\n");
1354 retval = misc_register(&rtc_mini_dev);
1361 static void __exit rtc_mini_exit(void)
1363 misc_deregister(&rtc_mini_dev);
1367 module_init(rtc_mini_init);
1368 module_exit(rtc_mini_exit);