arch/sparc64/kernel/time.c

   1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
   2  * time.c: UltraSparc timer and TOD clock support.
   3  *
   4  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
   6  *
   7  * Based largely on code which is:
   8  *
   9  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/errno.h>
  14 #include <linux/module.h>
  15 #include <linux/sched.h>
  16 #include <linux/kernel.h>
  17 #include <linux/param.h>
  18 #include <linux/string.h>
  19 #include <linux/mm.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/time.h>
  22 #include <linux/timex.h>
  23 #include <linux/init.h>
  24 #include <linux/ioport.h>
  25 #include <linux/mc146818rtc.h>
  26 #include <linux/delay.h>
  27 #include <linux/profile.h>
  28 #include <linux/bcd.h>
  29 #include <linux/jiffies.h>
  30 #include <linux/cpufreq.h>
  31 #include <linux/percpu.h>
  32 #include <linux/profile.h>
  33
  34 #include <asm/oplib.h>
  35 #include <asm/mostek.h>
  36 #include <asm/timer.h>
  37 #include <asm/irq.h>
  38 #include <asm/io.h>
  39 #include <asm/sbus.h>
  40 #include <asm/fhc.h>
  41 #include <asm/pbm.h>
  42 #include <asm/ebus.h>
  43 #include <asm/isa.h>
  44 #include <asm/starfire.h>
  45 #include <asm/smp.h>
  46 #include <asm/sections.h>
  47 #include <asm/cpudata.h>
  48
  49 DEFINE_SPINLOCK(mostek_lock);
  50 DEFINE_SPINLOCK(rtc_lock);
  51 void __iomem *mstk48t02_regs = NULL;
  52 #ifdef CONFIG_PCI
  53 unsigned long ds1287_regs = 0UL;
  54 #endif
  55
  56 extern unsigned long wall_jiffies;
  57
  58 static void __iomem *mstk48t08_regs;
  59 static void __iomem *mstk48t59_regs;
  60
  61 static int set_rtc_mmss(unsigned long);
  62
  63 static __init unsigned long dummy_get_tick(void)
  64 {
  65         return 0;
  66 }
  67
  68 static __initdata struct sparc64_tick_ops dummy_tick_ops = {
  69         .get_tick       = dummy_get_tick,
  70 };
  71
  72 struct sparc64_tick_ops *tick_ops __read_mostly = &dummy_tick_ops;
  73
  74 #define TICK_PRIV_BIT   (1UL << 63)
  75
  76 #ifdef CONFIG_SMP
  77 unsigned long profile_pc(struct pt_regs *regs)
  78 {
  79         unsigned long pc = instruction_pointer(regs);
  80
  81         if (in_lock_functions(pc))
  82                 return regs->u_regs[UREG_RETPC];
  83         return pc;
  84 }
  85 EXPORT_SYMBOL(profile_pc);
  86 #endif
  87
  88 static void tick_disable_protection(void)
  89 {
  90         /* Set things up so user can access tick register for profiling
  91          * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
  92          * read back of %tick after writing it.
  93          */
  94         __asm__ __volatile__(
  95         "       ba,pt   %%xcc, 1f\n"
  96         "        nop\n"
  97         "       .align  64\n"
  98         "1:     rd      %%tick, %%g2\n"
  99         "       add     %%g2, 6, %%g2\n"
 100         "       andn    %%g2, %0, %%g2\n"
 101         "       wrpr    %%g2, 0, %%tick\n"
 102         "       rdpr    %%tick, %%g0"
 103         : /* no outputs */
 104         : "r" (TICK_PRIV_BIT)
 105         : "g2");
 106 }
 107
 108 static void tick_init_tick(unsigned long offset)
 109 {
 110         tick_disable_protection();
 111
 112         __asm__ __volatile__(
 113         "       rd      %%tick, %%g1\n"
 114         "       andn    %%g1, %1, %%g1\n"
 115         "       ba,pt   %%xcc, 1f\n"
 116         "        add    %%g1, %0, %%g1\n"
 117         "       .align  64\n"
 118         "1:     wr      %%g1, 0x0, %%tick_cmpr\n"
 119         "       rd      %%tick_cmpr, %%g0"
 120         : /* no outputs */
 121         : "r" (offset), "r" (TICK_PRIV_BIT)
 122         : "g1");
 123 }
 124
 125 static unsigned long tick_get_tick(void)
 126 {
 127         unsigned long ret;
 128
 129         __asm__ __volatile__("rd        %%tick, %0\n\t"
 130                              "mov       %0, %0"
 131                              : "=r" (ret));
 132
 133         return ret & ~TICK_PRIV_BIT;
 134 }
 135
 136 static unsigned long tick_get_compare(void)
 137 {
 138         unsigned long ret;
 139
 140         __asm__ __volatile__("rd        %%tick_cmpr, %0\n\t"
 141                              "mov       %0, %0"
 142                              : "=r" (ret));
 143
 144         return ret;
 145 }
 146
 147 static unsigned long tick_add_compare(unsigned long adj)
 148 {
 149         unsigned long new_compare;
 150
 151         /* Workaround for Spitfire Errata (#54 I think??), I discovered
 152          * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
 153          * number 103640.
 154          *
 155          * On Blackbird writes to %tick_cmpr can fail, the
 156          * workaround seems to be to execute the wr instruction
 157          * at the start of an I-cache line, and perform a dummy
 158          * read back from %tick_cmpr right after writing to it. -DaveM
 159          */
 160         __asm__ __volatile__("rd        %%tick_cmpr, %0\n\t"
 161                              "ba,pt     %%xcc, 1f\n\t"
 162                              " add      %0, %1, %0\n\t"
 163                              ".align    64\n"
 164                              "1:\n\t"
 165                              "wr        %0, 0, %%tick_cmpr\n\t"
 166                              "rd        %%tick_cmpr, %%g0"
 167                              : "=&r" (new_compare)
 168                              : "r" (adj));
 169
 170         return new_compare;
 171 }
 172
 173 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
 174 {
 175         unsigned long new_tick, tmp;
 176
 177         /* Also need to handle Blackbird bug here too. */
 178         __asm__ __volatile__("rd        %%tick, %0\n\t"
 179                              "add       %0, %2, %0\n\t"
 180                              "wrpr      %0, 0, %%tick\n\t"
 181                              "andn      %0, %4, %1\n\t"
 182                              "ba,pt     %%xcc, 1f\n\t"
 183                              " add      %1, %3, %1\n\t"
 184                              ".align    64\n"
 185                              "1:\n\t"
 186                              "wr        %1, 0, %%tick_cmpr\n\t"
 187                              "rd        %%tick_cmpr, %%g0"
 188                              : "=&r" (new_tick), "=&r" (tmp)
 189                              : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
 190
 191         return new_tick;
 192 }
 193
 194 static struct sparc64_tick_ops tick_operations __read_mostly = {
 195         .init_tick      =       tick_init_tick,
 196         .get_tick       =       tick_get_tick,
 197         .get_compare    =       tick_get_compare,
 198         .add_tick       =       tick_add_tick,
 199         .add_compare    =       tick_add_compare,
 200         .softint_mask   =       1UL << 0,
 201 };
 202
 203 static void stick_init_tick(unsigned long offset)
 204 {
 205         tick_disable_protection();
 206
 207         /* Let the user get at STICK too. */
 208         __asm__ __volatile__(
 209         "       rd      %%asr24, %%g2\n"
 210         "       andn    %%g2, %0, %%g2\n"
 211         "       wr      %%g2, 0, %%asr24"
 212         : /* no outputs */
 213         : "r" (TICK_PRIV_BIT)
 214         : "g1", "g2");
 215
 216         __asm__ __volatile__(
 217         "       rd      %%asr24, %%g1\n"
 218         "       andn    %%g1, %1, %%g1\n"
 219         "       add     %%g1, %0, %%g1\n"
 220         "       wr      %%g1, 0x0, %%asr25"
 221         : /* no outputs */
 222         : "r" (offset), "r" (TICK_PRIV_BIT)
 223         : "g1");
 224 }
 225
 226 static unsigned long stick_get_tick(void)
 227 {
 228         unsigned long ret;
 229
 230         __asm__ __volatile__("rd        %%asr24, %0"
 231                              : "=r" (ret));
 232
 233         return ret & ~TICK_PRIV_BIT;
 234 }
 235
 236 static unsigned long stick_get_compare(void)
 237 {
 238         unsigned long ret;
 239
 240         __asm__ __volatile__("rd        %%asr25, %0"
 241                              : "=r" (ret));
 242
 243         return ret;
 244 }
 245
 246 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
 247 {
 248         unsigned long new_tick, tmp;
 249
 250         __asm__ __volatile__("rd        %%asr24, %0\n\t"
 251                              "add       %0, %2, %0\n\t"
 252                              "wr        %0, 0, %%asr24\n\t"
 253                              "andn      %0, %4, %1\n\t"
 254                              "add       %1, %3, %1\n\t"
 255                              "wr        %1, 0, %%asr25"
 256                              : "=&r" (new_tick), "=&r" (tmp)
 257                              : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
 258
 259         return new_tick;
 260 }
 261
 262 static unsigned long stick_add_compare(unsigned long adj)
 263 {
 264         unsigned long new_compare;
 265
 266         __asm__ __volatile__("rd        %%asr25, %0\n\t"
 267                              "add       %0, %1, %0\n\t"
 268                              "wr        %0, 0, %%asr25"
 269                              : "=&r" (new_compare)
 270                              : "r" (adj));
 271
 272         return new_compare;
 273 }
 274
 275 static struct sparc64_tick_ops stick_operations __read_mostly = {
 276         .init_tick      =       stick_init_tick,
 277         .get_tick       =       stick_get_tick,
 278         .get_compare    =       stick_get_compare,
 279         .add_tick       =       stick_add_tick,
 280         .add_compare    =       stick_add_compare,
 281         .softint_mask   =       1UL << 16,
 282 };
 283
 284 /* On Hummingbird the STICK/STICK_CMPR register is implemented
 285  * in I/O space.  There are two 64-bit registers each, the
 286  * first holds the low 32-bits of the value and the second holds
 287  * the high 32-bits.
 288  *
 289  * Since STICK is constantly updating, we have to access it carefully.
 290  *
 291  * The sequence we use to read is:
 292  * 1) read low
 293  * 2) read high
 294  * 3) read low again, if it rolled over increment high by 1
 295  *
 296  * Writing STICK safely is also tricky:
 297  * 1) write low to zero
 298  * 2) write high
 299  * 3) write low
 300  */
 301 #define HBIRD_STICKCMP_ADDR     0x1fe0000f060UL
 302 #define HBIRD_STICK_ADDR        0x1fe0000f070UL
 303
 304 static unsigned long __hbird_read_stick(void)
 305 {
 306         unsigned long ret, tmp1, tmp2, tmp3;
 307         unsigned long addr = HBIRD_STICK_ADDR;
 308
 309         __asm__ __volatile__("ldxa      [%1] %5, %2\n\t"
 310                              "add       %1, 0x8, %1\n\t"
 311                              "ldxa      [%1] %5, %3\n\t"
 312                              "sub       %1, 0x8, %1\n\t"
 313                              "ldxa      [%1] %5, %4\n\t"
 314                              "cmp       %4, %2\n\t"
 315                              "blu,a,pn  %%xcc, 1f\n\t"
 316                              " add      %3, 1, %3\n"
 317                              "1:\n\t"
 318                              "sllx      %3, 32, %3\n\t"
 319                              "or        %3, %4, %0\n\t"
 320                              : "=&r" (ret), "=&r" (addr),
 321                                "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
 322                              : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
 323
 324         return ret;
 325 }
 326
 327 static unsigned long __hbird_read_compare(void)
 328 {
 329         unsigned long low, high;
 330         unsigned long addr = HBIRD_STICKCMP_ADDR;
 331
 332         __asm__ __volatile__("ldxa      [%2] %3, %0\n\t"
 333                              "add       %2, 0x8, %2\n\t"
 334                              "ldxa      [%2] %3, %1"
 335                              : "=&r" (low), "=&r" (high), "=&r" (addr)
 336                              : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
 337
 338         return (high << 32UL) | low;
 339 }
 340
 341 static void __hbird_write_stick(unsigned long val)
 342 {
 343         unsigned long low = (val & 0xffffffffUL);
 344         unsigned long high = (val >> 32UL);
 345         unsigned long addr = HBIRD_STICK_ADDR;
 346
 347         __asm__ __volatile__("stxa      %%g0, [%0] %4\n\t"
 348                              "add       %0, 0x8, %0\n\t"
 349                              "stxa      %3, [%0] %4\n\t"
 350                              "sub       %0, 0x8, %0\n\t"
 351                              "stxa      %2, [%0] %4"
 352                              : "=&r" (addr)
 353                              : "0" (addr), "r" (low), "r" (high),
 354                                "i" (ASI_PHYS_BYPASS_EC_E));
 355 }
 356
 357 static void __hbird_write_compare(unsigned long val)
 358 {
 359         unsigned long low = (val & 0xffffffffUL);
 360         unsigned long high = (val >> 32UL);
 361         unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
 362
 363         __asm__ __volatile__("stxa      %3, [%0] %4\n\t"
 364                              "sub       %0, 0x8, %0\n\t"
 365                              "stxa      %2, [%0] %4"
 366                              : "=&r" (addr)
 367                              : "0" (addr), "r" (low), "r" (high),
 368                                "i" (ASI_PHYS_BYPASS_EC_E));
 369 }
 370
 371 static void hbtick_init_tick(unsigned long offset)
 372 {
 373         unsigned long val;
 374
 375         tick_disable_protection();
 376
 377         /* XXX This seems to be necessary to 'jumpstart' Hummingbird
 378          * XXX into actually sending STICK interrupts.  I think because
 379          * XXX of how we store %tick_cmpr in head.S this somehow resets the
 380          * XXX {TICK + STICK} interrupt mux.  -DaveM
 381          */
 382         __hbird_write_stick(__hbird_read_stick());
 383
 384         val = __hbird_read_stick() & ~TICK_PRIV_BIT;
 385         __hbird_write_compare(val + offset);
 386 }
 387
 388 static unsigned long hbtick_get_tick(void)
 389 {
 390         return __hbird_read_stick() & ~TICK_PRIV_BIT;
 391 }
 392
 393 static unsigned long hbtick_get_compare(void)
 394 {
 395         return __hbird_read_compare();
 396 }
 397
 398 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
 399 {
 400         unsigned long val;
 401
 402         val = __hbird_read_stick() + adj;
 403         __hbird_write_stick(val);
 404
 405         val &= ~TICK_PRIV_BIT;
 406         __hbird_write_compare(val + offset);
 407
 408         return val;
 409 }
 410
 411 static unsigned long hbtick_add_compare(unsigned long adj)
 412 {
 413         unsigned long val = __hbird_read_compare() + adj;
 414
 415         val &= ~TICK_PRIV_BIT;
 416         __hbird_write_compare(val);
 417
 418         return val;
 419 }
 420
 421 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
 422         .init_tick      =       hbtick_init_tick,
 423         .get_tick       =       hbtick_get_tick,
 424         .get_compare    =       hbtick_get_compare,
 425         .add_tick       =       hbtick_add_tick,
 426         .add_compare    =       hbtick_add_compare,
 427         .softint_mask   =       1UL << 0,
 428 };
 429
 430 /* timer_interrupt() needs to keep up the real-time clock,
 431  * as well as call the "do_timer()" routine every clocktick
 432  *
 433  * NOTE: On SUN5 systems the ticker interrupt comes in using 2
 434  *       interrupts, one at level14 and one with softint bit 0.
 435  */
 436 unsigned long timer_tick_offset __read_mostly;
 437
 438 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
 439
 440 #define TICK_SIZE (tick_nsec / 1000)
 441
 442 static inline void timer_check_rtc(void)
 443 {
 444         /* last time the cmos clock got updated */
 445         static long last_rtc_update;
 446
 447         /* Determine when to update the Mostek clock. */
 448         if (ntp_synced() &&
 449             xtime.tv_sec > last_rtc_update + 660 &&
 450             (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
 451             (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
 452                 if (set_rtc_mmss(xtime.tv_sec) == 0)
 453                         last_rtc_update = xtime.tv_sec;
 454                 else
 455                         last_rtc_update = xtime.tv_sec - 600;
 456                         /* do it again in 60 s */
 457         }
 458 }
 459
 460 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 461 {
 462         unsigned long ticks, compare, pstate;
 463
 464         write_seqlock(&xtime_lock);
 465
 466         do {
 467 #ifndef CONFIG_SMP
 468                 profile_tick(CPU_PROFILING, regs);
 469                 update_process_times(user_mode(regs));
 470 #endif
 471                 do_timer(regs);
 472
 473                 /* Guarantee that the following sequences execute
 474                  * uninterrupted.
 475                  */
 476                 __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 477                                      "wrpr      %0, %1, %%pstate"
 478                                      : "=r" (pstate)
 479                                      : "i" (PSTATE_IE));
 480
 481                 compare = tick_ops->add_compare(timer_tick_offset);
 482                 ticks = tick_ops->get_tick();
 483
 484                 /* Restore PSTATE_IE. */
 485                 __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
 486                                      : /* no outputs */
 487                                      : "r" (pstate));
 488         } while (time_after_eq(ticks, compare));
 489
 490         timer_check_rtc();
 491
 492         write_sequnlock(&xtime_lock);
 493
 494         return IRQ_HANDLED;
 495 }
 496
 497 #ifdef CONFIG_SMP
 498 void timer_tick_interrupt(struct pt_regs *regs)
 499 {
 500         write_seqlock(&xtime_lock);
 501
 502         do_timer(regs);
 503
 504         timer_check_rtc();
 505
 506         write_sequnlock(&xtime_lock);
 507 }
 508 #endif
 509
 510 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
 511 static void __init kick_start_clock(void)
 512 {
 513         void __iomem *regs = mstk48t02_regs;
 514         u8 sec, tmp;
 515         int i, count;
 516
 517         prom_printf("CLOCK: Clock was stopped. Kick start ");
 518
 519         spin_lock_irq(&mostek_lock);
 520
 521         /* Turn on the kick start bit to start the oscillator. */
 522         tmp = mostek_read(regs + MOSTEK_CREG);
 523         tmp |= MSTK_CREG_WRITE;
 524         mostek_write(regs + MOSTEK_CREG, tmp);
 525         tmp = mostek_read(regs + MOSTEK_SEC);
 526         tmp &= ~MSTK_STOP;
 527         mostek_write(regs + MOSTEK_SEC, tmp);
 528         tmp = mostek_read(regs + MOSTEK_HOUR);
 529         tmp |= MSTK_KICK_START;
 530         mostek_write(regs + MOSTEK_HOUR, tmp);
 531         tmp = mostek_read(regs + MOSTEK_CREG);
 532         tmp &= ~MSTK_CREG_WRITE;
 533         mostek_write(regs + MOSTEK_CREG, tmp);
 534
 535         spin_unlock_irq(&mostek_lock);
 536
 537         /* Delay to allow the clock oscillator to start. */
 538         sec = MSTK_REG_SEC(regs);
 539         for (i = 0; i < 3; i++) {
 540                 while (sec == MSTK_REG_SEC(regs))
 541                         for (count = 0; count < 100000; count++)
 542                                 /* nothing */ ;
 543                 prom_printf(".");
 544                 sec = MSTK_REG_SEC(regs);
 545         }
 546         prom_printf("\n");
 547
 548         spin_lock_irq(&mostek_lock);
 549
 550         /* Turn off kick start and set a "valid" time and date. */
 551         tmp = mostek_read(regs + MOSTEK_CREG);
 552         tmp |= MSTK_CREG_WRITE;
 553         mostek_write(regs + MOSTEK_CREG, tmp);
 554         tmp = mostek_read(regs + MOSTEK_HOUR);
 555         tmp &= ~MSTK_KICK_START;
 556         mostek_write(regs + MOSTEK_HOUR, tmp);
 557         MSTK_SET_REG_SEC(regs,0);
 558         MSTK_SET_REG_MIN(regs,0);
 559         MSTK_SET_REG_HOUR(regs,0);
 560         MSTK_SET_REG_DOW(regs,5);
 561         MSTK_SET_REG_DOM(regs,1);
 562         MSTK_SET_REG_MONTH(regs,8);
 563         MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
 564         tmp = mostek_read(regs + MOSTEK_CREG);
 565         tmp &= ~MSTK_CREG_WRITE;
 566         mostek_write(regs + MOSTEK_CREG, tmp);
 567
 568         spin_unlock_irq(&mostek_lock);
 569
 570         /* Ensure the kick start bit is off. If it isn't, turn it off. */
 571         while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
 572                 prom_printf("CLOCK: Kick start still on!\n");
 573
 574                 spin_lock_irq(&mostek_lock);
 575
 576                 tmp = mostek_read(regs + MOSTEK_CREG);
 577                 tmp |= MSTK_CREG_WRITE;
 578                 mostek_write(regs + MOSTEK_CREG, tmp);
 579
 580                 tmp = mostek_read(regs + MOSTEK_HOUR);
 581                 tmp &= ~MSTK_KICK_START;
 582                 mostek_write(regs + MOSTEK_HOUR, tmp);
 583
 584                 tmp = mostek_read(regs + MOSTEK_CREG);
 585                 tmp &= ~MSTK_CREG_WRITE;
 586                 mostek_write(regs + MOSTEK_CREG, tmp);
 587
 588                 spin_unlock_irq(&mostek_lock);
 589         }
 590
 591         prom_printf("CLOCK: Kick start procedure successful.\n");
 592 }
 593
 594 /* Return nonzero if the clock chip battery is low. */
 595 static int __init has_low_battery(void)
 596 {
 597         void __iomem *regs = mstk48t02_regs;
 598         u8 data1, data2;
 599
 600         spin_lock_irq(&mostek_lock);
 601
 602         data1 = mostek_read(regs + MOSTEK_EEPROM);      /* Read some data. */
 603         mostek_write(regs + MOSTEK_EEPROM, ~data1);     /* Write back the complement. */
 604         data2 = mostek_read(regs + MOSTEK_EEPROM);      /* Read back the complement. */
 605         mostek_write(regs + MOSTEK_EEPROM, data1);      /* Restore original value. */
 606
 607         spin_unlock_irq(&mostek_lock);
 608
 609         return (data1 == data2);        /* Was the write blocked? */
 610 }
 611
 612 /* Probe for the real time clock chip. */
 613 static void __init set_system_time(void)
 614 {
 615         unsigned int year, mon, day, hour, min, sec;
 616         void __iomem *mregs = mstk48t02_regs;
 617 #ifdef CONFIG_PCI
 618         unsigned long dregs = ds1287_regs;
 619 #else
 620         unsigned long dregs = 0UL;
 621 #endif
 622         u8 tmp;
 623
 624         if (!mregs && !dregs) {
 625                 prom_printf("Something wrong, clock regs not mapped yet.\n");
 626                 prom_halt();
 627         }
 628
 629         if (mregs) {
 630                 spin_lock_irq(&mostek_lock);
 631
 632                 /* Traditional Mostek chip. */
 633                 tmp = mostek_read(mregs + MOSTEK_CREG);
 634                 tmp |= MSTK_CREG_READ;
 635                 mostek_write(mregs + MOSTEK_CREG, tmp);
 636
 637                 sec = MSTK_REG_SEC(mregs);
 638                 min = MSTK_REG_MIN(mregs);
 639                 hour = MSTK_REG_HOUR(mregs);
 640                 day = MSTK_REG_DOM(mregs);
 641                 mon = MSTK_REG_MONTH(mregs);
 642                 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
 643         } else {
 644                 int i;
 645
 646                 /* Dallas 12887 RTC chip. */
 647
 648                 /* Stolen from arch/i386/kernel/time.c, see there for
 649                  * credits and descriptive comments.
 650                  */
 651                 for (i = 0; i < 1000000; i++) {
 652                         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
 653                                 break;
 654                         udelay(10);
 655                 }
 656                 for (i = 0; i < 1000000; i++) {
 657                         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
 658                                 break;
 659                         udelay(10);
 660                 }
 661                 do {
 662                         sec  = CMOS_READ(RTC_SECONDS);
 663                         min  = CMOS_READ(RTC_MINUTES);
 664                         hour = CMOS_READ(RTC_HOURS);
 665                         day  = CMOS_READ(RTC_DAY_OF_MONTH);
 666                         mon  = CMOS_READ(RTC_MONTH);
 667                         year = CMOS_READ(RTC_YEAR);
 668                 } while (sec != CMOS_READ(RTC_SECONDS));
 669                 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 670                         BCD_TO_BIN(sec);
 671                         BCD_TO_BIN(min);
 672                         BCD_TO_BIN(hour);
 673                         BCD_TO_BIN(day);
 674                         BCD_TO_BIN(mon);
 675                         BCD_TO_BIN(year);
 676                 }
 677                 if ((year += 1900) < 1970)
 678                         year += 100;
 679         }
 680
 681         xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
 682         xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 683         set_normalized_timespec(&wall_to_monotonic,
 684                                 -xtime.tv_sec, -xtime.tv_nsec);
 685
 686         if (mregs) {
 687                 tmp = mostek_read(mregs + MOSTEK_CREG);
 688                 tmp &= ~MSTK_CREG_READ;
 689                 mostek_write(mregs + MOSTEK_CREG, tmp);
 690
 691                 spin_unlock_irq(&mostek_lock);
 692         }
 693 }
 694
 695 void __init clock_probe(void)
 696 {
 697         struct linux_prom_registers clk_reg[2];
 698         char model[128];
 699         int node, busnd = -1, err;
 700         unsigned long flags;
 701         struct linux_central *cbus;
 702 #ifdef CONFIG_PCI
 703         struct linux_ebus *ebus = NULL;
 704         struct sparc_isa_bridge *isa_br = NULL;
 705 #endif
 706         static int invoked;
 707
 708         if (invoked)
 709                 return;
 710         invoked = 1;
 711
 712
 713         if (this_is_starfire) {
 714                 /* davem suggests we keep this within the 4M locked kernel image */
 715                 static char obp_gettod[256];
 716                 static u32 unix_tod;
 717
 718                 sprintf(obp_gettod, "h# %08x unix-gettod",
 719                         (unsigned int) (long) &unix_tod);
 720                 prom_feval(obp_gettod);
 721                 xtime.tv_sec = unix_tod;
 722                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 723                 set_normalized_timespec(&wall_to_monotonic,
 724                                         -xtime.tv_sec, -xtime.tv_nsec);
 725                 return;
 726         }
 727
 728         local_irq_save(flags);
 729
 730         cbus = central_bus;
 731         if (cbus != NULL)
 732                 busnd = central_bus->child->prom_node;
 733
 734         /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
 735          * That way we handle the presence of multiple properly.
 736          *
 737          * As a special case, machines with Central must provide the
 738          * timer chip there.
 739          */
 740 #ifdef CONFIG_PCI
 741         if (ebus_chain != NULL) {
 742                 ebus = ebus_chain;
 743                 if (busnd == -1)
 744                         busnd = ebus->prom_node;
 745         }
 746         if (isa_chain != NULL) {
 747                 isa_br = isa_chain;
 748                 if (busnd == -1)
 749                         busnd = isa_br->prom_node;
 750         }
 751 #endif
 752         if (sbus_root != NULL && busnd == -1)
 753                 busnd = sbus_root->prom_node;
 754
 755         if (busnd == -1) {
 756                 prom_printf("clock_probe: problem, cannot find bus to search.\n");
 757                 prom_halt();
 758         }
 759
 760         node = prom_getchild(busnd);
 761
 762         while (1) {
 763                 if (!node)
 764                         model[0] = 0;
 765                 else
 766                         prom_getstring(node, "model", model, sizeof(model));
 767                 if (strcmp(model, "mk48t02") &&
 768                     strcmp(model, "mk48t08") &&
 769                     strcmp(model, "mk48t59") &&
 770                     strcmp(model, "m5819") &&
 771                     strcmp(model, "m5819p") &&
 772                     strcmp(model, "m5823") &&
 773                     strcmp(model, "ds1287")) {
 774                         if (cbus != NULL) {
 775                                 prom_printf("clock_probe: Central bus lacks timer chip.\n");
 776                                 prom_halt();
 777                         }
 778
 779                         if (node != 0)
 780                                 node = prom_getsibling(node);
 781 #ifdef CONFIG_PCI
 782                         while ((node == 0) && ebus != NULL) {
 783                                 ebus = ebus->next;
 784                                 if (ebus != NULL) {
 785                                         busnd = ebus->prom_node;
 786                                         node = prom_getchild(busnd);
 787                                 }
 788                         }
 789                         while ((node == 0) && isa_br != NULL) {
 790                                 isa_br = isa_br->next;
 791                                 if (isa_br != NULL) {
 792                                         busnd = isa_br->prom_node;
 793                                         node = prom_getchild(busnd);
 794                                 }
 795                         }
 796 #endif
 797                         if (node == 0) {
 798                                 prom_printf("clock_probe: Cannot find timer chip\n");
 799                                 prom_halt();
 800                         }
 801                         continue;
 802                 }
 803
 804                 err = prom_getproperty(node, "reg", (char *)clk_reg,
 805                                        sizeof(clk_reg));
 806                 if(err == -1) {
 807                         prom_printf("clock_probe: Cannot get Mostek reg property\n");
 808                         prom_halt();
 809                 }
 810
 811                 if (cbus != NULL) {
 812                         apply_fhc_ranges(central_bus->child, clk_reg, 1);
 813                         apply_central_ranges(central_bus, clk_reg, 1);
 814                 }
 815 #ifdef CONFIG_PCI
 816                 else if (ebus != NULL) {
 817                         struct linux_ebus_device *edev;
 818
 819                         for_each_ebusdev(edev, ebus)
 820                                 if (edev->prom_node == node)
 821                                         break;
 822                         if (edev == NULL) {
 823                                 if (isa_chain != NULL)
 824                                         goto try_isa_clock;
 825                                 prom_printf("%s: Mostek not probed by EBUS\n",
 826                                             __FUNCTION__);
 827                                 prom_halt();
 828                         }
 829
 830                         if (!strcmp(model, "ds1287") ||
 831                             !strcmp(model, "m5819") ||
 832                             !strcmp(model, "m5819p") ||
 833                             !strcmp(model, "m5823")) {
 834                                 ds1287_regs = edev->resource[0].start;
 835                         } else {
 836                                 mstk48t59_regs = (void __iomem *)
 837                                         edev->resource[0].start;
 838                                 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 839                         }
 840                         break;
 841                 }
 842                 else if (isa_br != NULL) {
 843                         struct sparc_isa_device *isadev;
 844
 845 try_isa_clock:
 846                         for_each_isadev(isadev, isa_br)
 847                                 if (isadev->prom_node == node)
 848                                         break;
 849                         if (isadev == NULL) {
 850                                 prom_printf("%s: Mostek not probed by ISA\n");
 851                                 prom_halt();
 852                         }
 853                         if (!strcmp(model, "ds1287") ||
 854                             !strcmp(model, "m5819") ||
 855                             !strcmp(model, "m5819p") ||
 856                             !strcmp(model, "m5823")) {
 857                                 ds1287_regs = isadev->resource.start;
 858                         } else {
 859                                 mstk48t59_regs = (void __iomem *)
 860                                         isadev->resource.start;
 861                                 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 862                         }
 863                         break;
 864                 }
 865 #endif
 866                 else {
 867                         if (sbus_root->num_sbus_ranges) {
 868                                 int nranges = sbus_root->num_sbus_ranges;
 869                                 int rngc;
 870
 871                                 for (rngc = 0; rngc < nranges; rngc++)
 872                                         if (clk_reg[0].which_io ==
 873                                             sbus_root->sbus_ranges[rngc].ot_child_space)
 874                                                 break;
 875                                 if (rngc == nranges) {
 876                                         prom_printf("clock_probe: Cannot find ranges for "
 877                                                     "clock regs.\n");
 878                                         prom_halt();
 879                                 }
 880                                 clk_reg[0].which_io =
 881                                         sbus_root->sbus_ranges[rngc].ot_parent_space;
 882                                 clk_reg[0].phys_addr +=
 883                                         sbus_root->sbus_ranges[rngc].ot_parent_base;
 884                         }
 885                 }
 886
 887                 if(model[5] == '0' && model[6] == '2') {
 888                         mstk48t02_regs = (void __iomem *)
 889                                 (((u64)clk_reg[0].phys_addr) |
 890                                  (((u64)clk_reg[0].which_io)<<32UL));
 891                 } else if(model[5] == '0' && model[6] == '8') {
 892                         mstk48t08_regs = (void __iomem *)
 893                                 (((u64)clk_reg[0].phys_addr) |
 894                                  (((u64)clk_reg[0].which_io)<<32UL));
 895                         mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
 896                 } else {
 897                         mstk48t59_regs = (void __iomem *)
 898                                 (((u64)clk_reg[0].phys_addr) |
 899                                  (((u64)clk_reg[0].which_io)<<32UL));
 900                         mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 901                 }
 902                 break;
 903         }
 904
 905         if (mstk48t02_regs != NULL) {
 906                 /* Report a low battery voltage condition. */
 907                 if (has_low_battery())
 908                         prom_printf("NVRAM: Low battery voltage!\n");
 909
 910                 /* Kick start the clock if it is completely stopped. */
 911                 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
 912                         kick_start_clock();
 913         }
 914
 915         set_system_time();
 916
 917         local_irq_restore(flags);
 918 }
 919
 920 /* This is gets the master TICK_INT timer going. */
 921 static unsigned long sparc64_init_timers(void)
 922 {
 923         unsigned long clock;
 924         int node;
 925 #ifdef CONFIG_SMP
 926         extern void smp_tick_init(void);
 927 #endif
 928
 929         if (tlb_type == spitfire) {
 930                 unsigned long ver, manuf, impl;
 931
 932                 __asm__ __volatile__ ("rdpr %%ver, %0"
 933                                       : "=&r" (ver));
 934                 manuf = ((ver >> 48) & 0xffff);
 935                 impl = ((ver >> 32) & 0xffff);
 936                 if (manuf == 0x17 && impl == 0x13) {
 937                         /* Hummingbird, aka Ultra-IIe */
 938                         tick_ops = &hbtick_operations;
 939                         node = prom_root_node;
 940                         clock = prom_getint(node, "stick-frequency");
 941                 } else {
 942                         tick_ops = &tick_operations;
 943                         cpu_find_by_instance(0, &node, NULL);
 944                         clock = prom_getint(node, "clock-frequency");
 945                 }
 946         } else {
 947                 tick_ops = &stick_operations;
 948                 node = prom_root_node;
 949                 clock = prom_getint(node, "stick-frequency");
 950         }
 951         timer_tick_offset = clock / HZ;
 952
 953 #ifdef CONFIG_SMP
 954         smp_tick_init();
 955 #endif
 956
 957         return clock;
 958 }
 959
 960 static void sparc64_start_timers(irqreturn_t (*cfunc)(int, void *, struct pt_regs *))
 961 {
 962         unsigned long pstate;
 963         int err;
 964
 965         /* Register IRQ handler. */
 966         err = request_irq(build_irq(0, 0, 0UL, 0UL), cfunc, 0,
 967                           "timer", NULL);
 968
 969         if (err) {
 970                 prom_printf("Serious problem, cannot register TICK_INT\n");
 971                 prom_halt();
 972         }
 973
 974         /* Guarantee that the following sequences execute
 975          * uninterrupted.
 976          */
 977         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 978                              "wrpr      %0, %1, %%pstate"
 979                              : "=r" (pstate)
 980                              : "i" (PSTATE_IE));
 981
 982         tick_ops->init_tick(timer_tick_offset);
 983
 984         /* Restore PSTATE_IE. */
 985         __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
 986                              : /* no outputs */
 987                              : "r" (pstate));
 988
 989         local_irq_enable();
 990 }
 991
 992 struct freq_table {
 993         unsigned long udelay_val_ref;
 994         unsigned long clock_tick_ref;
 995         unsigned int ref_freq;
 996 };
 997 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0, 0 };
 998
 999 unsigned long sparc64_get_clock_tick(unsigned int cpu)
1000 {
1001         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1002
1003         if (ft->clock_tick_ref)
1004                 return ft->clock_tick_ref;
1005         return cpu_data(cpu).clock_tick;
1006 }
1007
1008 #ifdef CONFIG_CPU_FREQ
1009
1010 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
1011                                     void *data)
1012 {
1013         struct cpufreq_freqs *freq = data;
1014         unsigned int cpu = freq->cpu;
1015         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1016
1017         if (!ft->ref_freq) {
1018                 ft->ref_freq = freq->old;
1019                 ft->udelay_val_ref = cpu_data(cpu).udelay_val;
1020                 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
1021         }
1022         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
1023             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
1024             (val == CPUFREQ_RESUMECHANGE)) {
1025                 cpu_data(cpu).udelay_val =
1026                         cpufreq_scale(ft->udelay_val_ref,
1027                                       ft->ref_freq,
1028                                       freq->new);
1029                 cpu_data(cpu).clock_tick =
1030                         cpufreq_scale(ft->clock_tick_ref,
1031                                       ft->ref_freq,
1032                                       freq->new);
1033         }
1034
1035         return 0;
1036 }
1037
1038 static struct notifier_block sparc64_cpufreq_notifier_block = {
1039         .notifier_call  = sparc64_cpufreq_notifier
1040 };
1041
1042 #endif /* CONFIG_CPU_FREQ */
1043
1044 static struct time_interpolator sparc64_cpu_interpolator = {
1045         .source         =       TIME_SOURCE_CPU,
1046         .shift          =       16,
1047         .mask           =       0xffffffffffffffffLL
1048 };
1049
1050 /* The quotient formula is taken from the IA64 port. */
1051 #define SPARC64_NSEC_PER_CYC_SHIFT      30UL
1052 void __init time_init(void)
1053 {
1054         unsigned long clock = sparc64_init_timers();
1055
1056         sparc64_cpu_interpolator.frequency = clock;
1057         register_time_interpolator(&sparc64_cpu_interpolator);
1058
1059         /* Now that the interpolator is registered, it is
1060          * safe to start the timer ticking.
1061          */
1062         sparc64_start_timers(timer_interrupt);
1063
1064         timer_ticks_per_nsec_quotient =
1065                 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
1066                   (clock / 2)) / clock);
1067
1068 #ifdef CONFIG_CPU_FREQ
1069         cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1070                                   CPUFREQ_TRANSITION_NOTIFIER);
1071 #endif
1072 }
1073
1074 unsigned long long sched_clock(void)
1075 {
1076         unsigned long ticks = tick_ops->get_tick();
1077
1078         return (ticks * timer_ticks_per_nsec_quotient)
1079                 >> SPARC64_NSEC_PER_CYC_SHIFT;
1080 }
1081
1082 static int set_rtc_mmss(unsigned long nowtime)
1083 {
1084         int real_seconds, real_minutes, chip_minutes;
1085         void __iomem *mregs = mstk48t02_regs;
1086 #ifdef CONFIG_PCI
1087         unsigned long dregs = ds1287_regs;
1088 #else
1089         unsigned long dregs = 0UL;
1090 #endif
1091         unsigned long flags;
1092         u8 tmp;
1093
1094         /*
1095          * Not having a register set can lead to trouble.
1096          * Also starfire doesn't have a tod clock.
1097          */
1098         if (!mregs && !dregs)
1099                 return -1;
1100
1101         if (mregs) {
1102                 spin_lock_irqsave(&mostek_lock, flags);
1103
1104                 /* Read the current RTC minutes. */
1105                 tmp = mostek_read(mregs + MOSTEK_CREG);
1106                 tmp |= MSTK_CREG_READ;
1107                 mostek_write(mregs + MOSTEK_CREG, tmp);
1108
1109                 chip_minutes = MSTK_REG_MIN(mregs);
1110
1111                 tmp = mostek_read(mregs + MOSTEK_CREG);
1112                 tmp &= ~MSTK_CREG_READ;
1113                 mostek_write(mregs + MOSTEK_CREG, tmp);
1114
1115                 /*
1116                  * since we're only adjusting minutes and seconds,
1117                  * don't interfere with hour overflow. This avoids
1118                  * messing with unknown time zones but requires your
1119                  * RTC not to be off by more than 15 minutes
1120                  */
1121                 real_seconds = nowtime % 60;
1122                 real_minutes = nowtime / 60;
1123                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1124                         real_minutes += 30;     /* correct for half hour time zone */
1125                 real_minutes %= 60;
1126
1127                 if (abs(real_minutes - chip_minutes) < 30) {
1128                         tmp = mostek_read(mregs + MOSTEK_CREG);
1129                         tmp |= MSTK_CREG_WRITE;
1130                         mostek_write(mregs + MOSTEK_CREG, tmp);
1131
1132                         MSTK_SET_REG_SEC(mregs,real_seconds);
1133                         MSTK_SET_REG_MIN(mregs,real_minutes);
1134
1135                         tmp = mostek_read(mregs + MOSTEK_CREG);
1136                         tmp &= ~MSTK_CREG_WRITE;
1137                         mostek_write(mregs + MOSTEK_CREG, tmp);
1138
1139                         spin_unlock_irqrestore(&mostek_lock, flags);
1140
1141                         return 0;
1142                 } else {
1143                         spin_unlock_irqrestore(&mostek_lock, flags);
1144
1145                         return -1;
1146                 }
1147         } else {
1148                 int retval = 0;
1149                 unsigned char save_control, save_freq_select;
1150
1151                 /* Stolen from arch/i386/kernel/time.c, see there for
1152                  * credits and descriptive comments.
1153                  */
1154                 spin_lock_irqsave(&rtc_lock, flags);
1155                 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1156                 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1157
1158                 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1159                 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1160
1161                 chip_minutes = CMOS_READ(RTC_MINUTES);
1162                 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1163                         BCD_TO_BIN(chip_minutes);
1164                 real_seconds = nowtime % 60;
1165                 real_minutes = nowtime / 60;
1166                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1167                         real_minutes += 30;
1168                 real_minutes %= 60;
1169
1170                 if (abs(real_minutes - chip_minutes) < 30) {
1171                         if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1172                                 BIN_TO_BCD(real_seconds);
1173                                 BIN_TO_BCD(real_minutes);
1174                         }
1175                         CMOS_WRITE(real_seconds,RTC_SECONDS);
1176                         CMOS_WRITE(real_minutes,RTC_MINUTES);
1177                 } else {
1178                         printk(KERN_WARNING
1179                                "set_rtc_mmss: can't update from %d to %d\n",
1180                                chip_minutes, real_minutes);
1181                         retval = -1;
1182                 }
1183
1184                 CMOS_WRITE(save_control, RTC_CONTROL);
1185                 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1186                 spin_unlock_irqrestore(&rtc_lock, flags);
1187
1188                 return retval;
1189         }
1190 }