1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/errno.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/profile.h>
32 #include <linux/miscdevice.h>
33 #include <linux/rtc.h>
35 #include <asm/oplib.h>
36 #include <asm/mostek.h>
37 #include <asm/timer.h>
41 #include <asm/of_device.h>
42 #include <asm/starfire.h>
44 #include <asm/sections.h>
45 #include <asm/cpudata.h>
46 #include <asm/uaccess.h>
49 DEFINE_SPINLOCK(mostek_lock);
50 DEFINE_SPINLOCK(rtc_lock);
51 void __iomem *mstk48t02_regs = NULL;
53 unsigned long ds1287_regs = 0UL;
56 extern unsigned long wall_jiffies;
58 static void __iomem *mstk48t08_regs;
59 static void __iomem *mstk48t59_regs;
61 static int set_rtc_mmss(unsigned long);
63 #define TICK_PRIV_BIT (1UL << 63)
66 unsigned long profile_pc(struct pt_regs *regs)
68 unsigned long pc = instruction_pointer(regs);
70 if (in_lock_functions(pc))
71 return regs->u_regs[UREG_RETPC];
74 EXPORT_SYMBOL(profile_pc);
77 static void tick_disable_protection(void)
79 /* Set things up so user can access tick register for profiling
80 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
81 * read back of %tick after writing it.
87 "1: rd %%tick, %%g2\n"
88 " add %%g2, 6, %%g2\n"
89 " andn %%g2, %0, %%g2\n"
90 " wrpr %%g2, 0, %%tick\n"
97 static void tick_init_tick(unsigned long offset)
99 tick_disable_protection();
101 __asm__ __volatile__(
103 " andn %%g1, %1, %%g1\n"
105 " add %%g1, %0, %%g1\n"
107 "1: wr %%g1, 0x0, %%tick_cmpr\n"
108 " rd %%tick_cmpr, %%g0"
110 : "r" (offset), "r" (TICK_PRIV_BIT)
114 static unsigned long tick_get_tick(void)
118 __asm__ __volatile__("rd %%tick, %0\n\t"
122 return ret & ~TICK_PRIV_BIT;
125 static unsigned long tick_get_compare(void)
129 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
136 static unsigned long tick_add_compare(unsigned long adj)
138 unsigned long new_compare;
140 /* Workaround for Spitfire Errata (#54 I think??), I discovered
141 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
144 * On Blackbird writes to %tick_cmpr can fail, the
145 * workaround seems to be to execute the wr instruction
146 * at the start of an I-cache line, and perform a dummy
147 * read back from %tick_cmpr right after writing to it. -DaveM
149 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
150 "ba,pt %%xcc, 1f\n\t"
151 " add %0, %1, %0\n\t"
154 "wr %0, 0, %%tick_cmpr\n\t"
155 "rd %%tick_cmpr, %%g0"
156 : "=&r" (new_compare)
162 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
164 unsigned long new_tick, tmp;
166 /* Also need to handle Blackbird bug here too. */
167 __asm__ __volatile__("rd %%tick, %0\n\t"
169 "wrpr %0, 0, %%tick\n\t"
170 "andn %0, %4, %1\n\t"
171 "ba,pt %%xcc, 1f\n\t"
172 " add %1, %3, %1\n\t"
175 "wr %1, 0, %%tick_cmpr\n\t"
176 "rd %%tick_cmpr, %%g0"
177 : "=&r" (new_tick), "=&r" (tmp)
178 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
183 static struct sparc64_tick_ops tick_operations __read_mostly = {
184 .init_tick = tick_init_tick,
185 .get_tick = tick_get_tick,
186 .get_compare = tick_get_compare,
187 .add_tick = tick_add_tick,
188 .add_compare = tick_add_compare,
189 .softint_mask = 1UL << 0,
192 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
194 static void stick_init_tick(unsigned long offset)
196 /* Writes to the %tick and %stick register are not
197 * allowed on sun4v. The Hypervisor controls that
200 if (tlb_type != hypervisor) {
201 tick_disable_protection();
203 /* Let the user get at STICK too. */
204 __asm__ __volatile__(
205 " rd %%asr24, %%g2\n"
206 " andn %%g2, %0, %%g2\n"
207 " wr %%g2, 0, %%asr24"
209 : "r" (TICK_PRIV_BIT)
213 __asm__ __volatile__(
214 " rd %%asr24, %%g1\n"
215 " andn %%g1, %1, %%g1\n"
216 " add %%g1, %0, %%g1\n"
217 " wr %%g1, 0x0, %%asr25"
219 : "r" (offset), "r" (TICK_PRIV_BIT)
223 static unsigned long stick_get_tick(void)
227 __asm__ __volatile__("rd %%asr24, %0"
230 return ret & ~TICK_PRIV_BIT;
233 static unsigned long stick_get_compare(void)
237 __asm__ __volatile__("rd %%asr25, %0"
243 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
245 unsigned long new_tick, tmp;
247 __asm__ __volatile__("rd %%asr24, %0\n\t"
249 "wr %0, 0, %%asr24\n\t"
250 "andn %0, %4, %1\n\t"
253 : "=&r" (new_tick), "=&r" (tmp)
254 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
259 static unsigned long stick_add_compare(unsigned long adj)
261 unsigned long new_compare;
263 __asm__ __volatile__("rd %%asr25, %0\n\t"
266 : "=&r" (new_compare)
272 static struct sparc64_tick_ops stick_operations __read_mostly = {
273 .init_tick = stick_init_tick,
274 .get_tick = stick_get_tick,
275 .get_compare = stick_get_compare,
276 .add_tick = stick_add_tick,
277 .add_compare = stick_add_compare,
278 .softint_mask = 1UL << 16,
281 /* On Hummingbird the STICK/STICK_CMPR register is implemented
282 * in I/O space. There are two 64-bit registers each, the
283 * first holds the low 32-bits of the value and the second holds
286 * Since STICK is constantly updating, we have to access it carefully.
288 * The sequence we use to read is:
291 * 3) read high again, if it rolled re-read both low and high again.
293 * Writing STICK safely is also tricky:
294 * 1) write low to zero
298 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
299 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
301 static unsigned long __hbird_read_stick(void)
303 unsigned long ret, tmp1, tmp2, tmp3;
304 unsigned long addr = HBIRD_STICK_ADDR+8;
306 __asm__ __volatile__("ldxa [%1] %5, %2\n"
308 "sub %1, 0x8, %1\n\t"
309 "ldxa [%1] %5, %3\n\t"
310 "add %1, 0x8, %1\n\t"
311 "ldxa [%1] %5, %4\n\t"
313 "bne,a,pn %%xcc, 1b\n\t"
315 "sllx %4, 32, %4\n\t"
317 : "=&r" (ret), "=&r" (addr),
318 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
319 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
324 static unsigned long __hbird_read_compare(void)
326 unsigned long low, high;
327 unsigned long addr = HBIRD_STICKCMP_ADDR;
329 __asm__ __volatile__("ldxa [%2] %3, %0\n\t"
330 "add %2, 0x8, %2\n\t"
332 : "=&r" (low), "=&r" (high), "=&r" (addr)
333 : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
335 return (high << 32UL) | low;
338 static void __hbird_write_stick(unsigned long val)
340 unsigned long low = (val & 0xffffffffUL);
341 unsigned long high = (val >> 32UL);
342 unsigned long addr = HBIRD_STICK_ADDR;
344 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
345 "add %0, 0x8, %0\n\t"
346 "stxa %3, [%0] %4\n\t"
347 "sub %0, 0x8, %0\n\t"
350 : "0" (addr), "r" (low), "r" (high),
351 "i" (ASI_PHYS_BYPASS_EC_E));
354 static void __hbird_write_compare(unsigned long val)
356 unsigned long low = (val & 0xffffffffUL);
357 unsigned long high = (val >> 32UL);
358 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
360 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
361 "sub %0, 0x8, %0\n\t"
364 : "0" (addr), "r" (low), "r" (high),
365 "i" (ASI_PHYS_BYPASS_EC_E));
368 static void hbtick_init_tick(unsigned long offset)
372 tick_disable_protection();
374 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
375 * XXX into actually sending STICK interrupts. I think because
376 * XXX of how we store %tick_cmpr in head.S this somehow resets the
377 * XXX {TICK + STICK} interrupt mux. -DaveM
379 __hbird_write_stick(__hbird_read_stick());
381 val = __hbird_read_stick() & ~TICK_PRIV_BIT;
382 __hbird_write_compare(val + offset);
385 static unsigned long hbtick_get_tick(void)
387 return __hbird_read_stick() & ~TICK_PRIV_BIT;
390 static unsigned long hbtick_get_compare(void)
392 return __hbird_read_compare();
395 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
399 val = __hbird_read_stick() + adj;
400 __hbird_write_stick(val);
402 val &= ~TICK_PRIV_BIT;
403 __hbird_write_compare(val + offset);
408 static unsigned long hbtick_add_compare(unsigned long adj)
410 unsigned long val = __hbird_read_compare() + adj;
412 val &= ~TICK_PRIV_BIT;
413 __hbird_write_compare(val);
418 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
419 .init_tick = hbtick_init_tick,
420 .get_tick = hbtick_get_tick,
421 .get_compare = hbtick_get_compare,
422 .add_tick = hbtick_add_tick,
423 .add_compare = hbtick_add_compare,
424 .softint_mask = 1UL << 0,
427 /* timer_interrupt() needs to keep up the real-time clock,
428 * as well as call the "do_timer()" routine every clocktick
430 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
431 * interrupts, one at level14 and one with softint bit 0.
433 unsigned long timer_tick_offset __read_mostly;
435 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
437 #define TICK_SIZE (tick_nsec / 1000)
439 static inline void timer_check_rtc(void)
441 /* last time the cmos clock got updated */
442 static long last_rtc_update;
444 /* Determine when to update the Mostek clock. */
446 xtime.tv_sec > last_rtc_update + 660 &&
447 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
448 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
449 if (set_rtc_mmss(xtime.tv_sec) == 0)
450 last_rtc_update = xtime.tv_sec;
452 last_rtc_update = xtime.tv_sec - 600;
453 /* do it again in 60 s */
457 irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
459 unsigned long ticks, compare, pstate;
461 write_seqlock(&xtime_lock);
465 profile_tick(CPU_PROFILING, regs);
466 update_process_times(user_mode(regs));
470 /* Guarantee that the following sequences execute
473 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
474 "wrpr %0, %1, %%pstate"
478 compare = tick_ops->add_compare(timer_tick_offset);
479 ticks = tick_ops->get_tick();
481 /* Restore PSTATE_IE. */
482 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
485 } while (time_after_eq(ticks, compare));
489 write_sequnlock(&xtime_lock);
495 void timer_tick_interrupt(struct pt_regs *regs)
497 write_seqlock(&xtime_lock);
503 write_sequnlock(&xtime_lock);
507 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
508 static void __init kick_start_clock(void)
510 void __iomem *regs = mstk48t02_regs;
514 prom_printf("CLOCK: Clock was stopped. Kick start ");
516 spin_lock_irq(&mostek_lock);
518 /* Turn on the kick start bit to start the oscillator. */
519 tmp = mostek_read(regs + MOSTEK_CREG);
520 tmp |= MSTK_CREG_WRITE;
521 mostek_write(regs + MOSTEK_CREG, tmp);
522 tmp = mostek_read(regs + MOSTEK_SEC);
524 mostek_write(regs + MOSTEK_SEC, tmp);
525 tmp = mostek_read(regs + MOSTEK_HOUR);
526 tmp |= MSTK_KICK_START;
527 mostek_write(regs + MOSTEK_HOUR, tmp);
528 tmp = mostek_read(regs + MOSTEK_CREG);
529 tmp &= ~MSTK_CREG_WRITE;
530 mostek_write(regs + MOSTEK_CREG, tmp);
532 spin_unlock_irq(&mostek_lock);
534 /* Delay to allow the clock oscillator to start. */
535 sec = MSTK_REG_SEC(regs);
536 for (i = 0; i < 3; i++) {
537 while (sec == MSTK_REG_SEC(regs))
538 for (count = 0; count < 100000; count++)
541 sec = MSTK_REG_SEC(regs);
545 spin_lock_irq(&mostek_lock);
547 /* Turn off kick start and set a "valid" time and date. */
548 tmp = mostek_read(regs + MOSTEK_CREG);
549 tmp |= MSTK_CREG_WRITE;
550 mostek_write(regs + MOSTEK_CREG, tmp);
551 tmp = mostek_read(regs + MOSTEK_HOUR);
552 tmp &= ~MSTK_KICK_START;
553 mostek_write(regs + MOSTEK_HOUR, tmp);
554 MSTK_SET_REG_SEC(regs,0);
555 MSTK_SET_REG_MIN(regs,0);
556 MSTK_SET_REG_HOUR(regs,0);
557 MSTK_SET_REG_DOW(regs,5);
558 MSTK_SET_REG_DOM(regs,1);
559 MSTK_SET_REG_MONTH(regs,8);
560 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
561 tmp = mostek_read(regs + MOSTEK_CREG);
562 tmp &= ~MSTK_CREG_WRITE;
563 mostek_write(regs + MOSTEK_CREG, tmp);
565 spin_unlock_irq(&mostek_lock);
567 /* Ensure the kick start bit is off. If it isn't, turn it off. */
568 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
569 prom_printf("CLOCK: Kick start still on!\n");
571 spin_lock_irq(&mostek_lock);
573 tmp = mostek_read(regs + MOSTEK_CREG);
574 tmp |= MSTK_CREG_WRITE;
575 mostek_write(regs + MOSTEK_CREG, tmp);
577 tmp = mostek_read(regs + MOSTEK_HOUR);
578 tmp &= ~MSTK_KICK_START;
579 mostek_write(regs + MOSTEK_HOUR, tmp);
581 tmp = mostek_read(regs + MOSTEK_CREG);
582 tmp &= ~MSTK_CREG_WRITE;
583 mostek_write(regs + MOSTEK_CREG, tmp);
585 spin_unlock_irq(&mostek_lock);
588 prom_printf("CLOCK: Kick start procedure successful.\n");
591 /* Return nonzero if the clock chip battery is low. */
592 static int __init has_low_battery(void)
594 void __iomem *regs = mstk48t02_regs;
597 spin_lock_irq(&mostek_lock);
599 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
600 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
601 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
602 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
604 spin_unlock_irq(&mostek_lock);
606 return (data1 == data2); /* Was the write blocked? */
609 /* Probe for the real time clock chip. */
610 static void __init set_system_time(void)
612 unsigned int year, mon, day, hour, min, sec;
613 void __iomem *mregs = mstk48t02_regs;
615 unsigned long dregs = ds1287_regs;
617 unsigned long dregs = 0UL;
621 if (!mregs && !dregs) {
622 prom_printf("Something wrong, clock regs not mapped yet.\n");
627 spin_lock_irq(&mostek_lock);
629 /* Traditional Mostek chip. */
630 tmp = mostek_read(mregs + MOSTEK_CREG);
631 tmp |= MSTK_CREG_READ;
632 mostek_write(mregs + MOSTEK_CREG, tmp);
634 sec = MSTK_REG_SEC(mregs);
635 min = MSTK_REG_MIN(mregs);
636 hour = MSTK_REG_HOUR(mregs);
637 day = MSTK_REG_DOM(mregs);
638 mon = MSTK_REG_MONTH(mregs);
639 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
641 /* Dallas 12887 RTC chip. */
644 sec = CMOS_READ(RTC_SECONDS);
645 min = CMOS_READ(RTC_MINUTES);
646 hour = CMOS_READ(RTC_HOURS);
647 day = CMOS_READ(RTC_DAY_OF_MONTH);
648 mon = CMOS_READ(RTC_MONTH);
649 year = CMOS_READ(RTC_YEAR);
650 } while (sec != CMOS_READ(RTC_SECONDS));
652 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
660 if ((year += 1900) < 1970)
664 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
665 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
666 set_normalized_timespec(&wall_to_monotonic,
667 -xtime.tv_sec, -xtime.tv_nsec);
670 tmp = mostek_read(mregs + MOSTEK_CREG);
671 tmp &= ~MSTK_CREG_READ;
672 mostek_write(mregs + MOSTEK_CREG, tmp);
674 spin_unlock_irq(&mostek_lock);
678 /* davem suggests we keep this within the 4M locked kernel image */
679 static u32 starfire_get_time(void)
681 static char obp_gettod[32];
684 sprintf(obp_gettod, "h# %08x unix-gettod",
685 (unsigned int) (long) &unix_tod);
686 prom_feval(obp_gettod);
691 static int starfire_set_time(u32 val)
693 /* Do nothing, time is set using the service processor
694 * console on this platform.
699 static u32 hypervisor_get_time(void)
701 register unsigned long func asm("%o5");
702 register unsigned long arg0 asm("%o0");
703 register unsigned long arg1 asm("%o1");
707 func = HV_FAST_TOD_GET;
710 __asm__ __volatile__("ta %6"
711 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
712 : "0" (func), "1" (arg0), "2" (arg1),
716 if (arg0 == HV_EWOULDBLOCK) {
721 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
724 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
728 static int hypervisor_set_time(u32 secs)
730 register unsigned long func asm("%o5");
731 register unsigned long arg0 asm("%o0");
735 func = HV_FAST_TOD_SET;
737 __asm__ __volatile__("ta %4"
738 : "=&r" (func), "=&r" (arg0)
739 : "0" (func), "1" (arg0),
743 if (arg0 == HV_EWOULDBLOCK) {
748 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
751 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
755 static int __init clock_model_matches(char *model)
757 if (strcmp(model, "mk48t02") &&
758 strcmp(model, "mk48t08") &&
759 strcmp(model, "mk48t59") &&
760 strcmp(model, "m5819") &&
761 strcmp(model, "m5819p") &&
762 strcmp(model, "m5823") &&
763 strcmp(model, "ds1287"))
769 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
771 struct device_node *dp = op->node;
772 char *model = of_get_property(dp, "model", NULL);
773 unsigned long size, flags;
776 if (!model || !clock_model_matches(model))
779 /* On an Enterprise system there can be multiple mostek clocks.
780 * We should only match the one that is on the central FHC bus.
782 if (!strcmp(dp->parent->name, "fhc") &&
783 strcmp(dp->parent->parent->name, "central") != 0)
786 size = (op->resource[0].end - op->resource[0].start) + 1;
787 regs = of_ioremap(&op->resource[0], 0, size, "clock");
791 if (!strcmp(model, "ds1287") ||
792 !strcmp(model, "m5819") ||
793 !strcmp(model, "m5819p") ||
794 !strcmp(model, "m5823")) {
795 ds1287_regs = (unsigned long) regs;
796 } else if (model[5] == '0' && model[6] == '2') {
797 mstk48t02_regs = regs;
798 } else if(model[5] == '0' && model[6] == '8') {
799 mstk48t08_regs = regs;
800 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
802 mstk48t59_regs = regs;
803 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
806 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
808 local_irq_save(flags);
810 if (mstk48t02_regs != NULL) {
811 /* Report a low battery voltage condition. */
812 if (has_low_battery())
813 prom_printf("NVRAM: Low battery voltage!\n");
815 /* Kick start the clock if it is completely stopped. */
816 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
822 local_irq_restore(flags);
827 static struct of_device_id clock_match[] = {
837 static struct of_platform_driver clock_driver = {
839 .match_table = clock_match,
840 .probe = clock_probe,
843 static int __init clock_init(void)
845 if (this_is_starfire) {
846 xtime.tv_sec = starfire_get_time();
847 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
848 set_normalized_timespec(&wall_to_monotonic,
849 -xtime.tv_sec, -xtime.tv_nsec);
852 if (tlb_type == hypervisor) {
853 xtime.tv_sec = hypervisor_get_time();
854 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
855 set_normalized_timespec(&wall_to_monotonic,
856 -xtime.tv_sec, -xtime.tv_nsec);
860 return of_register_driver(&clock_driver, &of_bus_type);
863 /* Must be after subsys_initcall() so that busses are probed. Must
864 * be before device_initcall() because things like the RTC driver
865 * need to see the clock registers.
867 fs_initcall(clock_init);
869 /* This is gets the master TICK_INT timer going. */
870 static unsigned long sparc64_init_timers(void)
872 struct device_node *dp;
873 struct property *prop;
876 extern void smp_tick_init(void);
879 dp = of_find_node_by_path("/");
880 if (tlb_type == spitfire) {
881 unsigned long ver, manuf, impl;
883 __asm__ __volatile__ ("rdpr %%ver, %0"
885 manuf = ((ver >> 48) & 0xffff);
886 impl = ((ver >> 32) & 0xffff);
887 if (manuf == 0x17 && impl == 0x13) {
888 /* Hummingbird, aka Ultra-IIe */
889 tick_ops = &hbtick_operations;
890 prop = of_find_property(dp, "stick-frequency", NULL);
892 tick_ops = &tick_operations;
893 cpu_find_by_instance(0, &dp, NULL);
894 prop = of_find_property(dp, "clock-frequency", NULL);
897 tick_ops = &stick_operations;
898 prop = of_find_property(dp, "stick-frequency", NULL);
900 clock = *(unsigned int *) prop->value;
901 timer_tick_offset = clock / HZ;
910 static void sparc64_start_timers(void)
912 unsigned long pstate;
914 /* Guarantee that the following sequences execute
917 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
918 "wrpr %0, %1, %%pstate"
922 tick_ops->init_tick(timer_tick_offset);
924 /* Restore PSTATE_IE. */
925 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
933 unsigned long clock_tick_ref;
934 unsigned int ref_freq;
936 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
938 unsigned long sparc64_get_clock_tick(unsigned int cpu)
940 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
942 if (ft->clock_tick_ref)
943 return ft->clock_tick_ref;
944 return cpu_data(cpu).clock_tick;
947 #ifdef CONFIG_CPU_FREQ
949 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
952 struct cpufreq_freqs *freq = data;
953 unsigned int cpu = freq->cpu;
954 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
957 ft->ref_freq = freq->old;
958 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
960 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
961 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
962 (val == CPUFREQ_RESUMECHANGE)) {
963 cpu_data(cpu).clock_tick =
964 cpufreq_scale(ft->clock_tick_ref,
972 static struct notifier_block sparc64_cpufreq_notifier_block = {
973 .notifier_call = sparc64_cpufreq_notifier
976 #endif /* CONFIG_CPU_FREQ */
978 static struct time_interpolator sparc64_cpu_interpolator = {
979 .source = TIME_SOURCE_CPU,
981 .mask = 0xffffffffffffffffLL
984 /* The quotient formula is taken from the IA64 port. */
985 #define SPARC64_NSEC_PER_CYC_SHIFT 30UL
986 void __init time_init(void)
988 unsigned long clock = sparc64_init_timers();
990 sparc64_cpu_interpolator.frequency = clock;
991 register_time_interpolator(&sparc64_cpu_interpolator);
993 /* Now that the interpolator is registered, it is
994 * safe to start the timer ticking.
996 sparc64_start_timers();
998 timer_ticks_per_nsec_quotient =
999 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
1000 (clock / 2)) / clock);
1002 #ifdef CONFIG_CPU_FREQ
1003 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1004 CPUFREQ_TRANSITION_NOTIFIER);
1008 unsigned long long sched_clock(void)
1010 unsigned long ticks = tick_ops->get_tick();
1012 return (ticks * timer_ticks_per_nsec_quotient)
1013 >> SPARC64_NSEC_PER_CYC_SHIFT;
1016 static int set_rtc_mmss(unsigned long nowtime)
1018 int real_seconds, real_minutes, chip_minutes;
1019 void __iomem *mregs = mstk48t02_regs;
1021 unsigned long dregs = ds1287_regs;
1023 unsigned long dregs = 0UL;
1025 unsigned long flags;
1029 * Not having a register set can lead to trouble.
1030 * Also starfire doesn't have a tod clock.
1032 if (!mregs && !dregs)
1036 spin_lock_irqsave(&mostek_lock, flags);
1038 /* Read the current RTC minutes. */
1039 tmp = mostek_read(mregs + MOSTEK_CREG);
1040 tmp |= MSTK_CREG_READ;
1041 mostek_write(mregs + MOSTEK_CREG, tmp);
1043 chip_minutes = MSTK_REG_MIN(mregs);
1045 tmp = mostek_read(mregs + MOSTEK_CREG);
1046 tmp &= ~MSTK_CREG_READ;
1047 mostek_write(mregs + MOSTEK_CREG, tmp);
1050 * since we're only adjusting minutes and seconds,
1051 * don't interfere with hour overflow. This avoids
1052 * messing with unknown time zones but requires your
1053 * RTC not to be off by more than 15 minutes
1055 real_seconds = nowtime % 60;
1056 real_minutes = nowtime / 60;
1057 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1058 real_minutes += 30; /* correct for half hour time zone */
1061 if (abs(real_minutes - chip_minutes) < 30) {
1062 tmp = mostek_read(mregs + MOSTEK_CREG);
1063 tmp |= MSTK_CREG_WRITE;
1064 mostek_write(mregs + MOSTEK_CREG, tmp);
1066 MSTK_SET_REG_SEC(mregs,real_seconds);
1067 MSTK_SET_REG_MIN(mregs,real_minutes);
1069 tmp = mostek_read(mregs + MOSTEK_CREG);
1070 tmp &= ~MSTK_CREG_WRITE;
1071 mostek_write(mregs + MOSTEK_CREG, tmp);
1073 spin_unlock_irqrestore(&mostek_lock, flags);
1077 spin_unlock_irqrestore(&mostek_lock, flags);
1083 unsigned char save_control, save_freq_select;
1085 /* Stolen from arch/i386/kernel/time.c, see there for
1086 * credits and descriptive comments.
1088 spin_lock_irqsave(&rtc_lock, flags);
1089 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1090 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1092 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1093 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1095 chip_minutes = CMOS_READ(RTC_MINUTES);
1096 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1097 BCD_TO_BIN(chip_minutes);
1098 real_seconds = nowtime % 60;
1099 real_minutes = nowtime / 60;
1100 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1104 if (abs(real_minutes - chip_minutes) < 30) {
1105 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1106 BIN_TO_BCD(real_seconds);
1107 BIN_TO_BCD(real_minutes);
1109 CMOS_WRITE(real_seconds,RTC_SECONDS);
1110 CMOS_WRITE(real_minutes,RTC_MINUTES);
1113 "set_rtc_mmss: can't update from %d to %d\n",
1114 chip_minutes, real_minutes);
1118 CMOS_WRITE(save_control, RTC_CONTROL);
1119 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1120 spin_unlock_irqrestore(&rtc_lock, flags);
1126 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1127 static unsigned char mini_rtc_status; /* bitmapped status byte. */
1129 /* months start at 0 now */
1130 static unsigned char days_in_mo[] =
1131 {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
1134 #define STARTOFTIME 1970
1135 #define SECDAY 86400L
1136 #define SECYR (SECDAY * 365)
1137 #define leapyear(year) ((year) % 4 == 0 && \
1138 ((year) % 100 != 0 || (year) % 400 == 0))
1139 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1140 #define days_in_month(a) (month_days[(a) - 1])
1142 static int month_days[12] = {
1143 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1147 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1149 static void GregorianDay(struct rtc_time * tm)
1154 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1156 lastYear = tm->tm_year - 1;
1159 * Number of leap corrections to apply up to end of last year
1161 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1164 * This year is a leap year if it is divisible by 4 except when it is
1165 * divisible by 100 unless it is divisible by 400
1167 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1169 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1171 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1174 tm->tm_wday = day % 7;
1177 static void to_tm(int tim, struct rtc_time *tm)
1180 register long hms, day;
1185 /* Hours, minutes, seconds are easy */
1186 tm->tm_hour = hms / 3600;
1187 tm->tm_min = (hms % 3600) / 60;
1188 tm->tm_sec = (hms % 3600) % 60;
1190 /* Number of years in days */
1191 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1192 day -= days_in_year(i);
1195 /* Number of months in days left */
1196 if (leapyear(tm->tm_year))
1197 days_in_month(FEBRUARY) = 29;
1198 for (i = 1; day >= days_in_month(i); i++)
1199 day -= days_in_month(i);
1200 days_in_month(FEBRUARY) = 28;
1203 /* Days are what is left over (+1) from all that. */
1204 tm->tm_mday = day + 1;
1207 * Determine the day of week
1212 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1213 * aka Unix time. So we have to convert to/from rtc_time.
1215 static inline void mini_get_rtc_time(struct rtc_time *time)
1217 unsigned long flags;
1220 spin_lock_irqsave(&rtc_lock, flags);
1222 if (this_is_starfire)
1223 seconds = starfire_get_time();
1224 else if (tlb_type == hypervisor)
1225 seconds = hypervisor_get_time();
1226 spin_unlock_irqrestore(&rtc_lock, flags);
1228 to_tm(seconds, time);
1229 time->tm_year -= 1900;
1233 static inline int mini_set_rtc_time(struct rtc_time *time)
1235 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1236 time->tm_mday, time->tm_hour,
1237 time->tm_min, time->tm_sec);
1238 unsigned long flags;
1241 spin_lock_irqsave(&rtc_lock, flags);
1243 if (this_is_starfire)
1244 err = starfire_set_time(seconds);
1245 else if (tlb_type == hypervisor)
1246 err = hypervisor_set_time(seconds);
1247 spin_unlock_irqrestore(&rtc_lock, flags);
1252 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1253 unsigned int cmd, unsigned long arg)
1255 struct rtc_time wtime;
1256 void __user *argp = (void __user *)arg;
1266 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1269 case RTC_UIE_ON: /* enable ints for RTC updates. */
1272 case RTC_RD_TIME: /* Read the time/date from RTC */
1273 /* this doesn't get week-day, who cares */
1274 memset(&wtime, 0, sizeof(wtime));
1275 mini_get_rtc_time(&wtime);
1277 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1279 case RTC_SET_TIME: /* Set the RTC */
1282 unsigned char leap_yr;
1284 if (!capable(CAP_SYS_TIME))
1287 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1290 year = wtime.tm_year + 1900;
1291 leap_yr = ((!(year % 4) && (year % 100)) ||
1294 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1))
1297 if (wtime.tm_mday < 0 || wtime.tm_mday >
1298 (days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr)))
1301 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1302 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1303 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1306 return mini_set_rtc_time(&wtime);
1313 static int mini_rtc_open(struct inode *inode, struct file *file)
1315 if (mini_rtc_status & RTC_IS_OPEN)
1318 mini_rtc_status |= RTC_IS_OPEN;
1323 static int mini_rtc_release(struct inode *inode, struct file *file)
1325 mini_rtc_status &= ~RTC_IS_OPEN;
1330 static struct file_operations mini_rtc_fops = {
1331 .owner = THIS_MODULE,
1332 .ioctl = mini_rtc_ioctl,
1333 .open = mini_rtc_open,
1334 .release = mini_rtc_release,
1337 static struct miscdevice rtc_mini_dev =
1341 .fops = &mini_rtc_fops,
1344 static int __init rtc_mini_init(void)
1348 if (tlb_type != hypervisor && !this_is_starfire)
1351 printk(KERN_INFO "Mini RTC Driver\n");
1353 retval = misc_register(&rtc_mini_dev);
1360 static void __exit rtc_mini_exit(void)
1362 misc_deregister(&rtc_mini_dev);
1366 module_init(rtc_mini_init);
1367 module_exit(rtc_mini_exit);