1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
5 #include <linux/delay.h>
7 #include <asm/alternative.h>
8 #include <asm/fixmap.h>
9 #include <asm/apicdef.h>
10 #include <asm/processor.h>
11 #include <asm/system.h>
12 #include <asm/cpufeature.h>
15 #define ARCH_APICTIMER_STOPS_ON_C3 1
21 #define APIC_VERBOSE 1
25 * Define the default level of output to be very little
26 * This can be turned up by using apic=verbose for more
27 * information and apic=debug for _lots_ of information.
28 * apic_verbosity is defined in apic.c
30 #define apic_printk(v, s, a...) do { \
31 if ((v) <= apic_verbosity) \
36 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
37 extern void generic_apic_probe(void);
39 static inline void generic_apic_probe(void)
44 #ifdef CONFIG_X86_LOCAL_APIC
46 extern unsigned int apic_verbosity;
47 extern int local_apic_timer_c2_ok;
49 extern int disable_apic;
52 extern void __inquire_remote_apic(int apicid);
53 #else /* CONFIG_SMP */
54 static inline void __inquire_remote_apic(int apicid)
57 #endif /* CONFIG_SMP */
59 static inline void default_inquire_remote_apic(int apicid)
61 if (apic_verbosity >= APIC_DEBUG)
62 __inquire_remote_apic(apicid);
66 * Basic functions accessing APICs.
68 #ifdef CONFIG_PARAVIRT
69 #include <asm/paravirt.h>
71 #define setup_boot_clock setup_boot_APIC_clock
72 #define setup_secondary_clock setup_secondary_APIC_clock
75 extern int is_vsmp_box(void);
76 extern void xapic_wait_icr_idle(void);
77 extern u32 safe_xapic_wait_icr_idle(void);
78 extern void xapic_icr_write(u32, u32);
79 extern int setup_profiling_timer(unsigned int);
81 static inline void native_apic_mem_write(u32 reg, u32 v)
83 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
85 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP,
86 ASM_OUTPUT2("=r" (v), "=m" (*addr)),
87 ASM_OUTPUT2("0" (v), "m" (*addr)));
90 static inline u32 native_apic_mem_read(u32 reg)
92 return *((volatile u32 *)(APIC_BASE + reg));
95 static inline void native_apic_msr_write(u32 reg, u32 v)
97 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
101 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
104 static inline u32 native_apic_msr_read(u32 reg)
111 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high);
115 #ifndef CONFIG_X86_32
117 extern void check_x2apic(void);
118 extern void enable_x2apic(void);
119 extern void enable_IR_x2apic(void);
120 extern void x2apic_icr_write(u32 low, u32 id);
121 static inline int x2apic_enabled(void)
128 rdmsr(MSR_IA32_APICBASE, msr, msr2);
129 if (msr & X2APIC_ENABLE)
134 #define x2apic_enabled() 0
138 u32 (*read)(u32 reg);
139 void (*write)(u32 reg, u32 v);
140 u64 (*icr_read)(void);
141 void (*icr_write)(u32 low, u32 high);
142 void (*wait_icr_idle)(void);
143 u32 (*safe_wait_icr_idle)(void);
146 extern struct apic_ops *apic_ops;
148 static inline u32 apic_read(u32 reg)
150 return apic_ops->read(reg);
153 static inline void apic_write(u32 reg, u32 val)
155 apic_ops->write(reg, val);
158 static inline u64 apic_icr_read(void)
160 return apic_ops->icr_read();
163 static inline void apic_icr_write(u32 low, u32 high)
165 apic_ops->icr_write(low, high);
168 static inline void apic_wait_icr_idle(void)
170 apic_ops->wait_icr_idle();
173 static inline u32 safe_apic_wait_icr_idle(void)
175 return apic_ops->safe_wait_icr_idle();
178 extern int get_physical_broadcast(void);
181 static inline void ack_x2APIC_irq(void)
183 /* Docs say use 0 for future compatibility */
184 native_apic_msr_write(APIC_EOI, 0);
189 static inline void ack_APIC_irq(void)
192 * ack_APIC_irq() actually gets compiled as a single instruction
196 /* Docs say use 0 for future compatibility */
197 apic_write(APIC_EOI, 0);
200 extern int lapic_get_maxlvt(void);
201 extern void clear_local_APIC(void);
202 extern void connect_bsp_APIC(void);
203 extern void disconnect_bsp_APIC(int virt_wire_setup);
204 extern void disable_local_APIC(void);
205 extern void lapic_shutdown(void);
206 extern int verify_local_APIC(void);
207 extern void cache_APIC_registers(void);
208 extern void sync_Arb_IDs(void);
209 extern void init_bsp_APIC(void);
210 extern void setup_local_APIC(void);
211 extern void end_local_APIC_setup(void);
212 extern void init_apic_mappings(void);
213 extern void setup_boot_APIC_clock(void);
214 extern void setup_secondary_APIC_clock(void);
215 extern int APIC_init_uniprocessor(void);
216 extern void enable_NMI_through_LVT0(void);
219 * On 32bit this is mach-xxx local
222 extern void early_init_lapic_mapping(void);
223 extern int apic_is_clustered_box(void);
225 static inline int apic_is_clustered_box(void)
231 extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
232 extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
235 #else /* !CONFIG_X86_LOCAL_APIC */
236 static inline void lapic_shutdown(void) { }
237 #define local_apic_timer_c2_ok 1
238 static inline void init_apic_mappings(void) { }
239 static inline void disable_local_APIC(void) { }
241 #endif /* !CONFIG_X86_LOCAL_APIC */
244 #define SET_APIC_ID(x) (apic->set_apic_id(x))
247 #ifdef CONFIG_X86_LOCAL_APIC
248 static inline unsigned default_get_apic_id(unsigned long x)
250 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
253 return (x >> 24) & 0xFF;
255 return (x >> 24) & 0x0F;
261 #endif /* _ASM_X86_APIC_H */