1 #include <linux/init.h>
2 #include <linux/string.h>
3 #include <linux/delay.h>
5 #include <linux/module.h>
6 #include <linux/percpu.h>
7 #include <linux/bootmem.h>
8 #include <asm/semaphore.h>
9 #include <asm/processor.h>
13 #include <asm/mmu_context.h>
16 #ifdef CONFIG_X86_LOCAL_APIC
17 #include <asm/mpspec.h>
19 #include <mach_apic.h>
24 DEFINE_PER_CPU(struct gdt_page, gdt_page) = { .gdt = {
25 [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } },
26 [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } },
27 [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } },
28 [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff200 } } },
30 * Segments used for calling PnP BIOS have byte granularity.
31 * They code segments and data segments have fixed 64k limits,
32 * the transfer segment sizes are set at run time.
35 [GDT_ENTRY_PNPBIOS_CS32] = { { { 0x0000ffff, 0x00409a00 } } },
37 [GDT_ENTRY_PNPBIOS_CS16] = { { { 0x0000ffff, 0x00009a00 } } },
39 [GDT_ENTRY_PNPBIOS_DS] = { { { 0x0000ffff, 0x00009200 } } },
41 [GDT_ENTRY_PNPBIOS_TS1] = { { { 0x00000000, 0x00009200 } } },
43 [GDT_ENTRY_PNPBIOS_TS2] = { { { 0x00000000, 0x00009200 } } },
45 * The APM segments have byte granularity and their bases
46 * are set at run time. All have 64k limits.
49 [GDT_ENTRY_APMBIOS_BASE] = { { { 0x0000ffff, 0x00409a00 } } },
51 [GDT_ENTRY_APMBIOS_BASE+1] = { { { 0x0000ffff, 0x00009a00 } } },
53 [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } },
55 [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } },
56 [GDT_ENTRY_PERCPU] = { { { 0x00000000, 0x00000000 } } },
58 EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
60 __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata;
62 static int cachesize_override __cpuinitdata = -1;
63 static int disable_x86_serial_nr __cpuinitdata = 1;
65 struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {};
67 static void __cpuinit default_init(struct cpuinfo_x86 * c)
69 /* Not much we can do here... */
70 /* Check if at least it has cpuid */
71 if (c->cpuid_level == -1) {
72 /* No cpuid. It must be an ancient CPU */
74 strcpy(c->x86_model_id, "486");
76 strcpy(c->x86_model_id, "386");
80 static struct cpu_dev __cpuinitdata default_cpu = {
81 .c_init = default_init,
82 .c_vendor = "Unknown",
84 static struct cpu_dev * this_cpu __cpuinitdata = &default_cpu;
86 static int __init cachesize_setup(char *str)
88 get_option (&str, &cachesize_override);
91 __setup("cachesize=", cachesize_setup);
93 int __cpuinit get_model_name(struct cpuinfo_x86 *c)
98 if (cpuid_eax(0x80000000) < 0x80000004)
101 v = (unsigned int *) c->x86_model_id;
102 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
103 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
104 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
105 c->x86_model_id[48] = 0;
107 /* Intel chips right-justify this string for some dumb reason;
108 undo that brain damage */
109 p = q = &c->x86_model_id[0];
115 while ( q <= &c->x86_model_id[48] )
116 *q++ = '\0'; /* Zero-pad the rest */
123 void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
125 unsigned int n, dummy, ecx, edx, l2size;
127 n = cpuid_eax(0x80000000);
129 if (n >= 0x80000005) {
130 cpuid(0x80000005, &dummy, &dummy, &ecx, &edx);
131 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
132 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
133 c->x86_cache_size=(ecx>>24)+(edx>>24);
136 if (n < 0x80000006) /* Some chips just has a large L1. */
139 ecx = cpuid_ecx(0x80000006);
142 /* do processor-specific cache resizing */
143 if (this_cpu->c_size_cache)
144 l2size = this_cpu->c_size_cache(c,l2size);
146 /* Allow user to override all this if necessary. */
147 if (cachesize_override != -1)
148 l2size = cachesize_override;
151 return; /* Again, no L2 cache is possible */
153 c->x86_cache_size = l2size;
155 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
159 /* Naming convention should be: <Name> [(<Codename>)] */
160 /* This table only is used unless init_<vendor>() below doesn't set it; */
161 /* in particular, if CPUID levels 0x80000002..4 are supported, this isn't used */
163 /* Look up CPU names by table lookup. */
164 static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c)
166 struct cpu_model_info *info;
168 if ( c->x86_model >= 16 )
169 return NULL; /* Range check */
174 info = this_cpu->c_models;
176 while (info && info->family) {
177 if (info->family == c->x86)
178 return info->model_names[c->x86_model];
181 return NULL; /* Not found */
185 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c, int early)
187 char *v = c->x86_vendor_id;
191 for (i = 0; i < X86_VENDOR_NUM; i++) {
193 if (!strcmp(v,cpu_devs[i]->c_ident[0]) ||
194 (cpu_devs[i]->c_ident[1] &&
195 !strcmp(v,cpu_devs[i]->c_ident[1]))) {
198 this_cpu = cpu_devs[i];
205 printk(KERN_ERR "CPU: Vendor unknown, using generic init.\n");
206 printk(KERN_ERR "CPU: Your system may be unstable.\n");
208 c->x86_vendor = X86_VENDOR_UNKNOWN;
209 this_cpu = &default_cpu;
213 static int __init x86_fxsr_setup(char * s)
215 setup_clear_cpu_cap(X86_FEATURE_FXSR);
216 setup_clear_cpu_cap(X86_FEATURE_XMM);
219 __setup("nofxsr", x86_fxsr_setup);
222 static int __init x86_sep_setup(char * s)
224 setup_clear_cpu_cap(X86_FEATURE_SEP);
227 __setup("nosep", x86_sep_setup);
230 /* Standard macro to see if a specific flag is changeable */
231 static inline int flag_is_changeable_p(u32 flag)
245 : "=&r" (f1), "=&r" (f2)
248 return ((f1^f2) & flag) != 0;
252 /* Probe for the CPUID instruction */
253 static int __cpuinit have_cpuid_p(void)
255 return flag_is_changeable_p(X86_EFLAGS_ID);
258 void __init cpu_detect(struct cpuinfo_x86 *c)
260 /* Get vendor name */
261 cpuid(0x00000000, &c->cpuid_level,
262 (int *)&c->x86_vendor_id[0],
263 (int *)&c->x86_vendor_id[8],
264 (int *)&c->x86_vendor_id[4]);
267 if (c->cpuid_level >= 0x00000001) {
268 u32 junk, tfms, cap0, misc;
269 cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
270 c->x86 = (tfms >> 8) & 15;
271 c->x86_model = (tfms >> 4) & 15;
273 c->x86 += (tfms >> 20) & 0xff;
275 c->x86_model += ((tfms >> 16) & 0xF) << 4;
276 c->x86_mask = tfms & 15;
278 c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8;
281 static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
286 memset(&c->x86_capability, 0, sizeof c->x86_capability);
287 if (have_cpuid_p()) {
288 /* Intel-defined flags: level 0x00000001 */
289 if (c->cpuid_level >= 0x00000001) {
290 u32 capability, excap;
291 cpuid(0x00000001, &tfms, &ebx, &excap, &capability);
292 c->x86_capability[0] = capability;
293 c->x86_capability[4] = excap;
296 /* AMD-defined flags: level 0x80000001 */
297 xlvl = cpuid_eax(0x80000000);
298 if ((xlvl & 0xffff0000) == 0x80000000) {
299 if (xlvl >= 0x80000001) {
300 c->x86_capability[1] = cpuid_edx(0x80000001);
301 c->x86_capability[6] = cpuid_ecx(0x80000001);
309 /* Do minimum CPU detection early.
310 Fields really needed: vendor, cpuid_level, family, model, mask, cache alignment.
311 The others are not touched to avoid unwanted side effects.
313 WARNING: this function is only called on the BP. Don't add code here
314 that is supposed to run on all CPUs. */
315 static void __init early_cpu_detect(void)
317 struct cpuinfo_x86 *c = &boot_cpu_data;
319 c->x86_cache_alignment = 32;
326 get_cpu_vendor(c, 1);
328 switch (c->x86_vendor) {
332 case X86_VENDOR_INTEL:
340 static void __cpuinit generic_identify(struct cpuinfo_x86 * c)
345 if (have_cpuid_p()) {
346 /* Get vendor name */
347 cpuid(0x00000000, &c->cpuid_level,
348 (int *)&c->x86_vendor_id[0],
349 (int *)&c->x86_vendor_id[8],
350 (int *)&c->x86_vendor_id[4]);
352 get_cpu_vendor(c, 0);
353 /* Initialize the standard set of capabilities */
354 /* Note that the vendor-specific code below might override */
356 /* Intel-defined flags: level 0x00000001 */
357 if ( c->cpuid_level >= 0x00000001 ) {
358 u32 capability, excap;
359 cpuid(0x00000001, &tfms, &ebx, &excap, &capability);
360 c->x86_capability[0] = capability;
361 c->x86_capability[4] = excap;
362 c->x86 = (tfms >> 8) & 15;
363 c->x86_model = (tfms >> 4) & 15;
365 c->x86 += (tfms >> 20) & 0xff;
367 c->x86_model += ((tfms >> 16) & 0xF) << 4;
368 c->x86_mask = tfms & 15;
370 c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0);
372 c->apicid = (ebx >> 24) & 0xFF;
374 if (c->x86_capability[0] & (1<<19))
375 c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8;
377 /* Have CPUID level 0 only - unheard of */
381 /* AMD-defined flags: level 0x80000001 */
382 xlvl = cpuid_eax(0x80000000);
383 if ( (xlvl & 0xffff0000) == 0x80000000 ) {
384 if ( xlvl >= 0x80000001 ) {
385 c->x86_capability[1] = cpuid_edx(0x80000001);
386 c->x86_capability[6] = cpuid_ecx(0x80000001);
388 if ( xlvl >= 0x80000004 )
389 get_model_name(c); /* Default name */
392 init_scattered_cpuid_features(c);
396 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
400 static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
402 if (cpu_has(c, X86_FEATURE_PN) && disable_x86_serial_nr ) {
403 /* Disable processor serial number */
405 rdmsr(MSR_IA32_BBL_CR_CTL,lo,hi);
407 wrmsr(MSR_IA32_BBL_CR_CTL,lo,hi);
408 printk(KERN_NOTICE "CPU serial number disabled.\n");
409 clear_bit(X86_FEATURE_PN, c->x86_capability);
411 /* Disabling the serial number may affect the cpuid level */
412 c->cpuid_level = cpuid_eax(0);
416 static int __init x86_serial_nr_setup(char *s)
418 disable_x86_serial_nr = 0;
421 __setup("serialnumber", x86_serial_nr_setup);
426 * This does the hard work of actually picking apart the CPU stuff...
428 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
432 c->loops_per_jiffy = loops_per_jiffy;
433 c->x86_cache_size = -1;
434 c->x86_vendor = X86_VENDOR_UNKNOWN;
435 c->cpuid_level = -1; /* CPUID not detected */
436 c->x86_model = c->x86_mask = 0; /* So far unknown... */
437 c->x86_vendor_id[0] = '\0'; /* Unset */
438 c->x86_model_id[0] = '\0'; /* Unset */
439 c->x86_max_cores = 1;
440 c->x86_clflush_size = 32;
441 memset(&c->x86_capability, 0, sizeof c->x86_capability);
443 if (!have_cpuid_p()) {
444 /* First of all, decide if this is a 486 or higher */
445 /* It's a 486 if we can modify the AC flag */
446 if ( flag_is_changeable_p(X86_EFLAGS_AC) )
454 if (this_cpu->c_identify)
455 this_cpu->c_identify(c);
458 * Vendor-specific initialization. In this section we
459 * canonicalize the feature flags, meaning if there are
460 * features a certain CPU supports which CPUID doesn't
461 * tell us, CPUID claiming incorrect flags, or other bugs,
462 * we handle them here.
464 * At the end of this section, c->x86_capability better
465 * indicate the features this CPU genuinely supports!
467 if (this_cpu->c_init)
470 /* Disable the PN if appropriate */
471 squash_the_stupid_serial_number(c);
474 * The vendor-specific functions might have changed features. Now
475 * we do "generic changes."
478 /* If the model name is still unset, do table lookup. */
479 if ( !c->x86_model_id[0] ) {
481 p = table_lookup_model(c);
483 strcpy(c->x86_model_id, p);
486 sprintf(c->x86_model_id, "%02x/%02x",
487 c->x86, c->x86_model);
491 * On SMP, boot_cpu_data holds the common feature set between
492 * all CPUs; so make sure that we indicate which features are
493 * common between the CPUs. The first time this routine gets
494 * executed, c == &boot_cpu_data.
496 if ( c != &boot_cpu_data ) {
497 /* AND the already accumulated flags with these */
498 for ( i = 0 ; i < NCAPINTS ; i++ )
499 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
502 /* Clear all flags overriden by options */
503 for (i = 0; i < NCAPINTS; i++)
504 c->x86_capability[i] ^= cleared_cpu_caps[i];
506 /* Init Machine Check Exception if available. */
509 select_idle_routine(c);
512 void __init identify_boot_cpu(void)
514 identify_cpu(&boot_cpu_data);
519 void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
521 BUG_ON(c == &boot_cpu_data);
528 void __cpuinit detect_ht(struct cpuinfo_x86 *c)
530 u32 eax, ebx, ecx, edx;
531 int index_msb, core_bits;
533 cpuid(1, &eax, &ebx, &ecx, &edx);
535 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
538 smp_num_siblings = (ebx & 0xff0000) >> 16;
540 if (smp_num_siblings == 1) {
541 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
542 } else if (smp_num_siblings > 1 ) {
544 if (smp_num_siblings > NR_CPUS) {
545 printk(KERN_WARNING "CPU: Unsupported number of the "
546 "siblings %d", smp_num_siblings);
547 smp_num_siblings = 1;
551 index_msb = get_count_order(smp_num_siblings);
552 c->phys_proc_id = phys_pkg_id((ebx >> 24) & 0xFF, index_msb);
554 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
557 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
559 index_msb = get_count_order(smp_num_siblings) ;
561 core_bits = get_count_order(c->x86_max_cores);
563 c->cpu_core_id = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) &
564 ((1 << core_bits) - 1);
566 if (c->x86_max_cores > 1)
567 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
573 static __init int setup_noclflush(char *arg)
575 setup_clear_cpu_cap(X86_FEATURE_CLFLSH);
578 __setup("noclflush", setup_noclflush);
580 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
584 if (c->x86_vendor < X86_VENDOR_NUM)
585 vendor = this_cpu->c_vendor;
586 else if (c->cpuid_level >= 0)
587 vendor = c->x86_vendor_id;
589 if (vendor && strncmp(c->x86_model_id, vendor, strlen(vendor)))
590 printk("%s ", vendor);
592 if (!c->x86_model_id[0])
593 printk("%d86", c->x86);
595 printk("%s", c->x86_model_id);
597 if (c->x86_mask || c->cpuid_level >= 0)
598 printk(" stepping %02x\n", c->x86_mask);
603 static __init int setup_disablecpuid(char *arg)
606 if (get_option(&arg, &bit) && bit < NCAPINTS*32)
607 setup_clear_cpu_cap(bit);
612 __setup("clearcpuid=", setup_disablecpuid);
614 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
617 * We're emulating future behavior.
618 * In the future, the cpu-specific init functions will be called implicitly
619 * via the magic of initcalls.
620 * They will insert themselves into the cpu_devs structure.
621 * Then, when cpu_init() is called, we can just iterate over that array.
624 extern int intel_cpu_init(void);
625 extern int cyrix_init_cpu(void);
626 extern int nsc_init_cpu(void);
627 extern int amd_init_cpu(void);
628 extern int centaur_init_cpu(void);
629 extern int transmeta_init_cpu(void);
630 extern int nexgen_init_cpu(void);
631 extern int umc_init_cpu(void);
633 void __init early_cpu_init(void)
640 transmeta_init_cpu();
646 /* Make sure %fs is initialized properly in idle threads */
647 struct pt_regs * __devinit idle_regs(struct pt_regs *regs)
649 memset(regs, 0, sizeof(struct pt_regs));
650 regs->fs = __KERNEL_PERCPU;
654 /* Current gdt points %fs at the "master" per-cpu area: after this,
655 * it's on the real one. */
656 void switch_to_new_gdt(void)
658 struct desc_ptr gdt_descr;
660 gdt_descr.address = (long)get_cpu_gdt_table(smp_processor_id());
661 gdt_descr.size = GDT_SIZE - 1;
662 load_gdt(&gdt_descr);
663 asm("mov %0, %%fs" : : "r" (__KERNEL_PERCPU) : "memory");
667 * cpu_init() initializes state that is per-CPU. Some data is already
668 * initialized (naturally) in the bootstrap process, such as the GDT
669 * and IDT. We reload them nevertheless, this function acts as a
670 * 'CPU state barrier', nothing should get across.
672 void __cpuinit cpu_init(void)
674 int cpu = smp_processor_id();
675 struct task_struct *curr = current;
676 struct tss_struct * t = &per_cpu(init_tss, cpu);
677 struct thread_struct *thread = &curr->thread;
679 if (cpu_test_and_set(cpu, cpu_initialized)) {
680 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu);
681 for (;;) local_irq_enable();
684 printk(KERN_INFO "Initializing CPU#%d\n", cpu);
686 if (cpu_has_vme || cpu_has_tsc || cpu_has_de)
687 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
689 load_idt(&idt_descr);
693 * Set up and load the per-CPU TSS and LDT
695 atomic_inc(&init_mm.mm_count);
696 curr->active_mm = &init_mm;
699 enter_lazy_tlb(&init_mm, curr);
704 load_LDT(&init_mm.context);
706 #ifdef CONFIG_DOUBLEFAULT
707 /* Set up doublefault TSS pointer in the GDT */
708 __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
712 asm volatile ("mov %0, %%gs" : : "r" (0));
714 /* Clear all 6 debug registers: */
723 * Force FPU initialization:
725 current_thread_info()->status = 0;
727 mxcsr_feature_mask_init();
730 #ifdef CONFIG_HOTPLUG_CPU
731 void __cpuinit cpu_uninit(void)
733 int cpu = raw_smp_processor_id();
734 cpu_clear(cpu, cpu_initialized);
737 per_cpu(cpu_tlbstate, cpu).state = 0;
738 per_cpu(cpu_tlbstate, cpu).active_mm = &init_mm;