2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
32 #include <asm/cmpxchg.h>
36 * When setting this variable to true it enables Two-Dimensional-Paging
37 * where the hardware walks 2 page tables:
38 * 1. the guest-virtual to guest-physical
39 * 2. while doing 1. it walks guest-physical to host-physical
40 * If the hardware supports that we don't need to do shadow paging.
42 static bool tdp_enabled = false;
49 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
51 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
56 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
57 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
61 #define pgprintk(x...) do { } while (0)
62 #define rmap_printk(x...) do { } while (0)
66 #if defined(MMU_DEBUG) || defined(AUDIT)
71 #define ASSERT(x) do { } while (0)
75 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
76 __FILE__, __LINE__, #x); \
80 #define PT64_PT_BITS 9
81 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
82 #define PT32_PT_BITS 10
83 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
85 #define PT_WRITABLE_SHIFT 1
87 #define PT_PRESENT_MASK (1ULL << 0)
88 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
89 #define PT_USER_MASK (1ULL << 2)
90 #define PT_PWT_MASK (1ULL << 3)
91 #define PT_PCD_MASK (1ULL << 4)
92 #define PT_ACCESSED_MASK (1ULL << 5)
93 #define PT_DIRTY_MASK (1ULL << 6)
94 #define PT_PAGE_SIZE_MASK (1ULL << 7)
95 #define PT_PAT_MASK (1ULL << 7)
96 #define PT_GLOBAL_MASK (1ULL << 8)
97 #define PT64_NX_SHIFT 63
98 #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
100 #define PT_PAT_SHIFT 7
101 #define PT_DIR_PAT_SHIFT 12
102 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
104 #define PT32_DIR_PSE36_SIZE 4
105 #define PT32_DIR_PSE36_SHIFT 13
106 #define PT32_DIR_PSE36_MASK \
107 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
110 #define PT_FIRST_AVAIL_BITS_SHIFT 9
111 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
113 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
115 #define PT64_LEVEL_BITS 9
117 #define PT64_LEVEL_SHIFT(level) \
118 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
120 #define PT64_LEVEL_MASK(level) \
121 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
123 #define PT64_INDEX(address, level)\
124 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
127 #define PT32_LEVEL_BITS 10
129 #define PT32_LEVEL_SHIFT(level) \
130 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
132 #define PT32_LEVEL_MASK(level) \
133 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
135 #define PT32_INDEX(address, level)\
136 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
139 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
140 #define PT64_DIR_BASE_ADDR_MASK \
141 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
143 #define PT32_BASE_ADDR_MASK PAGE_MASK
144 #define PT32_DIR_BASE_ADDR_MASK \
145 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
147 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
150 #define PFERR_PRESENT_MASK (1U << 0)
151 #define PFERR_WRITE_MASK (1U << 1)
152 #define PFERR_USER_MASK (1U << 2)
153 #define PFERR_FETCH_MASK (1U << 4)
155 #define PT64_ROOT_LEVEL 4
156 #define PT32_ROOT_LEVEL 2
157 #define PT32E_ROOT_LEVEL 3
159 #define PT_DIRECTORY_LEVEL 2
160 #define PT_PAGE_TABLE_LEVEL 1
164 #define ACC_EXEC_MASK 1
165 #define ACC_WRITE_MASK PT_WRITABLE_MASK
166 #define ACC_USER_MASK PT_USER_MASK
167 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
169 struct kvm_rmap_desc {
170 u64 *shadow_ptes[RMAP_EXT];
171 struct kvm_rmap_desc *more;
174 static struct kmem_cache *pte_chain_cache;
175 static struct kmem_cache *rmap_desc_cache;
176 static struct kmem_cache *mmu_page_header_cache;
178 static u64 __read_mostly shadow_trap_nonpresent_pte;
179 static u64 __read_mostly shadow_notrap_nonpresent_pte;
181 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
183 shadow_trap_nonpresent_pte = trap_pte;
184 shadow_notrap_nonpresent_pte = notrap_pte;
186 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
188 static int is_write_protection(struct kvm_vcpu *vcpu)
190 return vcpu->arch.cr0 & X86_CR0_WP;
193 static int is_cpuid_PSE36(void)
198 static int is_nx(struct kvm_vcpu *vcpu)
200 return vcpu->arch.shadow_efer & EFER_NX;
203 static int is_present_pte(unsigned long pte)
205 return pte & PT_PRESENT_MASK;
208 static int is_shadow_present_pte(u64 pte)
210 return pte != shadow_trap_nonpresent_pte
211 && pte != shadow_notrap_nonpresent_pte;
214 static int is_writeble_pte(unsigned long pte)
216 return pte & PT_WRITABLE_MASK;
219 static int is_dirty_pte(unsigned long pte)
221 return pte & PT_DIRTY_MASK;
224 static int is_rmap_pte(u64 pte)
226 return is_shadow_present_pte(pte);
229 static gfn_t pse36_gfn_delta(u32 gpte)
231 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
233 return (gpte & PT32_DIR_PSE36_MASK) << shift;
236 static void set_shadow_pte(u64 *sptep, u64 spte)
239 set_64bit((unsigned long *)sptep, spte);
241 set_64bit((unsigned long long *)sptep, spte);
245 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
246 struct kmem_cache *base_cache, int min)
250 if (cache->nobjs >= min)
252 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
253 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
256 cache->objects[cache->nobjs++] = obj;
261 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
264 kfree(mc->objects[--mc->nobjs]);
267 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
272 if (cache->nobjs >= min)
274 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
275 page = alloc_page(GFP_KERNEL);
278 set_page_private(page, 0);
279 cache->objects[cache->nobjs++] = page_address(page);
284 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
287 free_page((unsigned long)mc->objects[--mc->nobjs]);
290 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
294 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
298 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
302 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
305 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
306 mmu_page_header_cache, 4);
311 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
313 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
314 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
315 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
316 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
319 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
325 p = mc->objects[--mc->nobjs];
330 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
332 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
333 sizeof(struct kvm_pte_chain));
336 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
341 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
343 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
344 sizeof(struct kvm_rmap_desc));
347 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
353 * Take gfn and return the reverse mapping to it.
354 * Note: gfn must be unaliased before this function get called
357 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
359 struct kvm_memory_slot *slot;
361 slot = gfn_to_memslot(kvm, gfn);
362 return &slot->rmap[gfn - slot->base_gfn];
366 * Reverse mapping data structures:
368 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
369 * that points to page_address(page).
371 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
372 * containing more mappings.
374 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
376 struct kvm_mmu_page *sp;
377 struct kvm_rmap_desc *desc;
378 unsigned long *rmapp;
381 if (!is_rmap_pte(*spte))
383 gfn = unalias_gfn(vcpu->kvm, gfn);
384 sp = page_header(__pa(spte));
385 sp->gfns[spte - sp->spt] = gfn;
386 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
388 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
389 *rmapp = (unsigned long)spte;
390 } else if (!(*rmapp & 1)) {
391 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
392 desc = mmu_alloc_rmap_desc(vcpu);
393 desc->shadow_ptes[0] = (u64 *)*rmapp;
394 desc->shadow_ptes[1] = spte;
395 *rmapp = (unsigned long)desc | 1;
397 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
398 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
399 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
401 if (desc->shadow_ptes[RMAP_EXT-1]) {
402 desc->more = mmu_alloc_rmap_desc(vcpu);
405 for (i = 0; desc->shadow_ptes[i]; ++i)
407 desc->shadow_ptes[i] = spte;
411 static void rmap_desc_remove_entry(unsigned long *rmapp,
412 struct kvm_rmap_desc *desc,
414 struct kvm_rmap_desc *prev_desc)
418 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
420 desc->shadow_ptes[i] = desc->shadow_ptes[j];
421 desc->shadow_ptes[j] = NULL;
424 if (!prev_desc && !desc->more)
425 *rmapp = (unsigned long)desc->shadow_ptes[0];
428 prev_desc->more = desc->more;
430 *rmapp = (unsigned long)desc->more | 1;
431 mmu_free_rmap_desc(desc);
434 static void rmap_remove(struct kvm *kvm, u64 *spte)
436 struct kvm_rmap_desc *desc;
437 struct kvm_rmap_desc *prev_desc;
438 struct kvm_mmu_page *sp;
440 unsigned long *rmapp;
443 if (!is_rmap_pte(*spte))
445 sp = page_header(__pa(spte));
446 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
447 mark_page_accessed(page);
448 if (is_writeble_pte(*spte))
449 kvm_release_page_dirty(page);
451 kvm_release_page_clean(page);
452 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
454 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
456 } else if (!(*rmapp & 1)) {
457 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
458 if ((u64 *)*rmapp != spte) {
459 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
465 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
466 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
469 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
470 if (desc->shadow_ptes[i] == spte) {
471 rmap_desc_remove_entry(rmapp,
483 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
485 struct kvm_rmap_desc *desc;
486 struct kvm_rmap_desc *prev_desc;
492 else if (!(*rmapp & 1)) {
494 return (u64 *)*rmapp;
497 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
501 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
502 if (prev_spte == spte)
503 return desc->shadow_ptes[i];
504 prev_spte = desc->shadow_ptes[i];
511 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
513 unsigned long *rmapp;
515 int write_protected = 0;
517 gfn = unalias_gfn(kvm, gfn);
518 rmapp = gfn_to_rmap(kvm, gfn);
520 spte = rmap_next(kvm, rmapp, NULL);
523 BUG_ON(!(*spte & PT_PRESENT_MASK));
524 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
525 if (is_writeble_pte(*spte)) {
526 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
529 spte = rmap_next(kvm, rmapp, spte);
532 kvm_flush_remote_tlbs(kvm);
536 static int is_empty_shadow_page(u64 *spt)
541 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
542 if (*pos != shadow_trap_nonpresent_pte) {
543 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
551 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
553 ASSERT(is_empty_shadow_page(sp->spt));
555 __free_page(virt_to_page(sp->spt));
556 __free_page(virt_to_page(sp->gfns));
558 ++kvm->arch.n_free_mmu_pages;
561 static unsigned kvm_page_table_hashfn(gfn_t gfn)
563 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
566 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
569 struct kvm_mmu_page *sp;
571 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
572 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
573 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
574 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
575 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
576 ASSERT(is_empty_shadow_page(sp->spt));
579 sp->parent_pte = parent_pte;
580 --vcpu->kvm->arch.n_free_mmu_pages;
584 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
585 struct kvm_mmu_page *sp, u64 *parent_pte)
587 struct kvm_pte_chain *pte_chain;
588 struct hlist_node *node;
593 if (!sp->multimapped) {
594 u64 *old = sp->parent_pte;
597 sp->parent_pte = parent_pte;
601 pte_chain = mmu_alloc_pte_chain(vcpu);
602 INIT_HLIST_HEAD(&sp->parent_ptes);
603 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
604 pte_chain->parent_ptes[0] = old;
606 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
607 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
609 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
610 if (!pte_chain->parent_ptes[i]) {
611 pte_chain->parent_ptes[i] = parent_pte;
615 pte_chain = mmu_alloc_pte_chain(vcpu);
617 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
618 pte_chain->parent_ptes[0] = parent_pte;
621 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
624 struct kvm_pte_chain *pte_chain;
625 struct hlist_node *node;
628 if (!sp->multimapped) {
629 BUG_ON(sp->parent_pte != parent_pte);
630 sp->parent_pte = NULL;
633 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
634 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
635 if (!pte_chain->parent_ptes[i])
637 if (pte_chain->parent_ptes[i] != parent_pte)
639 while (i + 1 < NR_PTE_CHAIN_ENTRIES
640 && pte_chain->parent_ptes[i + 1]) {
641 pte_chain->parent_ptes[i]
642 = pte_chain->parent_ptes[i + 1];
645 pte_chain->parent_ptes[i] = NULL;
647 hlist_del(&pte_chain->link);
648 mmu_free_pte_chain(pte_chain);
649 if (hlist_empty(&sp->parent_ptes)) {
651 sp->parent_pte = NULL;
659 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
662 struct hlist_head *bucket;
663 struct kvm_mmu_page *sp;
664 struct hlist_node *node;
666 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
667 index = kvm_page_table_hashfn(gfn);
668 bucket = &kvm->arch.mmu_page_hash[index];
669 hlist_for_each_entry(sp, node, bucket, hash_link)
670 if (sp->gfn == gfn && !sp->role.metaphysical) {
671 pgprintk("%s: found role %x\n",
672 __FUNCTION__, sp->role.word);
678 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
686 union kvm_mmu_page_role role;
689 struct hlist_head *bucket;
690 struct kvm_mmu_page *sp;
691 struct hlist_node *node;
694 role.glevels = vcpu->arch.mmu.root_level;
696 role.metaphysical = metaphysical;
697 role.access = access;
698 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
699 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
700 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
701 role.quadrant = quadrant;
703 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
705 index = kvm_page_table_hashfn(gfn);
706 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
707 hlist_for_each_entry(sp, node, bucket, hash_link)
708 if (sp->gfn == gfn && sp->role.word == role.word) {
709 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
710 pgprintk("%s: found\n", __FUNCTION__);
713 ++vcpu->kvm->stat.mmu_cache_miss;
714 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
717 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
720 hlist_add_head(&sp->hash_link, bucket);
721 vcpu->arch.mmu.prefetch_page(vcpu, sp);
723 rmap_write_protect(vcpu->kvm, gfn);
727 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
728 struct kvm_mmu_page *sp)
736 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
737 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
738 if (is_shadow_present_pte(pt[i]))
739 rmap_remove(kvm, &pt[i]);
740 pt[i] = shadow_trap_nonpresent_pte;
742 kvm_flush_remote_tlbs(kvm);
746 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
749 pt[i] = shadow_trap_nonpresent_pte;
750 if (!is_shadow_present_pte(ent))
752 ent &= PT64_BASE_ADDR_MASK;
753 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
755 kvm_flush_remote_tlbs(kvm);
758 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
760 mmu_page_remove_parent_pte(sp, parent_pte);
763 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
767 for (i = 0; i < KVM_MAX_VCPUS; ++i)
769 kvm->vcpus[i]->arch.last_pte_updated = NULL;
772 static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
776 ++kvm->stat.mmu_shadow_zapped;
777 while (sp->multimapped || sp->parent_pte) {
778 if (!sp->multimapped)
779 parent_pte = sp->parent_pte;
781 struct kvm_pte_chain *chain;
783 chain = container_of(sp->parent_ptes.first,
784 struct kvm_pte_chain, link);
785 parent_pte = chain->parent_ptes[0];
788 kvm_mmu_put_page(sp, parent_pte);
789 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
791 kvm_mmu_page_unlink_children(kvm, sp);
792 if (!sp->root_count) {
793 hlist_del(&sp->hash_link);
794 kvm_mmu_free_page(kvm, sp);
796 list_move(&sp->link, &kvm->arch.active_mmu_pages);
797 kvm_mmu_reset_last_pte_updated(kvm);
801 * Changing the number of mmu pages allocated to the vm
802 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
804 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
807 * If we set the number of mmu pages to be smaller be than the
808 * number of actived pages , we must to free some mmu pages before we
812 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
814 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
815 - kvm->arch.n_free_mmu_pages;
817 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
818 struct kvm_mmu_page *page;
820 page = container_of(kvm->arch.active_mmu_pages.prev,
821 struct kvm_mmu_page, link);
822 kvm_mmu_zap_page(kvm, page);
825 kvm->arch.n_free_mmu_pages = 0;
828 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
829 - kvm->arch.n_alloc_mmu_pages;
831 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
834 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
837 struct hlist_head *bucket;
838 struct kvm_mmu_page *sp;
839 struct hlist_node *node, *n;
842 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
844 index = kvm_page_table_hashfn(gfn);
845 bucket = &kvm->arch.mmu_page_hash[index];
846 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
847 if (sp->gfn == gfn && !sp->role.metaphysical) {
848 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
850 kvm_mmu_zap_page(kvm, sp);
856 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
858 struct kvm_mmu_page *sp;
860 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
861 pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
862 kvm_mmu_zap_page(kvm, sp);
866 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
868 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
869 struct kvm_mmu_page *sp = page_header(__pa(pte));
871 __set_bit(slot, &sp->slot_bitmap);
874 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
878 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
880 if (gpa == UNMAPPED_GVA)
883 down_read(¤t->mm->mmap_sem);
884 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
885 up_read(¤t->mm->mmap_sem);
890 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
891 unsigned pt_access, unsigned pte_access,
892 int user_fault, int write_fault, int dirty,
893 int *ptwrite, gfn_t gfn, struct page *page)
897 int was_writeble = is_writeble_pte(*shadow_pte);
898 hfn_t host_pfn = (*shadow_pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
900 pgprintk("%s: spte %llx access %x write_fault %d"
901 " user_fault %d gfn %lx\n",
902 __FUNCTION__, *shadow_pte, pt_access,
903 write_fault, user_fault, gfn);
905 if (is_rmap_pte(*shadow_pte)) {
906 if (host_pfn != page_to_pfn(page)) {
907 pgprintk("hfn old %lx new %lx\n",
908 host_pfn, page_to_pfn(page));
909 rmap_remove(vcpu->kvm, shadow_pte);
916 * We don't set the accessed bit, since we sometimes want to see
917 * whether the guest actually used the pte (in order to detect
920 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
922 pte_access &= ~ACC_WRITE_MASK;
923 if (!(pte_access & ACC_EXEC_MASK))
924 spte |= PT64_NX_MASK;
926 spte |= PT_PRESENT_MASK;
927 if (pte_access & ACC_USER_MASK)
928 spte |= PT_USER_MASK;
930 spte |= page_to_phys(page);
932 if ((pte_access & ACC_WRITE_MASK)
933 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
934 struct kvm_mmu_page *shadow;
936 spte |= PT_WRITABLE_MASK;
938 mmu_unshadow(vcpu->kvm, gfn);
942 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
944 pgprintk("%s: found shadow page for %lx, marking ro\n",
946 pte_access &= ~ACC_WRITE_MASK;
947 if (is_writeble_pte(spte)) {
948 spte &= ~PT_WRITABLE_MASK;
949 kvm_x86_ops->tlb_flush(vcpu);
958 if (pte_access & ACC_WRITE_MASK)
959 mark_page_dirty(vcpu->kvm, gfn);
961 pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
962 set_shadow_pte(shadow_pte, spte);
963 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
965 rmap_add(vcpu, shadow_pte, gfn);
966 if (!is_rmap_pte(*shadow_pte))
967 kvm_release_page_clean(page);
970 kvm_release_page_dirty(page);
972 kvm_release_page_clean(page);
974 if (!ptwrite || !*ptwrite)
975 vcpu->arch.last_pte_updated = shadow_pte;
978 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
982 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
983 gfn_t gfn, struct page *page, int level)
985 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
989 u32 index = PT64_INDEX(v, level);
992 ASSERT(VALID_PAGE(table_addr));
993 table = __va(table_addr);
996 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
997 0, write, 1, &pt_write, gfn, page);
1001 if (table[index] == shadow_trap_nonpresent_pte) {
1002 struct kvm_mmu_page *new_table;
1005 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1007 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1009 1, ACC_ALL, &table[index]);
1011 pgprintk("nonpaging_map: ENOMEM\n");
1012 kvm_release_page_clean(page);
1016 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
1017 | PT_WRITABLE_MASK | PT_USER_MASK;
1019 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1023 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1029 down_read(&vcpu->kvm->slots_lock);
1031 down_read(¤t->mm->mmap_sem);
1032 page = gfn_to_page(vcpu->kvm, gfn);
1033 up_read(¤t->mm->mmap_sem);
1036 if (is_error_page(page)) {
1037 kvm_release_page_clean(page);
1038 up_read(&vcpu->kvm->slots_lock);
1042 spin_lock(&vcpu->kvm->mmu_lock);
1043 kvm_mmu_free_some_pages(vcpu);
1044 r = __direct_map(vcpu, v, write, gfn, page, PT32E_ROOT_LEVEL);
1045 spin_unlock(&vcpu->kvm->mmu_lock);
1047 up_read(&vcpu->kvm->slots_lock);
1053 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1054 struct kvm_mmu_page *sp)
1058 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1059 sp->spt[i] = shadow_trap_nonpresent_pte;
1062 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1065 struct kvm_mmu_page *sp;
1067 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1069 spin_lock(&vcpu->kvm->mmu_lock);
1070 #ifdef CONFIG_X86_64
1071 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1072 hpa_t root = vcpu->arch.mmu.root_hpa;
1074 sp = page_header(root);
1076 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1077 spin_unlock(&vcpu->kvm->mmu_lock);
1081 for (i = 0; i < 4; ++i) {
1082 hpa_t root = vcpu->arch.mmu.pae_root[i];
1085 root &= PT64_BASE_ADDR_MASK;
1086 sp = page_header(root);
1089 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1091 spin_unlock(&vcpu->kvm->mmu_lock);
1092 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1095 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1099 struct kvm_mmu_page *sp;
1101 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1103 #ifdef CONFIG_X86_64
1104 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1105 hpa_t root = vcpu->arch.mmu.root_hpa;
1107 ASSERT(!VALID_PAGE(root));
1108 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1109 PT64_ROOT_LEVEL, 0, ACC_ALL, NULL);
1110 root = __pa(sp->spt);
1112 vcpu->arch.mmu.root_hpa = root;
1116 for (i = 0; i < 4; ++i) {
1117 hpa_t root = vcpu->arch.mmu.pae_root[i];
1119 ASSERT(!VALID_PAGE(root));
1120 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1121 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1122 vcpu->arch.mmu.pae_root[i] = 0;
1125 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1126 } else if (vcpu->arch.mmu.root_level == 0)
1128 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1129 PT32_ROOT_LEVEL, !is_paging(vcpu),
1131 root = __pa(sp->spt);
1133 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
1135 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
1138 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1143 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
1149 pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code);
1150 r = mmu_topup_memory_caches(vcpu);
1155 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1157 gfn = gva >> PAGE_SHIFT;
1159 return nonpaging_map(vcpu, gva & PAGE_MASK,
1160 error_code & PFERR_WRITE_MASK, gfn);
1163 static void nonpaging_free(struct kvm_vcpu *vcpu)
1165 mmu_free_roots(vcpu);
1168 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1170 struct kvm_mmu *context = &vcpu->arch.mmu;
1172 context->new_cr3 = nonpaging_new_cr3;
1173 context->page_fault = nonpaging_page_fault;
1174 context->gva_to_gpa = nonpaging_gva_to_gpa;
1175 context->free = nonpaging_free;
1176 context->prefetch_page = nonpaging_prefetch_page;
1177 context->root_level = 0;
1178 context->shadow_root_level = PT32E_ROOT_LEVEL;
1179 context->root_hpa = INVALID_PAGE;
1183 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
1185 ++vcpu->stat.tlb_flush;
1186 kvm_x86_ops->tlb_flush(vcpu);
1189 static void paging_new_cr3(struct kvm_vcpu *vcpu)
1191 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->arch.cr3);
1192 mmu_free_roots(vcpu);
1195 static void inject_page_fault(struct kvm_vcpu *vcpu,
1199 kvm_inject_page_fault(vcpu, addr, err_code);
1202 static void paging_free(struct kvm_vcpu *vcpu)
1204 nonpaging_free(vcpu);
1208 #include "paging_tmpl.h"
1212 #include "paging_tmpl.h"
1215 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1217 struct kvm_mmu *context = &vcpu->arch.mmu;
1219 ASSERT(is_pae(vcpu));
1220 context->new_cr3 = paging_new_cr3;
1221 context->page_fault = paging64_page_fault;
1222 context->gva_to_gpa = paging64_gva_to_gpa;
1223 context->prefetch_page = paging64_prefetch_page;
1224 context->free = paging_free;
1225 context->root_level = level;
1226 context->shadow_root_level = level;
1227 context->root_hpa = INVALID_PAGE;
1231 static int paging64_init_context(struct kvm_vcpu *vcpu)
1233 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1236 static int paging32_init_context(struct kvm_vcpu *vcpu)
1238 struct kvm_mmu *context = &vcpu->arch.mmu;
1240 context->new_cr3 = paging_new_cr3;
1241 context->page_fault = paging32_page_fault;
1242 context->gva_to_gpa = paging32_gva_to_gpa;
1243 context->free = paging_free;
1244 context->prefetch_page = paging32_prefetch_page;
1245 context->root_level = PT32_ROOT_LEVEL;
1246 context->shadow_root_level = PT32E_ROOT_LEVEL;
1247 context->root_hpa = INVALID_PAGE;
1251 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1253 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1256 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1259 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1261 if (!is_paging(vcpu))
1262 return nonpaging_init_context(vcpu);
1263 else if (is_long_mode(vcpu))
1264 return paging64_init_context(vcpu);
1265 else if (is_pae(vcpu))
1266 return paging32E_init_context(vcpu);
1268 return paging32_init_context(vcpu);
1271 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1274 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1275 vcpu->arch.mmu.free(vcpu);
1276 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1280 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1282 destroy_kvm_mmu(vcpu);
1283 return init_kvm_mmu(vcpu);
1285 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
1287 int kvm_mmu_load(struct kvm_vcpu *vcpu)
1291 r = mmu_topup_memory_caches(vcpu);
1294 spin_lock(&vcpu->kvm->mmu_lock);
1295 kvm_mmu_free_some_pages(vcpu);
1296 mmu_alloc_roots(vcpu);
1297 spin_unlock(&vcpu->kvm->mmu_lock);
1298 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
1299 kvm_mmu_flush_tlb(vcpu);
1303 EXPORT_SYMBOL_GPL(kvm_mmu_load);
1305 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1307 mmu_free_roots(vcpu);
1310 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
1311 struct kvm_mmu_page *sp,
1315 struct kvm_mmu_page *child;
1318 if (is_shadow_present_pte(pte)) {
1319 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
1320 rmap_remove(vcpu->kvm, spte);
1322 child = page_header(pte & PT64_BASE_ADDR_MASK);
1323 mmu_page_remove_parent_pte(child, spte);
1326 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
1329 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1330 struct kvm_mmu_page *sp,
1334 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
1335 ++vcpu->kvm->stat.mmu_pde_zapped;
1339 ++vcpu->kvm->stat.mmu_pte_updated;
1340 if (sp->role.glevels == PT32_ROOT_LEVEL)
1341 paging32_update_pte(vcpu, sp, spte, new);
1343 paging64_update_pte(vcpu, sp, spte, new);
1346 static bool need_remote_flush(u64 old, u64 new)
1348 if (!is_shadow_present_pte(old))
1350 if (!is_shadow_present_pte(new))
1352 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1354 old ^= PT64_NX_MASK;
1355 new ^= PT64_NX_MASK;
1356 return (old & ~new & PT64_PERM_MASK) != 0;
1359 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1361 if (need_remote_flush(old, new))
1362 kvm_flush_remote_tlbs(vcpu->kvm);
1364 kvm_mmu_flush_tlb(vcpu);
1367 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1369 u64 *spte = vcpu->arch.last_pte_updated;
1371 return !!(spte && (*spte & PT_ACCESSED_MASK));
1374 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1375 const u8 *new, int bytes)
1382 if (bytes != 4 && bytes != 8)
1386 * Assume that the pte write on a page table of the same type
1387 * as the current vcpu paging mode. This is nearly always true
1388 * (might be false while changing modes). Note it is verified later
1392 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1393 if ((bytes == 4) && (gpa % 4 == 0)) {
1394 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1397 memcpy((void *)&gpte + (gpa % 8), new, 4);
1398 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1399 memcpy((void *)&gpte, new, 8);
1402 if ((bytes == 4) && (gpa % 4 == 0))
1403 memcpy((void *)&gpte, new, 4);
1405 if (!is_present_pte(gpte))
1407 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
1409 down_read(&vcpu->kvm->slots_lock);
1410 page = gfn_to_page(vcpu->kvm, gfn);
1411 up_read(&vcpu->kvm->slots_lock);
1413 if (is_error_page(page)) {
1414 kvm_release_page_clean(page);
1417 vcpu->arch.update_pte.gfn = gfn;
1418 vcpu->arch.update_pte.page = page;
1421 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1422 const u8 *new, int bytes)
1424 gfn_t gfn = gpa >> PAGE_SHIFT;
1425 struct kvm_mmu_page *sp;
1426 struct hlist_node *node, *n;
1427 struct hlist_head *bucket;
1431 unsigned offset = offset_in_page(gpa);
1433 unsigned page_offset;
1434 unsigned misaligned;
1441 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1442 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
1443 spin_lock(&vcpu->kvm->mmu_lock);
1444 kvm_mmu_free_some_pages(vcpu);
1445 ++vcpu->kvm->stat.mmu_pte_write;
1446 kvm_mmu_audit(vcpu, "pre pte write");
1447 if (gfn == vcpu->arch.last_pt_write_gfn
1448 && !last_updated_pte_accessed(vcpu)) {
1449 ++vcpu->arch.last_pt_write_count;
1450 if (vcpu->arch.last_pt_write_count >= 3)
1453 vcpu->arch.last_pt_write_gfn = gfn;
1454 vcpu->arch.last_pt_write_count = 1;
1455 vcpu->arch.last_pte_updated = NULL;
1457 index = kvm_page_table_hashfn(gfn);
1458 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1459 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1460 if (sp->gfn != gfn || sp->role.metaphysical)
1462 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1463 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1464 misaligned |= bytes < 4;
1465 if (misaligned || flooded) {
1467 * Misaligned accesses are too much trouble to fix
1468 * up; also, they usually indicate a page is not used
1471 * If we're seeing too many writes to a page,
1472 * it may no longer be a page table, or we may be
1473 * forking, in which case it is better to unmap the
1476 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1477 gpa, bytes, sp->role.word);
1478 kvm_mmu_zap_page(vcpu->kvm, sp);
1479 ++vcpu->kvm->stat.mmu_flooded;
1482 page_offset = offset;
1483 level = sp->role.level;
1485 if (sp->role.glevels == PT32_ROOT_LEVEL) {
1486 page_offset <<= 1; /* 32->64 */
1488 * A 32-bit pde maps 4MB while the shadow pdes map
1489 * only 2MB. So we need to double the offset again
1490 * and zap two pdes instead of one.
1492 if (level == PT32_ROOT_LEVEL) {
1493 page_offset &= ~7; /* kill rounding error */
1497 quadrant = page_offset >> PAGE_SHIFT;
1498 page_offset &= ~PAGE_MASK;
1499 if (quadrant != sp->role.quadrant)
1502 spte = &sp->spt[page_offset / sizeof(*spte)];
1503 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
1505 r = kvm_read_guest_atomic(vcpu->kvm,
1506 gpa & ~(u64)(pte_size - 1),
1508 new = (const void *)&gentry;
1514 mmu_pte_write_zap_pte(vcpu, sp, spte);
1516 mmu_pte_write_new_pte(vcpu, sp, spte, new);
1517 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
1521 kvm_mmu_audit(vcpu, "post pte write");
1522 spin_unlock(&vcpu->kvm->mmu_lock);
1523 if (vcpu->arch.update_pte.page) {
1524 kvm_release_page_clean(vcpu->arch.update_pte.page);
1525 vcpu->arch.update_pte.page = NULL;
1529 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1534 down_read(&vcpu->kvm->slots_lock);
1535 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1536 up_read(&vcpu->kvm->slots_lock);
1538 spin_lock(&vcpu->kvm->mmu_lock);
1539 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1540 spin_unlock(&vcpu->kvm->mmu_lock);
1544 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1546 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
1547 struct kvm_mmu_page *sp;
1549 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
1550 struct kvm_mmu_page, link);
1551 kvm_mmu_zap_page(vcpu->kvm, sp);
1552 ++vcpu->kvm->stat.mmu_recycled;
1556 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1559 enum emulation_result er;
1561 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
1570 r = mmu_topup_memory_caches(vcpu);
1574 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1579 case EMULATE_DO_MMIO:
1580 ++vcpu->stat.mmio_exits;
1583 kvm_report_emulation_failure(vcpu, "pagetable");
1591 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1593 void kvm_enable_tdp(void)
1597 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
1599 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1601 struct kvm_mmu_page *sp;
1603 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1604 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
1605 struct kvm_mmu_page, link);
1606 kvm_mmu_zap_page(vcpu->kvm, sp);
1608 free_page((unsigned long)vcpu->arch.mmu.pae_root);
1611 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1618 if (vcpu->kvm->arch.n_requested_mmu_pages)
1619 vcpu->kvm->arch.n_free_mmu_pages =
1620 vcpu->kvm->arch.n_requested_mmu_pages;
1622 vcpu->kvm->arch.n_free_mmu_pages =
1623 vcpu->kvm->arch.n_alloc_mmu_pages;
1625 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1626 * Therefore we need to allocate shadow page tables in the first
1627 * 4GB of memory, which happens to fit the DMA32 zone.
1629 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1632 vcpu->arch.mmu.pae_root = page_address(page);
1633 for (i = 0; i < 4; ++i)
1634 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1639 free_mmu_pages(vcpu);
1643 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1646 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1648 return alloc_mmu_pages(vcpu);
1651 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1654 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1656 return init_kvm_mmu(vcpu);
1659 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1663 destroy_kvm_mmu(vcpu);
1664 free_mmu_pages(vcpu);
1665 mmu_free_memory_caches(vcpu);
1668 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1670 struct kvm_mmu_page *sp;
1672 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
1676 if (!test_bit(slot, &sp->slot_bitmap))
1680 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1682 if (pt[i] & PT_WRITABLE_MASK)
1683 pt[i] &= ~PT_WRITABLE_MASK;
1687 void kvm_mmu_zap_all(struct kvm *kvm)
1689 struct kvm_mmu_page *sp, *node;
1691 spin_lock(&kvm->mmu_lock);
1692 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
1693 kvm_mmu_zap_page(kvm, sp);
1694 spin_unlock(&kvm->mmu_lock);
1696 kvm_flush_remote_tlbs(kvm);
1699 void kvm_mmu_module_exit(void)
1701 if (pte_chain_cache)
1702 kmem_cache_destroy(pte_chain_cache);
1703 if (rmap_desc_cache)
1704 kmem_cache_destroy(rmap_desc_cache);
1705 if (mmu_page_header_cache)
1706 kmem_cache_destroy(mmu_page_header_cache);
1709 int kvm_mmu_module_init(void)
1711 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1712 sizeof(struct kvm_pte_chain),
1714 if (!pte_chain_cache)
1716 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1717 sizeof(struct kvm_rmap_desc),
1719 if (!rmap_desc_cache)
1722 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1723 sizeof(struct kvm_mmu_page),
1725 if (!mmu_page_header_cache)
1731 kvm_mmu_module_exit();
1736 * Caculate mmu pages needed for kvm.
1738 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1741 unsigned int nr_mmu_pages;
1742 unsigned int nr_pages = 0;
1744 for (i = 0; i < kvm->nmemslots; i++)
1745 nr_pages += kvm->memslots[i].npages;
1747 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1748 nr_mmu_pages = max(nr_mmu_pages,
1749 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1751 return nr_mmu_pages;
1756 static const char *audit_msg;
1758 static gva_t canonicalize(gva_t gva)
1760 #ifdef CONFIG_X86_64
1761 gva = (long long)(gva << 16) >> 16;
1766 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1767 gva_t va, int level)
1769 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1771 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1773 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1776 if (ent == shadow_trap_nonpresent_pte)
1779 va = canonicalize(va);
1781 if (ent == shadow_notrap_nonpresent_pte)
1782 printk(KERN_ERR "audit: (%s) nontrapping pte"
1783 " in nonleaf level: levels %d gva %lx"
1784 " level %d pte %llx\n", audit_msg,
1785 vcpu->arch.mmu.root_level, va, level, ent);
1787 audit_mappings_page(vcpu, ent, va, level - 1);
1789 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
1790 struct page *page = gpa_to_page(vcpu, gpa);
1791 hpa_t hpa = page_to_phys(page);
1793 if (is_shadow_present_pte(ent)
1794 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1795 printk(KERN_ERR "xx audit error: (%s) levels %d"
1796 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
1797 audit_msg, vcpu->arch.mmu.root_level,
1799 is_shadow_present_pte(ent));
1800 else if (ent == shadow_notrap_nonpresent_pte
1801 && !is_error_hpa(hpa))
1802 printk(KERN_ERR "audit: (%s) notrap shadow,"
1803 " valid guest gva %lx\n", audit_msg, va);
1804 kvm_release_page_clean(page);
1810 static void audit_mappings(struct kvm_vcpu *vcpu)
1814 if (vcpu->arch.mmu.root_level == 4)
1815 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
1817 for (i = 0; i < 4; ++i)
1818 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
1819 audit_mappings_page(vcpu,
1820 vcpu->arch.mmu.pae_root[i],
1825 static int count_rmaps(struct kvm_vcpu *vcpu)
1830 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1831 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1832 struct kvm_rmap_desc *d;
1834 for (j = 0; j < m->npages; ++j) {
1835 unsigned long *rmapp = &m->rmap[j];
1839 if (!(*rmapp & 1)) {
1843 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
1845 for (k = 0; k < RMAP_EXT; ++k)
1846 if (d->shadow_ptes[k])
1857 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1860 struct kvm_mmu_page *sp;
1863 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
1866 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
1869 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1872 if (!(ent & PT_PRESENT_MASK))
1874 if (!(ent & PT_WRITABLE_MASK))
1882 static void audit_rmap(struct kvm_vcpu *vcpu)
1884 int n_rmap = count_rmaps(vcpu);
1885 int n_actual = count_writable_mappings(vcpu);
1887 if (n_rmap != n_actual)
1888 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1889 __FUNCTION__, audit_msg, n_rmap, n_actual);
1892 static void audit_write_protection(struct kvm_vcpu *vcpu)
1894 struct kvm_mmu_page *sp;
1895 struct kvm_memory_slot *slot;
1896 unsigned long *rmapp;
1899 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
1900 if (sp->role.metaphysical)
1903 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
1904 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
1905 rmapp = &slot->rmap[gfn - slot->base_gfn];
1907 printk(KERN_ERR "%s: (%s) shadow page has writable"
1908 " mappings: gfn %lx role %x\n",
1909 __FUNCTION__, audit_msg, sp->gfn,
1914 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1921 audit_write_protection(vcpu);
1922 audit_mappings(vcpu);