2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
32 #include <asm/cmpxchg.h>
40 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
42 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
47 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
48 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
52 #define pgprintk(x...) do { } while (0)
53 #define rmap_printk(x...) do { } while (0)
57 #if defined(MMU_DEBUG) || defined(AUDIT)
62 #define ASSERT(x) do { } while (0)
66 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
67 __FILE__, __LINE__, #x); \
71 #define PT64_PT_BITS 9
72 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
73 #define PT32_PT_BITS 10
74 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
76 #define PT_WRITABLE_SHIFT 1
78 #define PT_PRESENT_MASK (1ULL << 0)
79 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
80 #define PT_USER_MASK (1ULL << 2)
81 #define PT_PWT_MASK (1ULL << 3)
82 #define PT_PCD_MASK (1ULL << 4)
83 #define PT_ACCESSED_MASK (1ULL << 5)
84 #define PT_DIRTY_MASK (1ULL << 6)
85 #define PT_PAGE_SIZE_MASK (1ULL << 7)
86 #define PT_PAT_MASK (1ULL << 7)
87 #define PT_GLOBAL_MASK (1ULL << 8)
88 #define PT64_NX_SHIFT 63
89 #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
91 #define PT_PAT_SHIFT 7
92 #define PT_DIR_PAT_SHIFT 12
93 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
95 #define PT32_DIR_PSE36_SIZE 4
96 #define PT32_DIR_PSE36_SHIFT 13
97 #define PT32_DIR_PSE36_MASK \
98 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
101 #define PT_FIRST_AVAIL_BITS_SHIFT 9
102 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
104 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
106 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
108 #define PT64_LEVEL_BITS 9
110 #define PT64_LEVEL_SHIFT(level) \
111 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
113 #define PT64_LEVEL_MASK(level) \
114 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
116 #define PT64_INDEX(address, level)\
117 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
120 #define PT32_LEVEL_BITS 10
122 #define PT32_LEVEL_SHIFT(level) \
123 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
125 #define PT32_LEVEL_MASK(level) \
126 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
128 #define PT32_INDEX(address, level)\
129 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
132 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
133 #define PT64_DIR_BASE_ADDR_MASK \
134 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
136 #define PT32_BASE_ADDR_MASK PAGE_MASK
137 #define PT32_DIR_BASE_ADDR_MASK \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
140 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
157 #define ACC_EXEC_MASK 1
158 #define ACC_WRITE_MASK PT_WRITABLE_MASK
159 #define ACC_USER_MASK PT_USER_MASK
160 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
162 struct kvm_rmap_desc {
163 u64 *shadow_ptes[RMAP_EXT];
164 struct kvm_rmap_desc *more;
167 static struct kmem_cache *pte_chain_cache;
168 static struct kmem_cache *rmap_desc_cache;
169 static struct kmem_cache *mmu_page_header_cache;
171 static u64 __read_mostly shadow_trap_nonpresent_pte;
172 static u64 __read_mostly shadow_notrap_nonpresent_pte;
174 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
176 shadow_trap_nonpresent_pte = trap_pte;
177 shadow_notrap_nonpresent_pte = notrap_pte;
179 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
181 static int is_write_protection(struct kvm_vcpu *vcpu)
183 return vcpu->arch.cr0 & X86_CR0_WP;
186 static int is_cpuid_PSE36(void)
191 static int is_nx(struct kvm_vcpu *vcpu)
193 return vcpu->arch.shadow_efer & EFER_NX;
196 static int is_present_pte(unsigned long pte)
198 return pte & PT_PRESENT_MASK;
201 static int is_shadow_present_pte(u64 pte)
203 pte &= ~PT_SHADOW_IO_MARK;
204 return pte != shadow_trap_nonpresent_pte
205 && pte != shadow_notrap_nonpresent_pte;
208 static int is_writeble_pte(unsigned long pte)
210 return pte & PT_WRITABLE_MASK;
213 static int is_dirty_pte(unsigned long pte)
215 return pte & PT_DIRTY_MASK;
218 static int is_io_pte(unsigned long pte)
220 return pte & PT_SHADOW_IO_MARK;
223 static int is_rmap_pte(u64 pte)
225 return is_shadow_present_pte(pte);
228 static gfn_t pse36_gfn_delta(u32 gpte)
230 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
232 return (gpte & PT32_DIR_PSE36_MASK) << shift;
235 static void set_shadow_pte(u64 *sptep, u64 spte)
238 set_64bit((unsigned long *)sptep, spte);
240 set_64bit((unsigned long long *)sptep, spte);
244 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
245 struct kmem_cache *base_cache, int min)
249 if (cache->nobjs >= min)
251 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
252 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
255 cache->objects[cache->nobjs++] = obj;
260 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
263 kfree(mc->objects[--mc->nobjs]);
266 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
271 if (cache->nobjs >= min)
273 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
274 page = alloc_page(GFP_KERNEL);
277 set_page_private(page, 0);
278 cache->objects[cache->nobjs++] = page_address(page);
283 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
286 free_page((unsigned long)mc->objects[--mc->nobjs]);
289 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
293 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
297 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
301 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
304 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
305 mmu_page_header_cache, 4);
310 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
312 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
313 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
314 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
315 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
318 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
324 p = mc->objects[--mc->nobjs];
329 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
331 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
332 sizeof(struct kvm_pte_chain));
335 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
340 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
342 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
343 sizeof(struct kvm_rmap_desc));
346 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
352 * Take gfn and return the reverse mapping to it.
353 * Note: gfn must be unaliased before this function get called
356 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
358 struct kvm_memory_slot *slot;
360 slot = gfn_to_memslot(kvm, gfn);
361 return &slot->rmap[gfn - slot->base_gfn];
365 * Reverse mapping data structures:
367 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
368 * that points to page_address(page).
370 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
371 * containing more mappings.
373 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
375 struct kvm_mmu_page *sp;
376 struct kvm_rmap_desc *desc;
377 unsigned long *rmapp;
380 if (!is_rmap_pte(*spte))
382 gfn = unalias_gfn(vcpu->kvm, gfn);
383 sp = page_header(__pa(spte));
384 sp->gfns[spte - sp->spt] = gfn;
385 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
387 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
388 *rmapp = (unsigned long)spte;
389 } else if (!(*rmapp & 1)) {
390 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
391 desc = mmu_alloc_rmap_desc(vcpu);
392 desc->shadow_ptes[0] = (u64 *)*rmapp;
393 desc->shadow_ptes[1] = spte;
394 *rmapp = (unsigned long)desc | 1;
396 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
397 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
398 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
400 if (desc->shadow_ptes[RMAP_EXT-1]) {
401 desc->more = mmu_alloc_rmap_desc(vcpu);
404 for (i = 0; desc->shadow_ptes[i]; ++i)
406 desc->shadow_ptes[i] = spte;
410 static void rmap_desc_remove_entry(unsigned long *rmapp,
411 struct kvm_rmap_desc *desc,
413 struct kvm_rmap_desc *prev_desc)
417 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
419 desc->shadow_ptes[i] = desc->shadow_ptes[j];
420 desc->shadow_ptes[j] = NULL;
423 if (!prev_desc && !desc->more)
424 *rmapp = (unsigned long)desc->shadow_ptes[0];
427 prev_desc->more = desc->more;
429 *rmapp = (unsigned long)desc->more | 1;
430 mmu_free_rmap_desc(desc);
433 static void rmap_remove(struct kvm *kvm, u64 *spte)
435 struct kvm_rmap_desc *desc;
436 struct kvm_rmap_desc *prev_desc;
437 struct kvm_mmu_page *sp;
439 unsigned long *rmapp;
442 if (!is_rmap_pte(*spte))
444 sp = page_header(__pa(spte));
445 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
446 mark_page_accessed(page);
447 if (is_writeble_pte(*spte))
448 kvm_release_page_dirty(page);
450 kvm_release_page_clean(page);
451 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
453 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
455 } else if (!(*rmapp & 1)) {
456 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
457 if ((u64 *)*rmapp != spte) {
458 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
464 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
465 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
468 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
469 if (desc->shadow_ptes[i] == spte) {
470 rmap_desc_remove_entry(rmapp,
482 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
484 struct kvm_rmap_desc *desc;
485 struct kvm_rmap_desc *prev_desc;
491 else if (!(*rmapp & 1)) {
493 return (u64 *)*rmapp;
496 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
500 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
501 if (prev_spte == spte)
502 return desc->shadow_ptes[i];
503 prev_spte = desc->shadow_ptes[i];
510 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
512 unsigned long *rmapp;
514 int write_protected = 0;
516 gfn = unalias_gfn(kvm, gfn);
517 rmapp = gfn_to_rmap(kvm, gfn);
519 spte = rmap_next(kvm, rmapp, NULL);
522 BUG_ON(!(*spte & PT_PRESENT_MASK));
523 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
524 if (is_writeble_pte(*spte)) {
525 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
528 spte = rmap_next(kvm, rmapp, spte);
531 kvm_flush_remote_tlbs(kvm);
535 static int is_empty_shadow_page(u64 *spt)
540 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
541 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
542 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
550 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
552 ASSERT(is_empty_shadow_page(sp->spt));
554 __free_page(virt_to_page(sp->spt));
555 __free_page(virt_to_page(sp->gfns));
557 ++kvm->arch.n_free_mmu_pages;
560 static unsigned kvm_page_table_hashfn(gfn_t gfn)
565 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
568 struct kvm_mmu_page *sp;
570 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
571 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
572 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
573 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
574 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
575 ASSERT(is_empty_shadow_page(sp->spt));
578 sp->parent_pte = parent_pte;
579 --vcpu->kvm->arch.n_free_mmu_pages;
583 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
584 struct kvm_mmu_page *sp, u64 *parent_pte)
586 struct kvm_pte_chain *pte_chain;
587 struct hlist_node *node;
592 if (!sp->multimapped) {
593 u64 *old = sp->parent_pte;
596 sp->parent_pte = parent_pte;
600 pte_chain = mmu_alloc_pte_chain(vcpu);
601 INIT_HLIST_HEAD(&sp->parent_ptes);
602 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
603 pte_chain->parent_ptes[0] = old;
605 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
606 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
608 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
609 if (!pte_chain->parent_ptes[i]) {
610 pte_chain->parent_ptes[i] = parent_pte;
614 pte_chain = mmu_alloc_pte_chain(vcpu);
616 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
617 pte_chain->parent_ptes[0] = parent_pte;
620 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
623 struct kvm_pte_chain *pte_chain;
624 struct hlist_node *node;
627 if (!sp->multimapped) {
628 BUG_ON(sp->parent_pte != parent_pte);
629 sp->parent_pte = NULL;
632 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
633 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
634 if (!pte_chain->parent_ptes[i])
636 if (pte_chain->parent_ptes[i] != parent_pte)
638 while (i + 1 < NR_PTE_CHAIN_ENTRIES
639 && pte_chain->parent_ptes[i + 1]) {
640 pte_chain->parent_ptes[i]
641 = pte_chain->parent_ptes[i + 1];
644 pte_chain->parent_ptes[i] = NULL;
646 hlist_del(&pte_chain->link);
647 mmu_free_pte_chain(pte_chain);
648 if (hlist_empty(&sp->parent_ptes)) {
650 sp->parent_pte = NULL;
658 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
661 struct hlist_head *bucket;
662 struct kvm_mmu_page *sp;
663 struct hlist_node *node;
665 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
666 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
667 bucket = &kvm->arch.mmu_page_hash[index];
668 hlist_for_each_entry(sp, node, bucket, hash_link)
669 if (sp->gfn == gfn && !sp->role.metaphysical) {
670 pgprintk("%s: found role %x\n",
671 __FUNCTION__, sp->role.word);
677 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
685 union kvm_mmu_page_role role;
688 struct hlist_head *bucket;
689 struct kvm_mmu_page *sp;
690 struct hlist_node *node;
693 role.glevels = vcpu->arch.mmu.root_level;
695 role.metaphysical = metaphysical;
696 role.access = access;
697 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
698 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
699 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
700 role.quadrant = quadrant;
702 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
704 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
705 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
706 hlist_for_each_entry(sp, node, bucket, hash_link)
707 if (sp->gfn == gfn && sp->role.word == role.word) {
708 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
709 pgprintk("%s: found\n", __FUNCTION__);
712 ++vcpu->kvm->stat.mmu_cache_miss;
713 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
716 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
719 hlist_add_head(&sp->hash_link, bucket);
720 vcpu->arch.mmu.prefetch_page(vcpu, sp);
722 rmap_write_protect(vcpu->kvm, gfn);
726 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
727 struct kvm_mmu_page *sp)
735 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
736 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
737 if (is_shadow_present_pte(pt[i]))
738 rmap_remove(kvm, &pt[i]);
739 pt[i] = shadow_trap_nonpresent_pte;
741 kvm_flush_remote_tlbs(kvm);
745 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
748 pt[i] = shadow_trap_nonpresent_pte;
749 if (!is_shadow_present_pte(ent))
751 ent &= PT64_BASE_ADDR_MASK;
752 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
754 kvm_flush_remote_tlbs(kvm);
757 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
759 mmu_page_remove_parent_pte(sp, parent_pte);
762 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
766 for (i = 0; i < KVM_MAX_VCPUS; ++i)
768 kvm->vcpus[i]->arch.last_pte_updated = NULL;
771 static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
775 ++kvm->stat.mmu_shadow_zapped;
776 while (sp->multimapped || sp->parent_pte) {
777 if (!sp->multimapped)
778 parent_pte = sp->parent_pte;
780 struct kvm_pte_chain *chain;
782 chain = container_of(sp->parent_ptes.first,
783 struct kvm_pte_chain, link);
784 parent_pte = chain->parent_ptes[0];
787 kvm_mmu_put_page(sp, parent_pte);
788 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
790 kvm_mmu_page_unlink_children(kvm, sp);
791 if (!sp->root_count) {
792 hlist_del(&sp->hash_link);
793 kvm_mmu_free_page(kvm, sp);
795 list_move(&sp->link, &kvm->arch.active_mmu_pages);
796 kvm_mmu_reset_last_pte_updated(kvm);
800 * Changing the number of mmu pages allocated to the vm
801 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
803 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
806 * If we set the number of mmu pages to be smaller be than the
807 * number of actived pages , we must to free some mmu pages before we
811 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
813 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
814 - kvm->arch.n_free_mmu_pages;
816 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
817 struct kvm_mmu_page *page;
819 page = container_of(kvm->arch.active_mmu_pages.prev,
820 struct kvm_mmu_page, link);
821 kvm_mmu_zap_page(kvm, page);
824 kvm->arch.n_free_mmu_pages = 0;
827 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
828 - kvm->arch.n_alloc_mmu_pages;
830 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
833 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
836 struct hlist_head *bucket;
837 struct kvm_mmu_page *sp;
838 struct hlist_node *node, *n;
841 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
843 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
844 bucket = &kvm->arch.mmu_page_hash[index];
845 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
846 if (sp->gfn == gfn && !sp->role.metaphysical) {
847 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
849 kvm_mmu_zap_page(kvm, sp);
855 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
857 struct kvm_mmu_page *sp;
859 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
860 pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
861 kvm_mmu_zap_page(kvm, sp);
865 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
867 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
868 struct kvm_mmu_page *sp = page_header(__pa(pte));
870 __set_bit(slot, &sp->slot_bitmap);
873 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
877 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
879 if (gpa == UNMAPPED_GVA)
882 down_read(¤t->mm->mmap_sem);
883 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
884 up_read(¤t->mm->mmap_sem);
889 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
890 unsigned pt_access, unsigned pte_access,
891 int user_fault, int write_fault, int dirty,
892 int *ptwrite, gfn_t gfn, struct page *page)
895 int was_rmapped = is_rmap_pte(*shadow_pte);
896 int was_writeble = is_writeble_pte(*shadow_pte);
898 pgprintk("%s: spte %llx access %x write_fault %d"
899 " user_fault %d gfn %lx\n",
900 __FUNCTION__, *shadow_pte, pt_access,
901 write_fault, user_fault, gfn);
904 * We don't set the accessed bit, since we sometimes want to see
905 * whether the guest actually used the pte (in order to detect
908 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
910 pte_access &= ~ACC_WRITE_MASK;
911 if (!(pte_access & ACC_EXEC_MASK))
912 spte |= PT64_NX_MASK;
914 spte |= PT_PRESENT_MASK;
915 if (pte_access & ACC_USER_MASK)
916 spte |= PT_USER_MASK;
918 if (is_error_page(page)) {
919 set_shadow_pte(shadow_pte,
920 shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
921 kvm_release_page_clean(page);
925 spte |= page_to_phys(page);
927 if ((pte_access & ACC_WRITE_MASK)
928 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
929 struct kvm_mmu_page *shadow;
931 spte |= PT_WRITABLE_MASK;
933 mmu_unshadow(vcpu->kvm, gfn);
937 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
939 pgprintk("%s: found shadow page for %lx, marking ro\n",
941 pte_access &= ~ACC_WRITE_MASK;
942 if (is_writeble_pte(spte)) {
943 spte &= ~PT_WRITABLE_MASK;
944 kvm_x86_ops->tlb_flush(vcpu);
953 if (pte_access & ACC_WRITE_MASK)
954 mark_page_dirty(vcpu->kvm, gfn);
956 pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
957 set_shadow_pte(shadow_pte, spte);
958 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
960 rmap_add(vcpu, shadow_pte, gfn);
961 if (!is_rmap_pte(*shadow_pte))
962 kvm_release_page_clean(page);
965 kvm_release_page_dirty(page);
967 kvm_release_page_clean(page);
969 if (!ptwrite || !*ptwrite)
970 vcpu->arch.last_pte_updated = shadow_pte;
973 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
977 static int __nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write,
978 gfn_t gfn, struct page *page)
980 int level = PT32E_ROOT_LEVEL;
981 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
985 u32 index = PT64_INDEX(v, level);
988 ASSERT(VALID_PAGE(table_addr));
989 table = __va(table_addr);
992 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
993 0, write, 1, &pt_write, gfn, page);
994 return pt_write || is_io_pte(table[index]);
997 if (table[index] == shadow_trap_nonpresent_pte) {
998 struct kvm_mmu_page *new_table;
1001 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1003 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1005 1, ACC_ALL, &table[index]);
1007 pgprintk("nonpaging_map: ENOMEM\n");
1008 kvm_release_page_clean(page);
1012 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
1013 | PT_WRITABLE_MASK | PT_USER_MASK;
1015 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1019 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1025 down_read(&vcpu->kvm->slots_lock);
1027 down_read(¤t->mm->mmap_sem);
1028 page = gfn_to_page(vcpu->kvm, gfn);
1029 up_read(¤t->mm->mmap_sem);
1031 spin_lock(&vcpu->kvm->mmu_lock);
1032 kvm_mmu_free_some_pages(vcpu);
1033 r = __nonpaging_map(vcpu, v, write, gfn, page);
1034 spin_unlock(&vcpu->kvm->mmu_lock);
1036 up_read(&vcpu->kvm->slots_lock);
1042 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1043 struct kvm_mmu_page *sp)
1047 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1048 sp->spt[i] = shadow_trap_nonpresent_pte;
1051 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1054 struct kvm_mmu_page *sp;
1056 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1058 spin_lock(&vcpu->kvm->mmu_lock);
1059 #ifdef CONFIG_X86_64
1060 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1061 hpa_t root = vcpu->arch.mmu.root_hpa;
1063 sp = page_header(root);
1065 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1066 spin_unlock(&vcpu->kvm->mmu_lock);
1070 for (i = 0; i < 4; ++i) {
1071 hpa_t root = vcpu->arch.mmu.pae_root[i];
1074 root &= PT64_BASE_ADDR_MASK;
1075 sp = page_header(root);
1078 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1080 spin_unlock(&vcpu->kvm->mmu_lock);
1081 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1084 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1088 struct kvm_mmu_page *sp;
1090 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1092 #ifdef CONFIG_X86_64
1093 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1094 hpa_t root = vcpu->arch.mmu.root_hpa;
1096 ASSERT(!VALID_PAGE(root));
1097 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1098 PT64_ROOT_LEVEL, 0, ACC_ALL, NULL);
1099 root = __pa(sp->spt);
1101 vcpu->arch.mmu.root_hpa = root;
1105 for (i = 0; i < 4; ++i) {
1106 hpa_t root = vcpu->arch.mmu.pae_root[i];
1108 ASSERT(!VALID_PAGE(root));
1109 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1110 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1111 vcpu->arch.mmu.pae_root[i] = 0;
1114 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1115 } else if (vcpu->arch.mmu.root_level == 0)
1117 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1118 PT32_ROOT_LEVEL, !is_paging(vcpu),
1120 root = __pa(sp->spt);
1122 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
1124 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
1127 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1132 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
1138 pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code);
1139 r = mmu_topup_memory_caches(vcpu);
1144 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1146 gfn = gva >> PAGE_SHIFT;
1148 return nonpaging_map(vcpu, gva & PAGE_MASK,
1149 error_code & PFERR_WRITE_MASK, gfn);
1152 static void nonpaging_free(struct kvm_vcpu *vcpu)
1154 mmu_free_roots(vcpu);
1157 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1159 struct kvm_mmu *context = &vcpu->arch.mmu;
1161 context->new_cr3 = nonpaging_new_cr3;
1162 context->page_fault = nonpaging_page_fault;
1163 context->gva_to_gpa = nonpaging_gva_to_gpa;
1164 context->free = nonpaging_free;
1165 context->prefetch_page = nonpaging_prefetch_page;
1166 context->root_level = 0;
1167 context->shadow_root_level = PT32E_ROOT_LEVEL;
1168 context->root_hpa = INVALID_PAGE;
1172 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
1174 ++vcpu->stat.tlb_flush;
1175 kvm_x86_ops->tlb_flush(vcpu);
1178 static void paging_new_cr3(struct kvm_vcpu *vcpu)
1180 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->arch.cr3);
1181 mmu_free_roots(vcpu);
1184 static void inject_page_fault(struct kvm_vcpu *vcpu,
1188 kvm_inject_page_fault(vcpu, addr, err_code);
1191 static void paging_free(struct kvm_vcpu *vcpu)
1193 nonpaging_free(vcpu);
1197 #include "paging_tmpl.h"
1201 #include "paging_tmpl.h"
1204 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1206 struct kvm_mmu *context = &vcpu->arch.mmu;
1208 ASSERT(is_pae(vcpu));
1209 context->new_cr3 = paging_new_cr3;
1210 context->page_fault = paging64_page_fault;
1211 context->gva_to_gpa = paging64_gva_to_gpa;
1212 context->prefetch_page = paging64_prefetch_page;
1213 context->free = paging_free;
1214 context->root_level = level;
1215 context->shadow_root_level = level;
1216 context->root_hpa = INVALID_PAGE;
1220 static int paging64_init_context(struct kvm_vcpu *vcpu)
1222 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1225 static int paging32_init_context(struct kvm_vcpu *vcpu)
1227 struct kvm_mmu *context = &vcpu->arch.mmu;
1229 context->new_cr3 = paging_new_cr3;
1230 context->page_fault = paging32_page_fault;
1231 context->gva_to_gpa = paging32_gva_to_gpa;
1232 context->free = paging_free;
1233 context->prefetch_page = paging32_prefetch_page;
1234 context->root_level = PT32_ROOT_LEVEL;
1235 context->shadow_root_level = PT32E_ROOT_LEVEL;
1236 context->root_hpa = INVALID_PAGE;
1240 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1242 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1245 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1248 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1250 if (!is_paging(vcpu))
1251 return nonpaging_init_context(vcpu);
1252 else if (is_long_mode(vcpu))
1253 return paging64_init_context(vcpu);
1254 else if (is_pae(vcpu))
1255 return paging32E_init_context(vcpu);
1257 return paging32_init_context(vcpu);
1260 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1263 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1264 vcpu->arch.mmu.free(vcpu);
1265 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1269 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1271 destroy_kvm_mmu(vcpu);
1272 return init_kvm_mmu(vcpu);
1274 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
1276 int kvm_mmu_load(struct kvm_vcpu *vcpu)
1280 r = mmu_topup_memory_caches(vcpu);
1283 spin_lock(&vcpu->kvm->mmu_lock);
1284 kvm_mmu_free_some_pages(vcpu);
1285 mmu_alloc_roots(vcpu);
1286 spin_unlock(&vcpu->kvm->mmu_lock);
1287 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
1288 kvm_mmu_flush_tlb(vcpu);
1292 EXPORT_SYMBOL_GPL(kvm_mmu_load);
1294 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1296 mmu_free_roots(vcpu);
1299 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
1300 struct kvm_mmu_page *sp,
1304 struct kvm_mmu_page *child;
1307 if (is_shadow_present_pte(pte)) {
1308 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
1309 rmap_remove(vcpu->kvm, spte);
1311 child = page_header(pte & PT64_BASE_ADDR_MASK);
1312 mmu_page_remove_parent_pte(child, spte);
1315 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
1318 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1319 struct kvm_mmu_page *sp,
1321 const void *new, int bytes,
1324 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
1325 ++vcpu->kvm->stat.mmu_pde_zapped;
1329 ++vcpu->kvm->stat.mmu_pte_updated;
1330 if (sp->role.glevels == PT32_ROOT_LEVEL)
1331 paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
1333 paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
1336 static bool need_remote_flush(u64 old, u64 new)
1338 if (!is_shadow_present_pte(old))
1340 if (!is_shadow_present_pte(new))
1342 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1344 old ^= PT64_NX_MASK;
1345 new ^= PT64_NX_MASK;
1346 return (old & ~new & PT64_PERM_MASK) != 0;
1349 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1351 if (need_remote_flush(old, new))
1352 kvm_flush_remote_tlbs(vcpu->kvm);
1354 kvm_mmu_flush_tlb(vcpu);
1357 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1359 u64 *spte = vcpu->arch.last_pte_updated;
1361 return !!(spte && (*spte & PT_ACCESSED_MASK));
1364 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1365 const u8 *new, int bytes)
1372 if (bytes != 4 && bytes != 8)
1376 * Assume that the pte write on a page table of the same type
1377 * as the current vcpu paging mode. This is nearly always true
1378 * (might be false while changing modes). Note it is verified later
1382 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1383 if ((bytes == 4) && (gpa % 4 == 0)) {
1384 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1387 memcpy((void *)&gpte + (gpa % 8), new, 4);
1388 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1389 memcpy((void *)&gpte, new, 8);
1392 if ((bytes == 4) && (gpa % 4 == 0))
1393 memcpy((void *)&gpte, new, 4);
1395 if (!is_present_pte(gpte))
1397 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
1399 down_read(¤t->mm->mmap_sem);
1400 page = gfn_to_page(vcpu->kvm, gfn);
1401 up_read(¤t->mm->mmap_sem);
1403 vcpu->arch.update_pte.gfn = gfn;
1404 vcpu->arch.update_pte.page = gfn_to_page(vcpu->kvm, gfn);
1407 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1408 const u8 *new, int bytes)
1410 gfn_t gfn = gpa >> PAGE_SHIFT;
1411 struct kvm_mmu_page *sp;
1412 struct hlist_node *node, *n;
1413 struct hlist_head *bucket;
1417 unsigned offset = offset_in_page(gpa);
1419 unsigned page_offset;
1420 unsigned misaligned;
1426 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1427 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
1428 spin_lock(&vcpu->kvm->mmu_lock);
1429 kvm_mmu_free_some_pages(vcpu);
1430 ++vcpu->kvm->stat.mmu_pte_write;
1431 kvm_mmu_audit(vcpu, "pre pte write");
1432 if (gfn == vcpu->arch.last_pt_write_gfn
1433 && !last_updated_pte_accessed(vcpu)) {
1434 ++vcpu->arch.last_pt_write_count;
1435 if (vcpu->arch.last_pt_write_count >= 3)
1438 vcpu->arch.last_pt_write_gfn = gfn;
1439 vcpu->arch.last_pt_write_count = 1;
1440 vcpu->arch.last_pte_updated = NULL;
1442 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1443 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1444 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1445 if (sp->gfn != gfn || sp->role.metaphysical)
1447 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1448 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1449 misaligned |= bytes < 4;
1450 if (misaligned || flooded) {
1452 * Misaligned accesses are too much trouble to fix
1453 * up; also, they usually indicate a page is not used
1456 * If we're seeing too many writes to a page,
1457 * it may no longer be a page table, or we may be
1458 * forking, in which case it is better to unmap the
1461 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1462 gpa, bytes, sp->role.word);
1463 kvm_mmu_zap_page(vcpu->kvm, sp);
1464 ++vcpu->kvm->stat.mmu_flooded;
1467 page_offset = offset;
1468 level = sp->role.level;
1470 if (sp->role.glevels == PT32_ROOT_LEVEL) {
1471 page_offset <<= 1; /* 32->64 */
1473 * A 32-bit pde maps 4MB while the shadow pdes map
1474 * only 2MB. So we need to double the offset again
1475 * and zap two pdes instead of one.
1477 if (level == PT32_ROOT_LEVEL) {
1478 page_offset &= ~7; /* kill rounding error */
1482 quadrant = page_offset >> PAGE_SHIFT;
1483 page_offset &= ~PAGE_MASK;
1484 if (quadrant != sp->role.quadrant)
1487 spte = &sp->spt[page_offset / sizeof(*spte)];
1490 mmu_pte_write_zap_pte(vcpu, sp, spte);
1491 mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
1492 page_offset & (pte_size - 1));
1493 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
1497 kvm_mmu_audit(vcpu, "post pte write");
1498 spin_unlock(&vcpu->kvm->mmu_lock);
1499 if (vcpu->arch.update_pte.page) {
1500 kvm_release_page_clean(vcpu->arch.update_pte.page);
1501 vcpu->arch.update_pte.page = NULL;
1505 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1510 down_read(&vcpu->kvm->slots_lock);
1511 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1512 up_read(&vcpu->kvm->slots_lock);
1514 spin_lock(&vcpu->kvm->mmu_lock);
1515 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1516 spin_unlock(&vcpu->kvm->mmu_lock);
1520 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1522 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
1523 struct kvm_mmu_page *sp;
1525 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
1526 struct kvm_mmu_page, link);
1527 kvm_mmu_zap_page(vcpu->kvm, sp);
1528 ++vcpu->kvm->stat.mmu_recycled;
1532 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1535 enum emulation_result er;
1537 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
1546 r = mmu_topup_memory_caches(vcpu);
1550 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1555 case EMULATE_DO_MMIO:
1556 ++vcpu->stat.mmio_exits;
1559 kvm_report_emulation_failure(vcpu, "pagetable");
1567 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1569 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1571 struct kvm_mmu_page *sp;
1573 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1574 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
1575 struct kvm_mmu_page, link);
1576 kvm_mmu_zap_page(vcpu->kvm, sp);
1578 free_page((unsigned long)vcpu->arch.mmu.pae_root);
1581 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1588 if (vcpu->kvm->arch.n_requested_mmu_pages)
1589 vcpu->kvm->arch.n_free_mmu_pages =
1590 vcpu->kvm->arch.n_requested_mmu_pages;
1592 vcpu->kvm->arch.n_free_mmu_pages =
1593 vcpu->kvm->arch.n_alloc_mmu_pages;
1595 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1596 * Therefore we need to allocate shadow page tables in the first
1597 * 4GB of memory, which happens to fit the DMA32 zone.
1599 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1602 vcpu->arch.mmu.pae_root = page_address(page);
1603 for (i = 0; i < 4; ++i)
1604 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1609 free_mmu_pages(vcpu);
1613 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1616 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1618 return alloc_mmu_pages(vcpu);
1621 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1624 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1626 return init_kvm_mmu(vcpu);
1629 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1633 destroy_kvm_mmu(vcpu);
1634 free_mmu_pages(vcpu);
1635 mmu_free_memory_caches(vcpu);
1638 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1640 struct kvm_mmu_page *sp;
1642 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
1646 if (!test_bit(slot, &sp->slot_bitmap))
1650 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1652 if (pt[i] & PT_WRITABLE_MASK)
1653 pt[i] &= ~PT_WRITABLE_MASK;
1657 void kvm_mmu_zap_all(struct kvm *kvm)
1659 struct kvm_mmu_page *sp, *node;
1661 spin_lock(&kvm->mmu_lock);
1662 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
1663 kvm_mmu_zap_page(kvm, sp);
1664 spin_unlock(&kvm->mmu_lock);
1666 kvm_flush_remote_tlbs(kvm);
1669 void kvm_mmu_module_exit(void)
1671 if (pte_chain_cache)
1672 kmem_cache_destroy(pte_chain_cache);
1673 if (rmap_desc_cache)
1674 kmem_cache_destroy(rmap_desc_cache);
1675 if (mmu_page_header_cache)
1676 kmem_cache_destroy(mmu_page_header_cache);
1679 int kvm_mmu_module_init(void)
1681 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1682 sizeof(struct kvm_pte_chain),
1684 if (!pte_chain_cache)
1686 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1687 sizeof(struct kvm_rmap_desc),
1689 if (!rmap_desc_cache)
1692 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1693 sizeof(struct kvm_mmu_page),
1695 if (!mmu_page_header_cache)
1701 kvm_mmu_module_exit();
1706 * Caculate mmu pages needed for kvm.
1708 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1711 unsigned int nr_mmu_pages;
1712 unsigned int nr_pages = 0;
1714 for (i = 0; i < kvm->nmemslots; i++)
1715 nr_pages += kvm->memslots[i].npages;
1717 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1718 nr_mmu_pages = max(nr_mmu_pages,
1719 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1721 return nr_mmu_pages;
1726 static const char *audit_msg;
1728 static gva_t canonicalize(gva_t gva)
1730 #ifdef CONFIG_X86_64
1731 gva = (long long)(gva << 16) >> 16;
1736 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1737 gva_t va, int level)
1739 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1741 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1743 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1746 if (ent == shadow_trap_nonpresent_pte)
1749 va = canonicalize(va);
1751 if (ent == shadow_notrap_nonpresent_pte)
1752 printk(KERN_ERR "audit: (%s) nontrapping pte"
1753 " in nonleaf level: levels %d gva %lx"
1754 " level %d pte %llx\n", audit_msg,
1755 vcpu->arch.mmu.root_level, va, level, ent);
1757 audit_mappings_page(vcpu, ent, va, level - 1);
1759 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
1760 struct page *page = gpa_to_page(vcpu, gpa);
1761 hpa_t hpa = page_to_phys(page);
1763 if (is_shadow_present_pte(ent)
1764 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1765 printk(KERN_ERR "xx audit error: (%s) levels %d"
1766 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
1767 audit_msg, vcpu->arch.mmu.root_level,
1769 is_shadow_present_pte(ent));
1770 else if (ent == shadow_notrap_nonpresent_pte
1771 && !is_error_hpa(hpa))
1772 printk(KERN_ERR "audit: (%s) notrap shadow,"
1773 " valid guest gva %lx\n", audit_msg, va);
1774 kvm_release_page_clean(page);
1780 static void audit_mappings(struct kvm_vcpu *vcpu)
1784 if (vcpu->arch.mmu.root_level == 4)
1785 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
1787 for (i = 0; i < 4; ++i)
1788 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
1789 audit_mappings_page(vcpu,
1790 vcpu->arch.mmu.pae_root[i],
1795 static int count_rmaps(struct kvm_vcpu *vcpu)
1800 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1801 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1802 struct kvm_rmap_desc *d;
1804 for (j = 0; j < m->npages; ++j) {
1805 unsigned long *rmapp = &m->rmap[j];
1809 if (!(*rmapp & 1)) {
1813 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
1815 for (k = 0; k < RMAP_EXT; ++k)
1816 if (d->shadow_ptes[k])
1827 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1830 struct kvm_mmu_page *sp;
1833 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
1836 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
1839 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1842 if (!(ent & PT_PRESENT_MASK))
1844 if (!(ent & PT_WRITABLE_MASK))
1852 static void audit_rmap(struct kvm_vcpu *vcpu)
1854 int n_rmap = count_rmaps(vcpu);
1855 int n_actual = count_writable_mappings(vcpu);
1857 if (n_rmap != n_actual)
1858 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1859 __FUNCTION__, audit_msg, n_rmap, n_actual);
1862 static void audit_write_protection(struct kvm_vcpu *vcpu)
1864 struct kvm_mmu_page *sp;
1865 struct kvm_memory_slot *slot;
1866 unsigned long *rmapp;
1869 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
1870 if (sp->role.metaphysical)
1873 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
1874 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
1875 rmapp = &slot->rmap[gfn - slot->base_gfn];
1877 printk(KERN_ERR "%s: (%s) shadow page has writable"
1878 " mappings: gfn %lx role %x\n",
1879 __FUNCTION__, audit_msg, sp->gfn,
1884 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1891 audit_write_protection(vcpu);
1892 audit_mappings(vcpu);