2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/pci.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/intel-iommu.h>
40 #include <asm/uaccess.h>
44 #define MAX_IO_MSRS 256
45 #define CR0_RESERVED_BITS \
46 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
47 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
48 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
49 #define CR4_RESERVED_BITS \
50 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
51 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
52 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
53 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
55 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
57 * - enable syscall per default because its emulated by KVM
58 * - enable LME and LMA per default on 64 bit KVM
61 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
67 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
69 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
70 struct kvm_cpuid_entry2 __user *entries);
72 struct kvm_x86_ops *kvm_x86_ops;
73 EXPORT_SYMBOL_GPL(kvm_x86_ops);
75 struct kvm_stats_debugfs_item debugfs_entries[] = {
76 { "pf_fixed", VCPU_STAT(pf_fixed) },
77 { "pf_guest", VCPU_STAT(pf_guest) },
78 { "tlb_flush", VCPU_STAT(tlb_flush) },
79 { "invlpg", VCPU_STAT(invlpg) },
80 { "exits", VCPU_STAT(exits) },
81 { "io_exits", VCPU_STAT(io_exits) },
82 { "mmio_exits", VCPU_STAT(mmio_exits) },
83 { "signal_exits", VCPU_STAT(signal_exits) },
84 { "irq_window", VCPU_STAT(irq_window_exits) },
85 { "nmi_window", VCPU_STAT(nmi_window_exits) },
86 { "halt_exits", VCPU_STAT(halt_exits) },
87 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
88 { "hypercalls", VCPU_STAT(hypercalls) },
89 { "request_irq", VCPU_STAT(request_irq_exits) },
90 { "irq_exits", VCPU_STAT(irq_exits) },
91 { "host_state_reload", VCPU_STAT(host_state_reload) },
92 { "efer_reload", VCPU_STAT(efer_reload) },
93 { "fpu_reload", VCPU_STAT(fpu_reload) },
94 { "insn_emulation", VCPU_STAT(insn_emulation) },
95 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
96 { "irq_injections", VCPU_STAT(irq_injections) },
97 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
98 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
99 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
100 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
101 { "mmu_flooded", VM_STAT(mmu_flooded) },
102 { "mmu_recycled", VM_STAT(mmu_recycled) },
103 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
104 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
105 { "largepages", VM_STAT(lpages) },
109 static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
112 struct list_head *ptr;
113 struct kvm_assigned_dev_kernel *match;
115 list_for_each(ptr, head) {
116 match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
117 if (match->assigned_dev_id == assigned_dev_id)
123 static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
125 struct kvm_assigned_dev_kernel *assigned_dev;
127 assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
130 /* This is taken to safely inject irq inside the guest. When
131 * the interrupt injection (or the ioapic code) uses a
132 * finer-grained lock, update this
134 mutex_lock(&assigned_dev->kvm->lock);
135 kvm_set_irq(assigned_dev->kvm,
136 assigned_dev->guest_irq, 1);
137 mutex_unlock(&assigned_dev->kvm->lock);
138 kvm_put_kvm(assigned_dev->kvm);
141 /* FIXME: Implement the OR logic needed to make shared interrupts on
142 * this line behave properly
144 static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
146 struct kvm_assigned_dev_kernel *assigned_dev =
147 (struct kvm_assigned_dev_kernel *) dev_id;
149 kvm_get_kvm(assigned_dev->kvm);
150 schedule_work(&assigned_dev->interrupt_work);
151 disable_irq_nosync(irq);
155 /* Ack the irq line for an assigned device */
156 static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
158 struct kvm_assigned_dev_kernel *dev;
163 dev = container_of(kian, struct kvm_assigned_dev_kernel,
165 kvm_set_irq(dev->kvm, dev->guest_irq, 0);
166 enable_irq(dev->host_irq);
169 static void kvm_free_assigned_device(struct kvm *kvm,
170 struct kvm_assigned_dev_kernel
173 if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested)
174 free_irq(assigned_dev->host_irq, (void *)assigned_dev);
176 kvm_unregister_irq_ack_notifier(kvm, &assigned_dev->ack_notifier);
178 if (cancel_work_sync(&assigned_dev->interrupt_work))
179 /* We had pending work. That means we will have to take
180 * care of kvm_put_kvm.
184 pci_release_regions(assigned_dev->dev);
185 pci_disable_device(assigned_dev->dev);
186 pci_dev_put(assigned_dev->dev);
188 list_del(&assigned_dev->list);
192 static void kvm_free_all_assigned_devices(struct kvm *kvm)
194 struct list_head *ptr, *ptr2;
195 struct kvm_assigned_dev_kernel *assigned_dev;
197 list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
198 assigned_dev = list_entry(ptr,
199 struct kvm_assigned_dev_kernel,
202 kvm_free_assigned_device(kvm, assigned_dev);
206 static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
207 struct kvm_assigned_irq
211 struct kvm_assigned_dev_kernel *match;
213 mutex_lock(&kvm->lock);
215 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
216 assigned_irq->assigned_dev_id);
218 mutex_unlock(&kvm->lock);
222 if (match->irq_requested) {
223 match->guest_irq = assigned_irq->guest_irq;
224 match->ack_notifier.gsi = assigned_irq->guest_irq;
225 mutex_unlock(&kvm->lock);
229 INIT_WORK(&match->interrupt_work,
230 kvm_assigned_dev_interrupt_work_handler);
232 if (irqchip_in_kernel(kvm)) {
233 if (!capable(CAP_SYS_RAWIO)) {
238 if (assigned_irq->host_irq)
239 match->host_irq = assigned_irq->host_irq;
241 match->host_irq = match->dev->irq;
242 match->guest_irq = assigned_irq->guest_irq;
243 match->ack_notifier.gsi = assigned_irq->guest_irq;
244 match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
245 kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
247 /* Even though this is PCI, we don't want to use shared
248 * interrupts. Sharing host devices with guest-assigned devices
249 * on the same interrupt line is not a happy situation: there
250 * are going to be long delays in accepting, acking, etc.
252 if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
253 "kvm_assigned_device", (void *)match)) {
259 match->irq_requested = true;
260 mutex_unlock(&kvm->lock);
263 mutex_unlock(&kvm->lock);
264 kvm_free_assigned_device(kvm, match);
268 static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
269 struct kvm_assigned_pci_dev *assigned_dev)
272 struct kvm_assigned_dev_kernel *match;
275 mutex_lock(&kvm->lock);
277 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
278 assigned_dev->assigned_dev_id);
280 /* device already assigned */
285 match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
287 printk(KERN_INFO "%s: Couldn't allocate memory\n",
292 dev = pci_get_bus_and_slot(assigned_dev->busnr,
293 assigned_dev->devfn);
295 printk(KERN_INFO "%s: host device not found\n", __func__);
299 if (pci_enable_device(dev)) {
300 printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
304 r = pci_request_regions(dev, "kvm_assigned_device");
306 printk(KERN_INFO "%s: Could not get access to device regions\n",
310 match->assigned_dev_id = assigned_dev->assigned_dev_id;
311 match->host_busnr = assigned_dev->busnr;
312 match->host_devfn = assigned_dev->devfn;
317 list_add(&match->list, &kvm->arch.assigned_dev_head);
319 if (assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) {
320 r = kvm_iommu_map_guest(kvm, match);
326 mutex_unlock(&kvm->lock);
329 list_del(&match->list);
330 pci_release_regions(dev);
332 pci_disable_device(dev);
337 mutex_unlock(&kvm->lock);
341 unsigned long segment_base(u16 selector)
343 struct descriptor_table gdt;
344 struct desc_struct *d;
345 unsigned long table_base;
351 asm("sgdt %0" : "=m"(gdt));
352 table_base = gdt.base;
354 if (selector & 4) { /* from ldt */
357 asm("sldt %0" : "=g"(ldt_selector));
358 table_base = segment_base(ldt_selector);
360 d = (struct desc_struct *)(table_base + (selector & ~7));
361 v = d->base0 | ((unsigned long)d->base1 << 16) |
362 ((unsigned long)d->base2 << 24);
364 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
365 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
369 EXPORT_SYMBOL_GPL(segment_base);
371 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
373 if (irqchip_in_kernel(vcpu->kvm))
374 return vcpu->arch.apic_base;
376 return vcpu->arch.apic_base;
378 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
380 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
382 /* TODO: reserve bits check */
383 if (irqchip_in_kernel(vcpu->kvm))
384 kvm_lapic_set_base(vcpu, data);
386 vcpu->arch.apic_base = data;
388 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
390 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
392 WARN_ON(vcpu->arch.exception.pending);
393 vcpu->arch.exception.pending = true;
394 vcpu->arch.exception.has_error_code = false;
395 vcpu->arch.exception.nr = nr;
397 EXPORT_SYMBOL_GPL(kvm_queue_exception);
399 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
402 ++vcpu->stat.pf_guest;
403 if (vcpu->arch.exception.pending) {
404 if (vcpu->arch.exception.nr == PF_VECTOR) {
405 printk(KERN_DEBUG "kvm: inject_page_fault:"
406 " double fault 0x%lx\n", addr);
407 vcpu->arch.exception.nr = DF_VECTOR;
408 vcpu->arch.exception.error_code = 0;
409 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
410 /* triple fault -> shutdown */
411 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
415 vcpu->arch.cr2 = addr;
416 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
419 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
421 vcpu->arch.nmi_pending = 1;
423 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
425 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
427 WARN_ON(vcpu->arch.exception.pending);
428 vcpu->arch.exception.pending = true;
429 vcpu->arch.exception.has_error_code = true;
430 vcpu->arch.exception.nr = nr;
431 vcpu->arch.exception.error_code = error_code;
433 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
435 static void __queue_exception(struct kvm_vcpu *vcpu)
437 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
438 vcpu->arch.exception.has_error_code,
439 vcpu->arch.exception.error_code);
443 * Load the pae pdptrs. Return true is they are all valid.
445 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
447 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
448 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
451 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
453 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
454 offset * sizeof(u64), sizeof(pdpte));
459 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
460 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
467 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
472 EXPORT_SYMBOL_GPL(load_pdptrs);
474 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
476 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
480 if (is_long_mode(vcpu) || !is_pae(vcpu))
483 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
486 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
492 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
494 if (cr0 & CR0_RESERVED_BITS) {
495 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
496 cr0, vcpu->arch.cr0);
497 kvm_inject_gp(vcpu, 0);
501 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
502 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
503 kvm_inject_gp(vcpu, 0);
507 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
508 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
509 "and a clear PE flag\n");
510 kvm_inject_gp(vcpu, 0);
514 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
516 if ((vcpu->arch.shadow_efer & EFER_LME)) {
520 printk(KERN_DEBUG "set_cr0: #GP, start paging "
521 "in long mode while PAE is disabled\n");
522 kvm_inject_gp(vcpu, 0);
525 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
527 printk(KERN_DEBUG "set_cr0: #GP, start paging "
528 "in long mode while CS.L == 1\n");
529 kvm_inject_gp(vcpu, 0);
535 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
536 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
538 kvm_inject_gp(vcpu, 0);
544 kvm_x86_ops->set_cr0(vcpu, cr0);
545 vcpu->arch.cr0 = cr0;
547 kvm_mmu_reset_context(vcpu);
550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
554 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
555 KVMTRACE_1D(LMSW, vcpu,
556 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
559 EXPORT_SYMBOL_GPL(kvm_lmsw);
561 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
563 if (cr4 & CR4_RESERVED_BITS) {
564 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
565 kvm_inject_gp(vcpu, 0);
569 if (is_long_mode(vcpu)) {
570 if (!(cr4 & X86_CR4_PAE)) {
571 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
573 kvm_inject_gp(vcpu, 0);
576 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
577 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
578 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
579 kvm_inject_gp(vcpu, 0);
583 if (cr4 & X86_CR4_VMXE) {
584 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
585 kvm_inject_gp(vcpu, 0);
588 kvm_x86_ops->set_cr4(vcpu, cr4);
589 vcpu->arch.cr4 = cr4;
590 kvm_mmu_reset_context(vcpu);
592 EXPORT_SYMBOL_GPL(kvm_set_cr4);
594 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
596 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
597 kvm_mmu_flush_tlb(vcpu);
601 if (is_long_mode(vcpu)) {
602 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
603 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
604 kvm_inject_gp(vcpu, 0);
609 if (cr3 & CR3_PAE_RESERVED_BITS) {
611 "set_cr3: #GP, reserved bits\n");
612 kvm_inject_gp(vcpu, 0);
615 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
616 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
618 kvm_inject_gp(vcpu, 0);
623 * We don't check reserved bits in nonpae mode, because
624 * this isn't enforced, and VMware depends on this.
629 * Does the new cr3 value map to physical memory? (Note, we
630 * catch an invalid cr3 even in real-mode, because it would
631 * cause trouble later on when we turn on paging anyway.)
633 * A real CPU would silently accept an invalid cr3 and would
634 * attempt to use it - with largely undefined (and often hard
635 * to debug) behavior on the guest side.
637 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
638 kvm_inject_gp(vcpu, 0);
640 vcpu->arch.cr3 = cr3;
641 vcpu->arch.mmu.new_cr3(vcpu);
644 EXPORT_SYMBOL_GPL(kvm_set_cr3);
646 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
648 if (cr8 & CR8_RESERVED_BITS) {
649 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
650 kvm_inject_gp(vcpu, 0);
653 if (irqchip_in_kernel(vcpu->kvm))
654 kvm_lapic_set_tpr(vcpu, cr8);
656 vcpu->arch.cr8 = cr8;
658 EXPORT_SYMBOL_GPL(kvm_set_cr8);
660 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
662 if (irqchip_in_kernel(vcpu->kvm))
663 return kvm_lapic_get_cr8(vcpu);
665 return vcpu->arch.cr8;
667 EXPORT_SYMBOL_GPL(kvm_get_cr8);
670 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
671 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
673 * This list is modified at module load time to reflect the
674 * capabilities of the host cpu.
676 static u32 msrs_to_save[] = {
677 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
680 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
682 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
683 MSR_IA32_PERF_STATUS,
686 static unsigned num_msrs_to_save;
688 static u32 emulated_msrs[] = {
689 MSR_IA32_MISC_ENABLE,
692 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
694 if (efer & efer_reserved_bits) {
695 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
697 kvm_inject_gp(vcpu, 0);
702 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
703 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
704 kvm_inject_gp(vcpu, 0);
708 kvm_x86_ops->set_efer(vcpu, efer);
711 efer |= vcpu->arch.shadow_efer & EFER_LMA;
713 vcpu->arch.shadow_efer = efer;
716 void kvm_enable_efer_bits(u64 mask)
718 efer_reserved_bits &= ~mask;
720 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
724 * Writes msr value into into the appropriate "register".
725 * Returns 0 on success, non-0 otherwise.
726 * Assumes vcpu_load() was already called.
728 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
730 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
734 * Adapt set_msr() to msr_io()'s calling convention
736 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
738 return kvm_set_msr(vcpu, index, *data);
741 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
744 struct pvclock_wall_clock wc;
745 struct timespec now, sys, boot;
752 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
755 * The guest calculates current wall clock time by adding
756 * system time (updated by kvm_write_guest_time below) to the
757 * wall clock specified here. guest system time equals host
758 * system time for us, thus we must fill in host boot time here.
760 now = current_kernel_time();
762 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
764 wc.sec = boot.tv_sec;
765 wc.nsec = boot.tv_nsec;
766 wc.version = version;
768 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
771 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
774 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
776 uint32_t quotient, remainder;
778 /* Don't try to replace with do_div(), this one calculates
779 * "(dividend << 32) / divisor" */
781 : "=a" (quotient), "=d" (remainder)
782 : "0" (0), "1" (dividend), "r" (divisor) );
786 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
788 uint64_t nsecs = 1000000000LL;
793 tps64 = tsc_khz * 1000LL;
794 while (tps64 > nsecs*2) {
799 tps32 = (uint32_t)tps64;
800 while (tps32 <= (uint32_t)nsecs) {
805 hv_clock->tsc_shift = shift;
806 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
808 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
809 __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
810 hv_clock->tsc_to_system_mul);
813 static void kvm_write_guest_time(struct kvm_vcpu *v)
817 struct kvm_vcpu_arch *vcpu = &v->arch;
820 if ((!vcpu->time_page))
823 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
824 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
825 vcpu->hv_clock_tsc_khz = tsc_khz;
828 /* Keep irq disabled to prevent changes to the clock */
829 local_irq_save(flags);
830 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
831 &vcpu->hv_clock.tsc_timestamp);
833 local_irq_restore(flags);
835 /* With all the info we got, fill in the values */
837 vcpu->hv_clock.system_time = ts.tv_nsec +
838 (NSEC_PER_SEC * (u64)ts.tv_sec);
840 * The interface expects us to write an even number signaling that the
841 * update is finished. Since the guest won't see the intermediate
842 * state, we just increase by 2 at the end.
844 vcpu->hv_clock.version += 2;
846 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
848 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
849 sizeof(vcpu->hv_clock));
851 kunmap_atomic(shared_kaddr, KM_USER0);
853 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
856 static bool msr_mtrr_valid(unsigned msr)
859 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
860 case MSR_MTRRfix64K_00000:
861 case MSR_MTRRfix16K_80000:
862 case MSR_MTRRfix16K_A0000:
863 case MSR_MTRRfix4K_C0000:
864 case MSR_MTRRfix4K_C8000:
865 case MSR_MTRRfix4K_D0000:
866 case MSR_MTRRfix4K_D8000:
867 case MSR_MTRRfix4K_E0000:
868 case MSR_MTRRfix4K_E8000:
869 case MSR_MTRRfix4K_F0000:
870 case MSR_MTRRfix4K_F8000:
871 case MSR_MTRRdefType:
872 case MSR_IA32_CR_PAT:
880 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
882 if (!msr_mtrr_valid(msr))
885 vcpu->arch.mtrr[msr - 0x200] = data;
889 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
893 set_efer(vcpu, data);
895 case MSR_IA32_MC0_STATUS:
896 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
899 case MSR_IA32_MCG_STATUS:
900 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
903 case MSR_IA32_MCG_CTL:
904 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
907 case MSR_IA32_DEBUGCTLMSR:
909 /* We support the non-activated case already */
911 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
912 /* Values other than LBR and BTF are vendor-specific,
913 thus reserved and should throw a #GP */
916 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
919 case MSR_IA32_UCODE_REV:
920 case MSR_IA32_UCODE_WRITE:
922 case 0x200 ... 0x2ff:
923 return set_msr_mtrr(vcpu, msr, data);
924 case MSR_IA32_APICBASE:
925 kvm_set_apic_base(vcpu, data);
927 case MSR_IA32_MISC_ENABLE:
928 vcpu->arch.ia32_misc_enable_msr = data;
930 case MSR_KVM_WALL_CLOCK:
931 vcpu->kvm->arch.wall_clock = data;
932 kvm_write_wall_clock(vcpu->kvm, data);
934 case MSR_KVM_SYSTEM_TIME: {
935 if (vcpu->arch.time_page) {
936 kvm_release_page_dirty(vcpu->arch.time_page);
937 vcpu->arch.time_page = NULL;
940 vcpu->arch.time = data;
942 /* we verify if the enable bit is set... */
946 /* ...but clean it before doing the actual write */
947 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
949 vcpu->arch.time_page =
950 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
952 if (is_error_page(vcpu->arch.time_page)) {
953 kvm_release_page_clean(vcpu->arch.time_page);
954 vcpu->arch.time_page = NULL;
957 kvm_write_guest_time(vcpu);
961 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
966 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
970 * Reads an msr value (of 'msr_index') into 'pdata'.
971 * Returns 0 on success, non-0 otherwise.
972 * Assumes vcpu_load() was already called.
974 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
976 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
979 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
981 if (!msr_mtrr_valid(msr))
984 *pdata = vcpu->arch.mtrr[msr - 0x200];
988 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
993 case 0xc0010010: /* SYSCFG */
994 case 0xc0010015: /* HWCR */
995 case MSR_IA32_PLATFORM_ID:
996 case MSR_IA32_P5_MC_ADDR:
997 case MSR_IA32_P5_MC_TYPE:
998 case MSR_IA32_MC0_CTL:
999 case MSR_IA32_MCG_STATUS:
1000 case MSR_IA32_MCG_CAP:
1001 case MSR_IA32_MCG_CTL:
1002 case MSR_IA32_MC0_MISC:
1003 case MSR_IA32_MC0_MISC+4:
1004 case MSR_IA32_MC0_MISC+8:
1005 case MSR_IA32_MC0_MISC+12:
1006 case MSR_IA32_MC0_MISC+16:
1007 case MSR_IA32_MC0_MISC+20:
1008 case MSR_IA32_UCODE_REV:
1009 case MSR_IA32_EBL_CR_POWERON:
1010 case MSR_IA32_DEBUGCTLMSR:
1011 case MSR_IA32_LASTBRANCHFROMIP:
1012 case MSR_IA32_LASTBRANCHTOIP:
1013 case MSR_IA32_LASTINTFROMIP:
1014 case MSR_IA32_LASTINTTOIP:
1018 data = 0x500 | KVM_NR_VAR_MTRR;
1020 case 0x200 ... 0x2ff:
1021 return get_msr_mtrr(vcpu, msr, pdata);
1022 case 0xcd: /* fsb frequency */
1025 case MSR_IA32_APICBASE:
1026 data = kvm_get_apic_base(vcpu);
1028 case MSR_IA32_MISC_ENABLE:
1029 data = vcpu->arch.ia32_misc_enable_msr;
1031 case MSR_IA32_PERF_STATUS:
1032 /* TSC increment by tick */
1034 /* CPU multiplier */
1035 data |= (((uint64_t)4ULL) << 40);
1038 data = vcpu->arch.shadow_efer;
1040 case MSR_KVM_WALL_CLOCK:
1041 data = vcpu->kvm->arch.wall_clock;
1043 case MSR_KVM_SYSTEM_TIME:
1044 data = vcpu->arch.time;
1047 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1053 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1056 * Read or write a bunch of msrs. All parameters are kernel addresses.
1058 * @return number of msrs set successfully.
1060 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1061 struct kvm_msr_entry *entries,
1062 int (*do_msr)(struct kvm_vcpu *vcpu,
1063 unsigned index, u64 *data))
1069 down_read(&vcpu->kvm->slots_lock);
1070 for (i = 0; i < msrs->nmsrs; ++i)
1071 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1073 up_read(&vcpu->kvm->slots_lock);
1081 * Read or write a bunch of msrs. Parameters are user addresses.
1083 * @return number of msrs set successfully.
1085 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1086 int (*do_msr)(struct kvm_vcpu *vcpu,
1087 unsigned index, u64 *data),
1090 struct kvm_msrs msrs;
1091 struct kvm_msr_entry *entries;
1096 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1100 if (msrs.nmsrs >= MAX_IO_MSRS)
1104 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1105 entries = vmalloc(size);
1110 if (copy_from_user(entries, user_msrs->entries, size))
1113 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1118 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1129 int kvm_dev_ioctl_check_extension(long ext)
1134 case KVM_CAP_IRQCHIP:
1136 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1137 case KVM_CAP_USER_MEMORY:
1138 case KVM_CAP_SET_TSS_ADDR:
1139 case KVM_CAP_EXT_CPUID:
1140 case KVM_CAP_CLOCKSOURCE:
1142 case KVM_CAP_NOP_IO_DELAY:
1143 case KVM_CAP_MP_STATE:
1144 case KVM_CAP_SYNC_MMU:
1147 case KVM_CAP_COALESCED_MMIO:
1148 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1151 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1153 case KVM_CAP_NR_VCPUS:
1156 case KVM_CAP_NR_MEMSLOTS:
1157 r = KVM_MEMORY_SLOTS;
1159 case KVM_CAP_PV_MMU:
1163 r = intel_iommu_found();
1173 long kvm_arch_dev_ioctl(struct file *filp,
1174 unsigned int ioctl, unsigned long arg)
1176 void __user *argp = (void __user *)arg;
1180 case KVM_GET_MSR_INDEX_LIST: {
1181 struct kvm_msr_list __user *user_msr_list = argp;
1182 struct kvm_msr_list msr_list;
1186 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1189 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1190 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1193 if (n < num_msrs_to_save)
1196 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1197 num_msrs_to_save * sizeof(u32)))
1199 if (copy_to_user(user_msr_list->indices
1200 + num_msrs_to_save * sizeof(u32),
1202 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1207 case KVM_GET_SUPPORTED_CPUID: {
1208 struct kvm_cpuid2 __user *cpuid_arg = argp;
1209 struct kvm_cpuid2 cpuid;
1212 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1214 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1215 cpuid_arg->entries);
1220 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1232 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1234 kvm_x86_ops->vcpu_load(vcpu, cpu);
1235 kvm_write_guest_time(vcpu);
1238 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1240 kvm_x86_ops->vcpu_put(vcpu);
1241 kvm_put_guest_fpu(vcpu);
1244 static int is_efer_nx(void)
1248 rdmsrl(MSR_EFER, efer);
1249 return efer & EFER_NX;
1252 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1255 struct kvm_cpuid_entry2 *e, *entry;
1258 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1259 e = &vcpu->arch.cpuid_entries[i];
1260 if (e->function == 0x80000001) {
1265 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1266 entry->edx &= ~(1 << 20);
1267 printk(KERN_INFO "kvm: guest NX capability removed\n");
1271 /* when an old userspace process fills a new kernel module */
1272 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1273 struct kvm_cpuid *cpuid,
1274 struct kvm_cpuid_entry __user *entries)
1277 struct kvm_cpuid_entry *cpuid_entries;
1280 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1283 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1287 if (copy_from_user(cpuid_entries, entries,
1288 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1290 for (i = 0; i < cpuid->nent; i++) {
1291 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1292 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1293 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1294 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1295 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1296 vcpu->arch.cpuid_entries[i].index = 0;
1297 vcpu->arch.cpuid_entries[i].flags = 0;
1298 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1299 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1300 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1302 vcpu->arch.cpuid_nent = cpuid->nent;
1303 cpuid_fix_nx_cap(vcpu);
1307 vfree(cpuid_entries);
1312 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1313 struct kvm_cpuid2 *cpuid,
1314 struct kvm_cpuid_entry2 __user *entries)
1319 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1322 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1323 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1325 vcpu->arch.cpuid_nent = cpuid->nent;
1332 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1333 struct kvm_cpuid2 *cpuid,
1334 struct kvm_cpuid_entry2 __user *entries)
1339 if (cpuid->nent < vcpu->arch.cpuid_nent)
1342 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1343 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1348 cpuid->nent = vcpu->arch.cpuid_nent;
1352 static inline u32 bit(int bitno)
1354 return 1 << (bitno & 31);
1357 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1360 entry->function = function;
1361 entry->index = index;
1362 cpuid_count(entry->function, entry->index,
1363 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1367 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1368 u32 index, int *nent, int maxnent)
1370 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1371 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1372 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1373 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1374 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1375 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1376 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1377 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1378 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1379 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1380 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1381 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1382 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1383 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1384 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1385 bit(X86_FEATURE_PGE) |
1386 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1387 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1388 bit(X86_FEATURE_SYSCALL) |
1389 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1390 #ifdef CONFIG_X86_64
1391 bit(X86_FEATURE_LM) |
1393 bit(X86_FEATURE_MMXEXT) |
1394 bit(X86_FEATURE_3DNOWEXT) |
1395 bit(X86_FEATURE_3DNOW);
1396 const u32 kvm_supported_word3_x86_features =
1397 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1398 const u32 kvm_supported_word6_x86_features =
1399 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1401 /* all func 2 cpuid_count() should be called on the same cpu */
1403 do_cpuid_1_ent(entry, function, index);
1408 entry->eax = min(entry->eax, (u32)0xb);
1411 entry->edx &= kvm_supported_word0_x86_features;
1412 entry->ecx &= kvm_supported_word3_x86_features;
1414 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1415 * may return different values. This forces us to get_cpu() before
1416 * issuing the first command, and also to emulate this annoying behavior
1417 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1419 int t, times = entry->eax & 0xff;
1421 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1422 for (t = 1; t < times && *nent < maxnent; ++t) {
1423 do_cpuid_1_ent(&entry[t], function, 0);
1424 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1429 /* function 4 and 0xb have additional index. */
1433 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1434 /* read more entries until cache_type is zero */
1435 for (i = 1; *nent < maxnent; ++i) {
1436 cache_type = entry[i - 1].eax & 0x1f;
1439 do_cpuid_1_ent(&entry[i], function, i);
1441 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1449 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1450 /* read more entries until level_type is zero */
1451 for (i = 1; *nent < maxnent; ++i) {
1452 level_type = entry[i - 1].ecx & 0xff;
1455 do_cpuid_1_ent(&entry[i], function, i);
1457 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1463 entry->eax = min(entry->eax, 0x8000001a);
1466 entry->edx &= kvm_supported_word1_x86_features;
1467 entry->ecx &= kvm_supported_word6_x86_features;
1473 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1474 struct kvm_cpuid_entry2 __user *entries)
1476 struct kvm_cpuid_entry2 *cpuid_entries;
1477 int limit, nent = 0, r = -E2BIG;
1480 if (cpuid->nent < 1)
1483 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1487 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1488 limit = cpuid_entries[0].eax;
1489 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1490 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1491 &nent, cpuid->nent);
1493 if (nent >= cpuid->nent)
1496 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1497 limit = cpuid_entries[nent - 1].eax;
1498 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1499 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1500 &nent, cpuid->nent);
1502 if (copy_to_user(entries, cpuid_entries,
1503 nent * sizeof(struct kvm_cpuid_entry2)))
1509 vfree(cpuid_entries);
1514 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1515 struct kvm_lapic_state *s)
1518 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1524 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1525 struct kvm_lapic_state *s)
1528 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1529 kvm_apic_post_state_restore(vcpu);
1535 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1536 struct kvm_interrupt *irq)
1538 if (irq->irq < 0 || irq->irq >= 256)
1540 if (irqchip_in_kernel(vcpu->kvm))
1544 set_bit(irq->irq, vcpu->arch.irq_pending);
1545 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1552 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1553 struct kvm_tpr_access_ctl *tac)
1557 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1561 long kvm_arch_vcpu_ioctl(struct file *filp,
1562 unsigned int ioctl, unsigned long arg)
1564 struct kvm_vcpu *vcpu = filp->private_data;
1565 void __user *argp = (void __user *)arg;
1567 struct kvm_lapic_state *lapic = NULL;
1570 case KVM_GET_LAPIC: {
1571 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1576 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1580 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1585 case KVM_SET_LAPIC: {
1586 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1591 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1593 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1599 case KVM_INTERRUPT: {
1600 struct kvm_interrupt irq;
1603 if (copy_from_user(&irq, argp, sizeof irq))
1605 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1611 case KVM_SET_CPUID: {
1612 struct kvm_cpuid __user *cpuid_arg = argp;
1613 struct kvm_cpuid cpuid;
1616 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1618 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1623 case KVM_SET_CPUID2: {
1624 struct kvm_cpuid2 __user *cpuid_arg = argp;
1625 struct kvm_cpuid2 cpuid;
1628 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1630 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1631 cpuid_arg->entries);
1636 case KVM_GET_CPUID2: {
1637 struct kvm_cpuid2 __user *cpuid_arg = argp;
1638 struct kvm_cpuid2 cpuid;
1641 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1643 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1644 cpuid_arg->entries);
1648 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1654 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1657 r = msr_io(vcpu, argp, do_set_msr, 0);
1659 case KVM_TPR_ACCESS_REPORTING: {
1660 struct kvm_tpr_access_ctl tac;
1663 if (copy_from_user(&tac, argp, sizeof tac))
1665 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1669 if (copy_to_user(argp, &tac, sizeof tac))
1674 case KVM_SET_VAPIC_ADDR: {
1675 struct kvm_vapic_addr va;
1678 if (!irqchip_in_kernel(vcpu->kvm))
1681 if (copy_from_user(&va, argp, sizeof va))
1684 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1696 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1700 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1702 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1706 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1707 u32 kvm_nr_mmu_pages)
1709 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1712 down_write(&kvm->slots_lock);
1714 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1715 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1717 up_write(&kvm->slots_lock);
1721 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1723 return kvm->arch.n_alloc_mmu_pages;
1726 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1729 struct kvm_mem_alias *alias;
1731 for (i = 0; i < kvm->arch.naliases; ++i) {
1732 alias = &kvm->arch.aliases[i];
1733 if (gfn >= alias->base_gfn
1734 && gfn < alias->base_gfn + alias->npages)
1735 return alias->target_gfn + gfn - alias->base_gfn;
1741 * Set a new alias region. Aliases map a portion of physical memory into
1742 * another portion. This is useful for memory windows, for example the PC
1745 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1746 struct kvm_memory_alias *alias)
1749 struct kvm_mem_alias *p;
1752 /* General sanity checks */
1753 if (alias->memory_size & (PAGE_SIZE - 1))
1755 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1757 if (alias->slot >= KVM_ALIAS_SLOTS)
1759 if (alias->guest_phys_addr + alias->memory_size
1760 < alias->guest_phys_addr)
1762 if (alias->target_phys_addr + alias->memory_size
1763 < alias->target_phys_addr)
1766 down_write(&kvm->slots_lock);
1767 spin_lock(&kvm->mmu_lock);
1769 p = &kvm->arch.aliases[alias->slot];
1770 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1771 p->npages = alias->memory_size >> PAGE_SHIFT;
1772 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1774 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1775 if (kvm->arch.aliases[n - 1].npages)
1777 kvm->arch.naliases = n;
1779 spin_unlock(&kvm->mmu_lock);
1780 kvm_mmu_zap_all(kvm);
1782 up_write(&kvm->slots_lock);
1790 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1795 switch (chip->chip_id) {
1796 case KVM_IRQCHIP_PIC_MASTER:
1797 memcpy(&chip->chip.pic,
1798 &pic_irqchip(kvm)->pics[0],
1799 sizeof(struct kvm_pic_state));
1801 case KVM_IRQCHIP_PIC_SLAVE:
1802 memcpy(&chip->chip.pic,
1803 &pic_irqchip(kvm)->pics[1],
1804 sizeof(struct kvm_pic_state));
1806 case KVM_IRQCHIP_IOAPIC:
1807 memcpy(&chip->chip.ioapic,
1808 ioapic_irqchip(kvm),
1809 sizeof(struct kvm_ioapic_state));
1818 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1823 switch (chip->chip_id) {
1824 case KVM_IRQCHIP_PIC_MASTER:
1825 memcpy(&pic_irqchip(kvm)->pics[0],
1827 sizeof(struct kvm_pic_state));
1829 case KVM_IRQCHIP_PIC_SLAVE:
1830 memcpy(&pic_irqchip(kvm)->pics[1],
1832 sizeof(struct kvm_pic_state));
1834 case KVM_IRQCHIP_IOAPIC:
1835 memcpy(ioapic_irqchip(kvm),
1837 sizeof(struct kvm_ioapic_state));
1843 kvm_pic_update_irq(pic_irqchip(kvm));
1847 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1851 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1855 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1859 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1860 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1865 * Get (and clear) the dirty memory log for a memory slot.
1867 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1868 struct kvm_dirty_log *log)
1872 struct kvm_memory_slot *memslot;
1875 down_write(&kvm->slots_lock);
1877 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1881 /* If nothing is dirty, don't bother messing with page tables. */
1883 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1884 kvm_flush_remote_tlbs(kvm);
1885 memslot = &kvm->memslots[log->slot];
1886 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1887 memset(memslot->dirty_bitmap, 0, n);
1891 up_write(&kvm->slots_lock);
1895 long kvm_arch_vm_ioctl(struct file *filp,
1896 unsigned int ioctl, unsigned long arg)
1898 struct kvm *kvm = filp->private_data;
1899 void __user *argp = (void __user *)arg;
1902 * This union makes it completely explicit to gcc-3.x
1903 * that these two variables' stack usage should be
1904 * combined, not added together.
1907 struct kvm_pit_state ps;
1908 struct kvm_memory_alias alias;
1912 case KVM_SET_TSS_ADDR:
1913 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1917 case KVM_SET_MEMORY_REGION: {
1918 struct kvm_memory_region kvm_mem;
1919 struct kvm_userspace_memory_region kvm_userspace_mem;
1922 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1924 kvm_userspace_mem.slot = kvm_mem.slot;
1925 kvm_userspace_mem.flags = kvm_mem.flags;
1926 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1927 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1928 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1933 case KVM_SET_NR_MMU_PAGES:
1934 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1938 case KVM_GET_NR_MMU_PAGES:
1939 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1941 case KVM_SET_MEMORY_ALIAS:
1943 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1945 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1949 case KVM_CREATE_IRQCHIP:
1951 kvm->arch.vpic = kvm_create_pic(kvm);
1952 if (kvm->arch.vpic) {
1953 r = kvm_ioapic_init(kvm);
1955 kfree(kvm->arch.vpic);
1956 kvm->arch.vpic = NULL;
1962 case KVM_CREATE_PIT:
1964 kvm->arch.vpit = kvm_create_pit(kvm);
1968 case KVM_IRQ_LINE: {
1969 struct kvm_irq_level irq_event;
1972 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1974 if (irqchip_in_kernel(kvm)) {
1975 mutex_lock(&kvm->lock);
1976 kvm_set_irq(kvm, irq_event.irq, irq_event.level);
1977 mutex_unlock(&kvm->lock);
1982 case KVM_GET_IRQCHIP: {
1983 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1984 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1990 if (copy_from_user(chip, argp, sizeof *chip))
1991 goto get_irqchip_out;
1993 if (!irqchip_in_kernel(kvm))
1994 goto get_irqchip_out;
1995 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1997 goto get_irqchip_out;
1999 if (copy_to_user(argp, chip, sizeof *chip))
2000 goto get_irqchip_out;
2008 case KVM_SET_IRQCHIP: {
2009 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2010 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2016 if (copy_from_user(chip, argp, sizeof *chip))
2017 goto set_irqchip_out;
2019 if (!irqchip_in_kernel(kvm))
2020 goto set_irqchip_out;
2021 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2023 goto set_irqchip_out;
2031 case KVM_ASSIGN_PCI_DEVICE: {
2032 struct kvm_assigned_pci_dev assigned_dev;
2035 if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
2037 r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
2042 case KVM_ASSIGN_IRQ: {
2043 struct kvm_assigned_irq assigned_irq;
2046 if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
2048 r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
2055 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2058 if (!kvm->arch.vpit)
2060 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2064 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2071 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2074 if (!kvm->arch.vpit)
2076 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2089 static void kvm_init_msr_list(void)
2094 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2095 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2098 msrs_to_save[j] = msrs_to_save[i];
2101 num_msrs_to_save = j;
2105 * Only apic need an MMIO device hook, so shortcut now..
2107 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2108 gpa_t addr, int len,
2111 struct kvm_io_device *dev;
2113 if (vcpu->arch.apic) {
2114 dev = &vcpu->arch.apic->dev;
2115 if (dev->in_range(dev, addr, len, is_write))
2122 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2123 gpa_t addr, int len,
2126 struct kvm_io_device *dev;
2128 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2130 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2135 int emulator_read_std(unsigned long addr,
2138 struct kvm_vcpu *vcpu)
2141 int r = X86EMUL_CONTINUE;
2144 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2145 unsigned offset = addr & (PAGE_SIZE-1);
2146 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
2149 if (gpa == UNMAPPED_GVA) {
2150 r = X86EMUL_PROPAGATE_FAULT;
2153 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
2155 r = X86EMUL_UNHANDLEABLE;
2166 EXPORT_SYMBOL_GPL(emulator_read_std);
2168 static int emulator_read_emulated(unsigned long addr,
2171 struct kvm_vcpu *vcpu)
2173 struct kvm_io_device *mmio_dev;
2176 if (vcpu->mmio_read_completed) {
2177 memcpy(val, vcpu->mmio_data, bytes);
2178 vcpu->mmio_read_completed = 0;
2179 return X86EMUL_CONTINUE;
2182 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2184 /* For APIC access vmexit */
2185 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2188 if (emulator_read_std(addr, val, bytes, vcpu)
2189 == X86EMUL_CONTINUE)
2190 return X86EMUL_CONTINUE;
2191 if (gpa == UNMAPPED_GVA)
2192 return X86EMUL_PROPAGATE_FAULT;
2196 * Is this MMIO handled locally?
2198 mutex_lock(&vcpu->kvm->lock);
2199 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2201 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2202 mutex_unlock(&vcpu->kvm->lock);
2203 return X86EMUL_CONTINUE;
2205 mutex_unlock(&vcpu->kvm->lock);
2207 vcpu->mmio_needed = 1;
2208 vcpu->mmio_phys_addr = gpa;
2209 vcpu->mmio_size = bytes;
2210 vcpu->mmio_is_write = 0;
2212 return X86EMUL_UNHANDLEABLE;
2215 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2216 const void *val, int bytes)
2220 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2223 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
2227 static int emulator_write_emulated_onepage(unsigned long addr,
2230 struct kvm_vcpu *vcpu)
2232 struct kvm_io_device *mmio_dev;
2235 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2237 if (gpa == UNMAPPED_GVA) {
2238 kvm_inject_page_fault(vcpu, addr, 2);
2239 return X86EMUL_PROPAGATE_FAULT;
2242 /* For APIC access vmexit */
2243 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2246 if (emulator_write_phys(vcpu, gpa, val, bytes))
2247 return X86EMUL_CONTINUE;
2251 * Is this MMIO handled locally?
2253 mutex_lock(&vcpu->kvm->lock);
2254 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2256 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2257 mutex_unlock(&vcpu->kvm->lock);
2258 return X86EMUL_CONTINUE;
2260 mutex_unlock(&vcpu->kvm->lock);
2262 vcpu->mmio_needed = 1;
2263 vcpu->mmio_phys_addr = gpa;
2264 vcpu->mmio_size = bytes;
2265 vcpu->mmio_is_write = 1;
2266 memcpy(vcpu->mmio_data, val, bytes);
2268 return X86EMUL_CONTINUE;
2271 int emulator_write_emulated(unsigned long addr,
2274 struct kvm_vcpu *vcpu)
2276 /* Crossing a page boundary? */
2277 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2280 now = -addr & ~PAGE_MASK;
2281 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2282 if (rc != X86EMUL_CONTINUE)
2288 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2290 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2292 static int emulator_cmpxchg_emulated(unsigned long addr,
2296 struct kvm_vcpu *vcpu)
2298 static int reported;
2302 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2304 #ifndef CONFIG_X86_64
2305 /* guests cmpxchg8b have to be emulated atomically */
2312 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2314 if (gpa == UNMAPPED_GVA ||
2315 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2318 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2323 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2325 kaddr = kmap_atomic(page, KM_USER0);
2326 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2327 kunmap_atomic(kaddr, KM_USER0);
2328 kvm_release_page_dirty(page);
2333 return emulator_write_emulated(addr, new, bytes, vcpu);
2336 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2338 return kvm_x86_ops->get_segment_base(vcpu, seg);
2341 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2343 return X86EMUL_CONTINUE;
2346 int emulate_clts(struct kvm_vcpu *vcpu)
2348 KVMTRACE_0D(CLTS, vcpu, handler);
2349 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2350 return X86EMUL_CONTINUE;
2353 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2355 struct kvm_vcpu *vcpu = ctxt->vcpu;
2359 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2360 return X86EMUL_CONTINUE;
2362 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2363 return X86EMUL_UNHANDLEABLE;
2367 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2369 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2372 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2374 /* FIXME: better handling */
2375 return X86EMUL_UNHANDLEABLE;
2377 return X86EMUL_CONTINUE;
2380 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2383 unsigned long rip = kvm_rip_read(vcpu);
2384 unsigned long rip_linear;
2386 if (!printk_ratelimit())
2389 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2391 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2393 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2394 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2396 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2398 static struct x86_emulate_ops emulate_ops = {
2399 .read_std = emulator_read_std,
2400 .read_emulated = emulator_read_emulated,
2401 .write_emulated = emulator_write_emulated,
2402 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2405 static void cache_all_regs(struct kvm_vcpu *vcpu)
2407 kvm_register_read(vcpu, VCPU_REGS_RAX);
2408 kvm_register_read(vcpu, VCPU_REGS_RSP);
2409 kvm_register_read(vcpu, VCPU_REGS_RIP);
2410 vcpu->arch.regs_dirty = ~0;
2413 int emulate_instruction(struct kvm_vcpu *vcpu,
2414 struct kvm_run *run,
2420 struct decode_cache *c;
2422 kvm_clear_exception_queue(vcpu);
2423 vcpu->arch.mmio_fault_cr2 = cr2;
2425 * TODO: fix x86_emulate.c to use guest_read/write_register
2426 * instead of direct ->regs accesses, can save hundred cycles
2427 * on Intel for instructions that don't read/change RSP, for
2430 cache_all_regs(vcpu);
2432 vcpu->mmio_is_write = 0;
2433 vcpu->arch.pio.string = 0;
2435 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2437 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2439 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2440 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2441 vcpu->arch.emulate_ctxt.mode =
2442 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2443 ? X86EMUL_MODE_REAL : cs_l
2444 ? X86EMUL_MODE_PROT64 : cs_db
2445 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2447 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2449 /* Reject the instructions other than VMCALL/VMMCALL when
2450 * try to emulate invalid opcode */
2451 c = &vcpu->arch.emulate_ctxt.decode;
2452 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2453 (!(c->twobyte && c->b == 0x01 &&
2454 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2455 c->modrm_mod == 3 && c->modrm_rm == 1)))
2456 return EMULATE_FAIL;
2458 ++vcpu->stat.insn_emulation;
2460 ++vcpu->stat.insn_emulation_fail;
2461 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2462 return EMULATE_DONE;
2463 return EMULATE_FAIL;
2467 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2469 if (vcpu->arch.pio.string)
2470 return EMULATE_DO_MMIO;
2472 if ((r || vcpu->mmio_is_write) && run) {
2473 run->exit_reason = KVM_EXIT_MMIO;
2474 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2475 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2476 run->mmio.len = vcpu->mmio_size;
2477 run->mmio.is_write = vcpu->mmio_is_write;
2481 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2482 return EMULATE_DONE;
2483 if (!vcpu->mmio_needed) {
2484 kvm_report_emulation_failure(vcpu, "mmio");
2485 return EMULATE_FAIL;
2487 return EMULATE_DO_MMIO;
2490 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2492 if (vcpu->mmio_is_write) {
2493 vcpu->mmio_needed = 0;
2494 return EMULATE_DO_MMIO;
2497 return EMULATE_DONE;
2499 EXPORT_SYMBOL_GPL(emulate_instruction);
2501 static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2505 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2506 if (vcpu->arch.pio.guest_pages[i]) {
2507 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2508 vcpu->arch.pio.guest_pages[i] = NULL;
2512 static int pio_copy_data(struct kvm_vcpu *vcpu)
2514 void *p = vcpu->arch.pio_data;
2517 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
2519 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
2522 free_pio_guest_pages(vcpu);
2525 q += vcpu->arch.pio.guest_page_offset;
2526 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2527 if (vcpu->arch.pio.in)
2528 memcpy(q, p, bytes);
2530 memcpy(p, q, bytes);
2531 q -= vcpu->arch.pio.guest_page_offset;
2533 free_pio_guest_pages(vcpu);
2537 int complete_pio(struct kvm_vcpu *vcpu)
2539 struct kvm_pio_request *io = &vcpu->arch.pio;
2546 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2547 memcpy(&val, vcpu->arch.pio_data, io->size);
2548 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2552 r = pio_copy_data(vcpu);
2559 delta *= io->cur_count;
2561 * The size of the register should really depend on
2562 * current address size.
2564 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2566 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2572 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2574 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2576 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2578 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2582 io->count -= io->cur_count;
2588 static void kernel_pio(struct kvm_io_device *pio_dev,
2589 struct kvm_vcpu *vcpu,
2592 /* TODO: String I/O for in kernel device */
2594 mutex_lock(&vcpu->kvm->lock);
2595 if (vcpu->arch.pio.in)
2596 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2597 vcpu->arch.pio.size,
2600 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2601 vcpu->arch.pio.size,
2603 mutex_unlock(&vcpu->kvm->lock);
2606 static void pio_string_write(struct kvm_io_device *pio_dev,
2607 struct kvm_vcpu *vcpu)
2609 struct kvm_pio_request *io = &vcpu->arch.pio;
2610 void *pd = vcpu->arch.pio_data;
2613 mutex_lock(&vcpu->kvm->lock);
2614 for (i = 0; i < io->cur_count; i++) {
2615 kvm_iodevice_write(pio_dev, io->port,
2620 mutex_unlock(&vcpu->kvm->lock);
2623 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2624 gpa_t addr, int len,
2627 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2630 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2631 int size, unsigned port)
2633 struct kvm_io_device *pio_dev;
2636 vcpu->run->exit_reason = KVM_EXIT_IO;
2637 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2638 vcpu->run->io.size = vcpu->arch.pio.size = size;
2639 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2640 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2641 vcpu->run->io.port = vcpu->arch.pio.port = port;
2642 vcpu->arch.pio.in = in;
2643 vcpu->arch.pio.string = 0;
2644 vcpu->arch.pio.down = 0;
2645 vcpu->arch.pio.guest_page_offset = 0;
2646 vcpu->arch.pio.rep = 0;
2648 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2649 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2652 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2655 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2656 memcpy(vcpu->arch.pio_data, &val, 4);
2658 kvm_x86_ops->skip_emulated_instruction(vcpu);
2660 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2662 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2668 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2670 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2671 int size, unsigned long count, int down,
2672 gva_t address, int rep, unsigned port)
2674 unsigned now, in_page;
2678 struct kvm_io_device *pio_dev;
2680 vcpu->run->exit_reason = KVM_EXIT_IO;
2681 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2682 vcpu->run->io.size = vcpu->arch.pio.size = size;
2683 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2684 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2685 vcpu->run->io.port = vcpu->arch.pio.port = port;
2686 vcpu->arch.pio.in = in;
2687 vcpu->arch.pio.string = 1;
2688 vcpu->arch.pio.down = down;
2689 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2690 vcpu->arch.pio.rep = rep;
2692 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2693 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2696 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2700 kvm_x86_ops->skip_emulated_instruction(vcpu);
2705 in_page = PAGE_SIZE - offset_in_page(address);
2707 in_page = offset_in_page(address) + size;
2708 now = min(count, (unsigned long)in_page / size);
2711 * String I/O straddles page boundary. Pin two guest pages
2712 * so that we satisfy atomicity constraints. Do just one
2713 * transaction to avoid complexity.
2720 * String I/O in reverse. Yuck. Kill the guest, fix later.
2722 pr_unimpl(vcpu, "guest string pio down\n");
2723 kvm_inject_gp(vcpu, 0);
2726 vcpu->run->io.count = now;
2727 vcpu->arch.pio.cur_count = now;
2729 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2730 kvm_x86_ops->skip_emulated_instruction(vcpu);
2732 for (i = 0; i < nr_pages; ++i) {
2733 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
2734 vcpu->arch.pio.guest_pages[i] = page;
2736 kvm_inject_gp(vcpu, 0);
2737 free_pio_guest_pages(vcpu);
2742 pio_dev = vcpu_find_pio_dev(vcpu, port,
2743 vcpu->arch.pio.cur_count,
2744 !vcpu->arch.pio.in);
2745 if (!vcpu->arch.pio.in) {
2746 /* string PIO write */
2747 ret = pio_copy_data(vcpu);
2748 if (ret >= 0 && pio_dev) {
2749 pio_string_write(pio_dev, vcpu);
2751 if (vcpu->arch.pio.count == 0)
2755 pr_unimpl(vcpu, "no string pio read support yet, "
2756 "port %x size %d count %ld\n",
2761 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2763 int kvm_arch_init(void *opaque)
2766 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2769 printk(KERN_ERR "kvm: already loaded the other module\n");
2774 if (!ops->cpu_has_kvm_support()) {
2775 printk(KERN_ERR "kvm: no hardware support\n");
2779 if (ops->disabled_by_bios()) {
2780 printk(KERN_ERR "kvm: disabled by bios\n");
2785 r = kvm_mmu_module_init();
2789 kvm_init_msr_list();
2792 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2793 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2794 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2795 PT_DIRTY_MASK, PT64_NX_MASK, 0);
2802 void kvm_arch_exit(void)
2805 kvm_mmu_module_exit();
2808 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2810 ++vcpu->stat.halt_exits;
2811 KVMTRACE_0D(HLT, vcpu, handler);
2812 if (irqchip_in_kernel(vcpu->kvm)) {
2813 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2816 vcpu->run->exit_reason = KVM_EXIT_HLT;
2820 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2822 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2825 if (is_long_mode(vcpu))
2828 return a0 | ((gpa_t)a1 << 32);
2831 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2833 unsigned long nr, a0, a1, a2, a3, ret;
2836 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2837 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2838 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2839 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2840 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2842 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2844 if (!is_long_mode(vcpu)) {
2853 case KVM_HC_VAPIC_POLL_IRQ:
2857 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2863 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2864 ++vcpu->stat.hypercalls;
2867 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2869 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2871 char instruction[3];
2873 unsigned long rip = kvm_rip_read(vcpu);
2877 * Blow out the MMU to ensure that no other VCPU has an active mapping
2878 * to ensure that the updated hypercall appears atomically across all
2881 kvm_mmu_zap_all(vcpu->kvm);
2883 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2884 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2885 != X86EMUL_CONTINUE)
2891 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2893 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2896 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2898 struct descriptor_table dt = { limit, base };
2900 kvm_x86_ops->set_gdt(vcpu, &dt);
2903 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2905 struct descriptor_table dt = { limit, base };
2907 kvm_x86_ops->set_idt(vcpu, &dt);
2910 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2911 unsigned long *rflags)
2913 kvm_lmsw(vcpu, msw);
2914 *rflags = kvm_x86_ops->get_rflags(vcpu);
2917 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2919 unsigned long value;
2921 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2924 value = vcpu->arch.cr0;
2927 value = vcpu->arch.cr2;
2930 value = vcpu->arch.cr3;
2933 value = vcpu->arch.cr4;
2936 value = kvm_get_cr8(vcpu);
2939 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2942 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2943 (u32)((u64)value >> 32), handler);
2948 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2949 unsigned long *rflags)
2951 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2952 (u32)((u64)val >> 32), handler);
2956 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2957 *rflags = kvm_x86_ops->get_rflags(vcpu);
2960 vcpu->arch.cr2 = val;
2963 kvm_set_cr3(vcpu, val);
2966 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2969 kvm_set_cr8(vcpu, val & 0xfUL);
2972 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2976 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2978 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2979 int j, nent = vcpu->arch.cpuid_nent;
2981 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2982 /* when no next entry is found, the current entry[i] is reselected */
2983 for (j = i + 1; j == i; j = (j + 1) % nent) {
2984 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2985 if (ej->function == e->function) {
2986 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2990 return 0; /* silence gcc, even though control never reaches here */
2993 /* find an entry with matching function, matching index (if needed), and that
2994 * should be read next (if it's stateful) */
2995 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2996 u32 function, u32 index)
2998 if (e->function != function)
3000 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3002 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3003 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3008 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3011 u32 function, index;
3012 struct kvm_cpuid_entry2 *e, *best;
3014 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3015 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3016 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3017 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3018 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3019 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3021 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3022 e = &vcpu->arch.cpuid_entries[i];
3023 if (is_matching_cpuid_entry(e, function, index)) {
3024 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3025 move_to_next_stateful_cpuid_entry(vcpu, i);
3030 * Both basic or both extended?
3032 if (((e->function ^ function) & 0x80000000) == 0)
3033 if (!best || e->function > best->function)
3037 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3038 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3039 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3040 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3042 kvm_x86_ops->skip_emulated_instruction(vcpu);
3043 KVMTRACE_5D(CPUID, vcpu, function,
3044 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3045 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3046 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3047 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3049 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3052 * Check if userspace requested an interrupt window, and that the
3053 * interrupt window is open.
3055 * No need to exit to userspace if we already have an interrupt queued.
3057 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3058 struct kvm_run *kvm_run)
3060 return (!vcpu->arch.irq_summary &&
3061 kvm_run->request_interrupt_window &&
3062 vcpu->arch.interrupt_window_open &&
3063 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3066 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3067 struct kvm_run *kvm_run)
3069 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3070 kvm_run->cr8 = kvm_get_cr8(vcpu);
3071 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3072 if (irqchip_in_kernel(vcpu->kvm))
3073 kvm_run->ready_for_interrupt_injection = 1;
3075 kvm_run->ready_for_interrupt_injection =
3076 (vcpu->arch.interrupt_window_open &&
3077 vcpu->arch.irq_summary == 0);
3080 static void vapic_enter(struct kvm_vcpu *vcpu)
3082 struct kvm_lapic *apic = vcpu->arch.apic;
3085 if (!apic || !apic->vapic_addr)
3088 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3090 vcpu->arch.apic->vapic_page = page;
3093 static void vapic_exit(struct kvm_vcpu *vcpu)
3095 struct kvm_lapic *apic = vcpu->arch.apic;
3097 if (!apic || !apic->vapic_addr)
3100 down_read(&vcpu->kvm->slots_lock);
3101 kvm_release_page_dirty(apic->vapic_page);
3102 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3103 up_read(&vcpu->kvm->slots_lock);
3106 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3111 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3112 kvm_mmu_unload(vcpu);
3114 r = kvm_mmu_reload(vcpu);
3118 if (vcpu->requests) {
3119 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3120 __kvm_migrate_timers(vcpu);
3121 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3122 kvm_x86_ops->tlb_flush(vcpu);
3123 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3125 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3129 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3130 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3136 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3137 kvm_inject_pending_timer_irqs(vcpu);
3141 kvm_x86_ops->prepare_guest_switch(vcpu);
3142 kvm_load_guest_fpu(vcpu);
3144 local_irq_disable();
3146 if (vcpu->requests || need_resched() || signal_pending(current)) {
3153 if (vcpu->guest_debug.enabled)
3154 kvm_x86_ops->guest_debug_pre(vcpu);
3156 vcpu->guest_mode = 1;
3158 * Make sure that guest_mode assignment won't happen after
3159 * testing the pending IRQ vector bitmap.
3163 if (vcpu->arch.exception.pending)
3164 __queue_exception(vcpu);
3165 else if (irqchip_in_kernel(vcpu->kvm))
3166 kvm_x86_ops->inject_pending_irq(vcpu);
3168 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3170 kvm_lapic_sync_to_vapic(vcpu);
3172 up_read(&vcpu->kvm->slots_lock);
3177 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3178 kvm_x86_ops->run(vcpu, kvm_run);
3180 vcpu->guest_mode = 0;
3186 * We must have an instruction between local_irq_enable() and
3187 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3188 * the interrupt shadow. The stat.exits increment will do nicely.
3189 * But we need to prevent reordering, hence this barrier():
3197 down_read(&vcpu->kvm->slots_lock);
3200 * Profile KVM exit RIPs:
3202 if (unlikely(prof_on == KVM_PROFILING)) {
3203 unsigned long rip = kvm_rip_read(vcpu);
3204 profile_hit(KVM_PROFILING, (void *)rip);
3207 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3208 vcpu->arch.exception.pending = false;
3210 kvm_lapic_sync_from_vapic(vcpu);
3212 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3217 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3221 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3222 printk("vcpu %d received sipi with vector # %x\n",
3223 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3224 kvm_lapic_reset(vcpu);
3225 r = kvm_x86_ops->vcpu_reset(vcpu);
3228 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3231 down_read(&vcpu->kvm->slots_lock);
3236 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3237 r = vcpu_enter_guest(vcpu, kvm_run);
3239 up_read(&vcpu->kvm->slots_lock);
3240 kvm_vcpu_block(vcpu);
3241 down_read(&vcpu->kvm->slots_lock);
3242 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3243 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3244 vcpu->arch.mp_state =
3245 KVM_MP_STATE_RUNNABLE;
3246 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3251 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3253 kvm_run->exit_reason = KVM_EXIT_INTR;
3254 ++vcpu->stat.request_irq_exits;
3256 if (signal_pending(current)) {
3258 kvm_run->exit_reason = KVM_EXIT_INTR;
3259 ++vcpu->stat.signal_exits;
3261 if (need_resched()) {
3262 up_read(&vcpu->kvm->slots_lock);
3264 down_read(&vcpu->kvm->slots_lock);
3269 up_read(&vcpu->kvm->slots_lock);
3270 post_kvm_run_save(vcpu, kvm_run);
3277 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3284 if (vcpu->sigset_active)
3285 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3287 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3288 kvm_vcpu_block(vcpu);
3289 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3294 /* re-sync apic's tpr */
3295 if (!irqchip_in_kernel(vcpu->kvm))
3296 kvm_set_cr8(vcpu, kvm_run->cr8);
3298 if (vcpu->arch.pio.cur_count) {
3299 r = complete_pio(vcpu);
3303 #if CONFIG_HAS_IOMEM
3304 if (vcpu->mmio_needed) {
3305 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3306 vcpu->mmio_read_completed = 1;
3307 vcpu->mmio_needed = 0;
3309 down_read(&vcpu->kvm->slots_lock);
3310 r = emulate_instruction(vcpu, kvm_run,
3311 vcpu->arch.mmio_fault_cr2, 0,
3312 EMULTYPE_NO_DECODE);
3313 up_read(&vcpu->kvm->slots_lock);
3314 if (r == EMULATE_DO_MMIO) {
3316 * Read-modify-write. Back to userspace.
3323 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3324 kvm_register_write(vcpu, VCPU_REGS_RAX,
3325 kvm_run->hypercall.ret);
3327 r = __vcpu_run(vcpu, kvm_run);
3330 if (vcpu->sigset_active)
3331 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3337 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3341 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3342 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3343 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3344 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3345 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3346 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3347 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3348 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3349 #ifdef CONFIG_X86_64
3350 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3351 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3352 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3353 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3354 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3355 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3356 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3357 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3360 regs->rip = kvm_rip_read(vcpu);
3361 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3364 * Don't leak debug flags in case they were set for guest debugging
3366 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3367 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3374 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3378 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3379 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3380 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3381 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3382 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3383 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3384 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3385 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3386 #ifdef CONFIG_X86_64
3387 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3388 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3389 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3390 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3391 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3392 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3393 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3394 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3398 kvm_rip_write(vcpu, regs->rip);
3399 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3402 vcpu->arch.exception.pending = false;
3409 void kvm_get_segment(struct kvm_vcpu *vcpu,
3410 struct kvm_segment *var, int seg)
3412 kvm_x86_ops->get_segment(vcpu, var, seg);
3415 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3417 struct kvm_segment cs;
3419 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3423 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3425 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3426 struct kvm_sregs *sregs)
3428 struct descriptor_table dt;
3433 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3434 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3435 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3436 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3437 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3438 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3440 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3441 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3443 kvm_x86_ops->get_idt(vcpu, &dt);
3444 sregs->idt.limit = dt.limit;
3445 sregs->idt.base = dt.base;
3446 kvm_x86_ops->get_gdt(vcpu, &dt);
3447 sregs->gdt.limit = dt.limit;
3448 sregs->gdt.base = dt.base;
3450 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3451 sregs->cr0 = vcpu->arch.cr0;
3452 sregs->cr2 = vcpu->arch.cr2;
3453 sregs->cr3 = vcpu->arch.cr3;
3454 sregs->cr4 = vcpu->arch.cr4;
3455 sregs->cr8 = kvm_get_cr8(vcpu);
3456 sregs->efer = vcpu->arch.shadow_efer;
3457 sregs->apic_base = kvm_get_apic_base(vcpu);
3459 if (irqchip_in_kernel(vcpu->kvm)) {
3460 memset(sregs->interrupt_bitmap, 0,
3461 sizeof sregs->interrupt_bitmap);
3462 pending_vec = kvm_x86_ops->get_irq(vcpu);
3463 if (pending_vec >= 0)
3464 set_bit(pending_vec,
3465 (unsigned long *)sregs->interrupt_bitmap);
3467 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3468 sizeof sregs->interrupt_bitmap);
3475 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3476 struct kvm_mp_state *mp_state)
3479 mp_state->mp_state = vcpu->arch.mp_state;
3484 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3485 struct kvm_mp_state *mp_state)
3488 vcpu->arch.mp_state = mp_state->mp_state;
3493 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3494 struct kvm_segment *var, int seg)
3496 kvm_x86_ops->set_segment(vcpu, var, seg);
3499 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3500 struct kvm_segment *kvm_desct)
3502 kvm_desct->base = seg_desc->base0;
3503 kvm_desct->base |= seg_desc->base1 << 16;
3504 kvm_desct->base |= seg_desc->base2 << 24;
3505 kvm_desct->limit = seg_desc->limit0;
3506 kvm_desct->limit |= seg_desc->limit << 16;
3508 kvm_desct->limit <<= 12;
3509 kvm_desct->limit |= 0xfff;
3511 kvm_desct->selector = selector;
3512 kvm_desct->type = seg_desc->type;
3513 kvm_desct->present = seg_desc->p;
3514 kvm_desct->dpl = seg_desc->dpl;
3515 kvm_desct->db = seg_desc->d;
3516 kvm_desct->s = seg_desc->s;
3517 kvm_desct->l = seg_desc->l;
3518 kvm_desct->g = seg_desc->g;
3519 kvm_desct->avl = seg_desc->avl;
3521 kvm_desct->unusable = 1;
3523 kvm_desct->unusable = 0;
3524 kvm_desct->padding = 0;
3527 static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
3529 struct descriptor_table *dtable)
3531 if (selector & 1 << 2) {
3532 struct kvm_segment kvm_seg;
3534 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3536 if (kvm_seg.unusable)
3539 dtable->limit = kvm_seg.limit;
3540 dtable->base = kvm_seg.base;
3543 kvm_x86_ops->get_gdt(vcpu, dtable);
3546 /* allowed just for 8 bytes segments */
3547 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3548 struct desc_struct *seg_desc)
3551 struct descriptor_table dtable;
3552 u16 index = selector >> 3;
3554 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3556 if (dtable.limit < index * 8 + 7) {
3557 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3560 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3562 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3565 /* allowed just for 8 bytes segments */
3566 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3567 struct desc_struct *seg_desc)
3570 struct descriptor_table dtable;
3571 u16 index = selector >> 3;
3573 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3575 if (dtable.limit < index * 8 + 7)
3577 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3579 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3582 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3583 struct desc_struct *seg_desc)
3587 base_addr = seg_desc->base0;
3588 base_addr |= (seg_desc->base1 << 16);
3589 base_addr |= (seg_desc->base2 << 24);
3591 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3594 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3596 struct kvm_segment kvm_seg;
3598 kvm_get_segment(vcpu, &kvm_seg, seg);
3599 return kvm_seg.selector;
3602 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3604 struct kvm_segment *kvm_seg)
3606 struct desc_struct seg_desc;
3608 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3610 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3614 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3616 struct kvm_segment segvar = {
3617 .base = selector << 4,
3619 .selector = selector,
3630 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3634 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3635 int type_bits, int seg)
3637 struct kvm_segment kvm_seg;
3639 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3640 return kvm_load_realmode_segment(vcpu, selector, seg);
3641 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3643 kvm_seg.type |= type_bits;
3645 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3646 seg != VCPU_SREG_LDTR)
3648 kvm_seg.unusable = 1;
3650 kvm_set_segment(vcpu, &kvm_seg, seg);
3654 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3655 struct tss_segment_32 *tss)
3657 tss->cr3 = vcpu->arch.cr3;
3658 tss->eip = kvm_rip_read(vcpu);
3659 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3660 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3661 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3662 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3663 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3664 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3665 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3666 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3667 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3668 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3669 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3670 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3671 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3672 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3673 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3674 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3675 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3678 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3679 struct tss_segment_32 *tss)
3681 kvm_set_cr3(vcpu, tss->cr3);
3683 kvm_rip_write(vcpu, tss->eip);
3684 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3686 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3687 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3688 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3689 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3690 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3691 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3692 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3693 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3695 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3698 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3701 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3704 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3707 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3710 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3713 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3718 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3719 struct tss_segment_16 *tss)
3721 tss->ip = kvm_rip_read(vcpu);
3722 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3723 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3724 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3725 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3726 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3727 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3728 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3729 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3730 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3732 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3733 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3734 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3735 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3736 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3737 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3740 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3741 struct tss_segment_16 *tss)
3743 kvm_rip_write(vcpu, tss->ip);
3744 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3745 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3746 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3747 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3748 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3749 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3750 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3751 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3752 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3754 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3757 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3760 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3763 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3766 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3771 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3773 struct desc_struct *nseg_desc)
3775 struct tss_segment_16 tss_segment_16;
3778 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3779 sizeof tss_segment_16))
3782 save_state_to_tss16(vcpu, &tss_segment_16);
3784 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3785 sizeof tss_segment_16))
3788 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3789 &tss_segment_16, sizeof tss_segment_16))
3792 if (load_state_from_tss16(vcpu, &tss_segment_16))
3800 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3802 struct desc_struct *nseg_desc)
3804 struct tss_segment_32 tss_segment_32;
3807 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3808 sizeof tss_segment_32))
3811 save_state_to_tss32(vcpu, &tss_segment_32);
3813 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3814 sizeof tss_segment_32))
3817 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3818 &tss_segment_32, sizeof tss_segment_32))
3821 if (load_state_from_tss32(vcpu, &tss_segment_32))
3829 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3831 struct kvm_segment tr_seg;
3832 struct desc_struct cseg_desc;
3833 struct desc_struct nseg_desc;
3835 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3836 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3838 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3840 /* FIXME: Handle errors. Failure to read either TSS or their
3841 * descriptors should generate a pagefault.
3843 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3846 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3849 if (reason != TASK_SWITCH_IRET) {
3852 cpl = kvm_x86_ops->get_cpl(vcpu);
3853 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3854 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3859 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3860 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3864 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3865 cseg_desc.type &= ~(1 << 1); //clear the B flag
3866 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3869 if (reason == TASK_SWITCH_IRET) {
3870 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3871 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3874 kvm_x86_ops->skip_emulated_instruction(vcpu);
3876 if (nseg_desc.type & 8)
3877 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3880 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3883 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3884 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3885 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3888 if (reason != TASK_SWITCH_IRET) {
3889 nseg_desc.type |= (1 << 1);
3890 save_guest_segment_descriptor(vcpu, tss_selector,
3894 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3895 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3897 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3901 EXPORT_SYMBOL_GPL(kvm_task_switch);
3903 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3904 struct kvm_sregs *sregs)
3906 int mmu_reset_needed = 0;
3907 int i, pending_vec, max_bits;
3908 struct descriptor_table dt;
3912 dt.limit = sregs->idt.limit;
3913 dt.base = sregs->idt.base;
3914 kvm_x86_ops->set_idt(vcpu, &dt);
3915 dt.limit = sregs->gdt.limit;
3916 dt.base = sregs->gdt.base;
3917 kvm_x86_ops->set_gdt(vcpu, &dt);
3919 vcpu->arch.cr2 = sregs->cr2;
3920 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3921 vcpu->arch.cr3 = sregs->cr3;
3923 kvm_set_cr8(vcpu, sregs->cr8);
3925 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3926 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3927 kvm_set_apic_base(vcpu, sregs->apic_base);
3929 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3931 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3932 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3933 vcpu->arch.cr0 = sregs->cr0;
3935 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3936 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3937 if (!is_long_mode(vcpu) && is_pae(vcpu))
3938 load_pdptrs(vcpu, vcpu->arch.cr3);
3940 if (mmu_reset_needed)
3941 kvm_mmu_reset_context(vcpu);
3943 if (!irqchip_in_kernel(vcpu->kvm)) {
3944 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3945 sizeof vcpu->arch.irq_pending);
3946 vcpu->arch.irq_summary = 0;
3947 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3948 if (vcpu->arch.irq_pending[i])
3949 __set_bit(i, &vcpu->arch.irq_summary);
3951 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3952 pending_vec = find_first_bit(
3953 (const unsigned long *)sregs->interrupt_bitmap,
3955 /* Only pending external irq is handled here */
3956 if (pending_vec < max_bits) {
3957 kvm_x86_ops->set_irq(vcpu, pending_vec);
3958 pr_debug("Set back pending irq %d\n",
3963 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3964 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3965 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3966 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3967 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3968 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3970 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3971 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3973 /* Older userspace won't unhalt the vcpu on reset. */
3974 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3975 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3976 !(vcpu->arch.cr0 & X86_CR0_PE))
3977 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3984 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3985 struct kvm_debug_guest *dbg)
3991 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3999 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4000 * we have asm/x86/processor.h
4011 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4012 #ifdef CONFIG_X86_64
4013 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4015 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4020 * Translate a guest virtual address to a guest physical address.
4022 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4023 struct kvm_translation *tr)
4025 unsigned long vaddr = tr->linear_address;
4029 down_read(&vcpu->kvm->slots_lock);
4030 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4031 up_read(&vcpu->kvm->slots_lock);
4032 tr->physical_address = gpa;
4033 tr->valid = gpa != UNMAPPED_GVA;
4041 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4043 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4047 memcpy(fpu->fpr, fxsave->st_space, 128);
4048 fpu->fcw = fxsave->cwd;
4049 fpu->fsw = fxsave->swd;
4050 fpu->ftwx = fxsave->twd;
4051 fpu->last_opcode = fxsave->fop;
4052 fpu->last_ip = fxsave->rip;
4053 fpu->last_dp = fxsave->rdp;
4054 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4061 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4063 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4067 memcpy(fxsave->st_space, fpu->fpr, 128);
4068 fxsave->cwd = fpu->fcw;
4069 fxsave->swd = fpu->fsw;
4070 fxsave->twd = fpu->ftwx;
4071 fxsave->fop = fpu->last_opcode;
4072 fxsave->rip = fpu->last_ip;
4073 fxsave->rdp = fpu->last_dp;
4074 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4081 void fx_init(struct kvm_vcpu *vcpu)
4083 unsigned after_mxcsr_mask;
4086 * Touch the fpu the first time in non atomic context as if
4087 * this is the first fpu instruction the exception handler
4088 * will fire before the instruction returns and it'll have to
4089 * allocate ram with GFP_KERNEL.
4092 kvm_fx_save(&vcpu->arch.host_fx_image);
4094 /* Initialize guest FPU by resetting ours and saving into guest's */
4096 kvm_fx_save(&vcpu->arch.host_fx_image);
4098 kvm_fx_save(&vcpu->arch.guest_fx_image);
4099 kvm_fx_restore(&vcpu->arch.host_fx_image);
4102 vcpu->arch.cr0 |= X86_CR0_ET;
4103 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4104 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4105 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4106 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4108 EXPORT_SYMBOL_GPL(fx_init);
4110 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4112 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4115 vcpu->guest_fpu_loaded = 1;
4116 kvm_fx_save(&vcpu->arch.host_fx_image);
4117 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4119 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4121 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4123 if (!vcpu->guest_fpu_loaded)
4126 vcpu->guest_fpu_loaded = 0;
4127 kvm_fx_save(&vcpu->arch.guest_fx_image);
4128 kvm_fx_restore(&vcpu->arch.host_fx_image);
4129 ++vcpu->stat.fpu_reload;
4131 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4133 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4135 kvm_x86_ops->vcpu_free(vcpu);
4138 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4141 return kvm_x86_ops->vcpu_create(kvm, id);
4144 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4148 /* We do fxsave: this must be aligned. */
4149 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4152 r = kvm_arch_vcpu_reset(vcpu);
4154 r = kvm_mmu_setup(vcpu);
4161 kvm_x86_ops->vcpu_free(vcpu);
4165 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4168 kvm_mmu_unload(vcpu);
4171 kvm_x86_ops->vcpu_free(vcpu);
4174 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4176 return kvm_x86_ops->vcpu_reset(vcpu);
4179 void kvm_arch_hardware_enable(void *garbage)
4181 kvm_x86_ops->hardware_enable(garbage);
4184 void kvm_arch_hardware_disable(void *garbage)
4186 kvm_x86_ops->hardware_disable(garbage);
4189 int kvm_arch_hardware_setup(void)
4191 return kvm_x86_ops->hardware_setup();
4194 void kvm_arch_hardware_unsetup(void)
4196 kvm_x86_ops->hardware_unsetup();
4199 void kvm_arch_check_processor_compat(void *rtn)
4201 kvm_x86_ops->check_processor_compatibility(rtn);
4204 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4210 BUG_ON(vcpu->kvm == NULL);
4213 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4214 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4215 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4217 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4219 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4224 vcpu->arch.pio_data = page_address(page);
4226 r = kvm_mmu_create(vcpu);
4228 goto fail_free_pio_data;
4230 if (irqchip_in_kernel(kvm)) {
4231 r = kvm_create_lapic(vcpu);
4233 goto fail_mmu_destroy;
4239 kvm_mmu_destroy(vcpu);
4241 free_page((unsigned long)vcpu->arch.pio_data);
4246 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4248 kvm_free_lapic(vcpu);
4249 down_read(&vcpu->kvm->slots_lock);
4250 kvm_mmu_destroy(vcpu);
4251 up_read(&vcpu->kvm->slots_lock);
4252 free_page((unsigned long)vcpu->arch.pio_data);
4255 struct kvm *kvm_arch_create_vm(void)
4257 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4260 return ERR_PTR(-ENOMEM);
4262 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4263 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4268 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4271 kvm_mmu_unload(vcpu);
4275 static void kvm_free_vcpus(struct kvm *kvm)
4280 * Unpin any mmu pages first.
4282 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4284 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4285 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4286 if (kvm->vcpus[i]) {
4287 kvm_arch_vcpu_free(kvm->vcpus[i]);
4288 kvm->vcpus[i] = NULL;
4294 void kvm_arch_destroy_vm(struct kvm *kvm)
4296 kvm_iommu_unmap_guest(kvm);
4297 kvm_free_all_assigned_devices(kvm);
4299 kfree(kvm->arch.vpic);
4300 kfree(kvm->arch.vioapic);
4301 kvm_free_vcpus(kvm);
4302 kvm_free_physmem(kvm);
4303 if (kvm->arch.apic_access_page)
4304 put_page(kvm->arch.apic_access_page);
4305 if (kvm->arch.ept_identity_pagetable)
4306 put_page(kvm->arch.ept_identity_pagetable);
4310 int kvm_arch_set_memory_region(struct kvm *kvm,
4311 struct kvm_userspace_memory_region *mem,
4312 struct kvm_memory_slot old,
4315 int npages = mem->memory_size >> PAGE_SHIFT;
4316 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4318 /*To keep backward compatibility with older userspace,
4319 *x86 needs to hanlde !user_alloc case.
4322 if (npages && !old.rmap) {
4323 unsigned long userspace_addr;
4325 down_write(¤t->mm->mmap_sem);
4326 userspace_addr = do_mmap(NULL, 0,
4328 PROT_READ | PROT_WRITE,
4329 MAP_PRIVATE | MAP_ANONYMOUS,
4331 up_write(¤t->mm->mmap_sem);
4333 if (IS_ERR((void *)userspace_addr))
4334 return PTR_ERR((void *)userspace_addr);
4336 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4337 spin_lock(&kvm->mmu_lock);
4338 memslot->userspace_addr = userspace_addr;
4339 spin_unlock(&kvm->mmu_lock);
4341 if (!old.user_alloc && old.rmap) {
4344 down_write(¤t->mm->mmap_sem);
4345 ret = do_munmap(current->mm, old.userspace_addr,
4346 old.npages * PAGE_SIZE);
4347 up_write(¤t->mm->mmap_sem);
4350 "kvm_vm_ioctl_set_memory_region: "
4351 "failed to munmap memory\n");
4356 if (!kvm->arch.n_requested_mmu_pages) {
4357 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4358 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4361 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4362 kvm_flush_remote_tlbs(kvm);
4367 void kvm_arch_flush_shadow(struct kvm *kvm)
4369 kvm_mmu_zap_all(kvm);
4372 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4374 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4375 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
4378 static void vcpu_kick_intr(void *info)
4381 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4382 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4386 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4388 int ipi_pcpu = vcpu->cpu;
4389 int cpu = get_cpu();
4391 if (waitqueue_active(&vcpu->wq)) {
4392 wake_up_interruptible(&vcpu->wq);
4393 ++vcpu->stat.halt_wakeup;
4396 * We may be called synchronously with irqs disabled in guest mode,
4397 * So need not to call smp_call_function_single() in that case.
4399 if (vcpu->guest_mode && vcpu->cpu != cpu)
4400 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);