2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
11 * This file handles the architecture-dependent parts of initialization
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/screen_info.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/bootmem.h>
31 #include <linux/module.h>
32 #include <asm/processor.h>
33 #include <linux/console.h>
34 #include <linux/seq_file.h>
35 #include <linux/crash_dump.h>
36 #include <linux/root_dev.h>
37 #include <linux/pci.h>
38 #include <linux/acpi.h>
39 #include <linux/kallsyms.h>
40 #include <linux/edd.h>
41 #include <linux/mmzone.h>
42 #include <linux/kexec.h>
43 #include <linux/cpufreq.h>
44 #include <linux/dmi.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/ctype.h>
49 #include <asm/uaccess.h>
50 #include <asm/system.h>
55 #include <video/edid.h>
58 #include <asm/mpspec.h>
59 #include <asm/mmu_context.h>
60 #include <asm/bootsetup.h>
61 #include <asm/proto.h>
62 #include <asm/setup.h>
63 #include <asm/mach_apic.h>
65 #include <asm/sections.h>
72 struct cpuinfo_x86 boot_cpu_data __read_mostly;
73 EXPORT_SYMBOL(boot_cpu_data);
75 unsigned long mmu_cr4_features;
78 EXPORT_SYMBOL(acpi_disabled);
80 int acpi_numa __initdata;
82 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
85 unsigned long saved_video_mode;
91 char dmi_alloc_data[DMI_MAX_DATA];
96 struct screen_info screen_info;
97 EXPORT_SYMBOL(screen_info);
98 struct sys_desc_table_struct {
99 unsigned short length;
100 unsigned char table[0];
103 struct edid_info edid_info;
104 EXPORT_SYMBOL_GPL(edid_info);
107 extern int root_mountflags;
109 char command_line[COMMAND_LINE_SIZE];
111 struct resource standard_io_resources[] = {
112 { .name = "dma1", .start = 0x00, .end = 0x1f,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "pic1", .start = 0x20, .end = 0x21,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "timer0", .start = 0x40, .end = 0x43,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "timer1", .start = 0x50, .end = 0x53,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "keyboard", .start = 0x60, .end = 0x6f,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "pic2", .start = 0xa0, .end = 0xa1,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "dma2", .start = 0xc0, .end = 0xdf,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
128 { .name = "fpu", .start = 0xf0, .end = 0xff,
129 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
132 #define STANDARD_IO_RESOURCES \
133 (sizeof standard_io_resources / sizeof standard_io_resources[0])
135 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
137 struct resource data_resource = {
138 .name = "Kernel data",
141 .flags = IORESOURCE_RAM,
143 struct resource code_resource = {
144 .name = "Kernel code",
147 .flags = IORESOURCE_RAM,
150 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
152 static struct resource system_rom_resource = {
153 .name = "System ROM",
156 .flags = IORESOURCE_ROM,
159 static struct resource extension_rom_resource = {
160 .name = "Extension ROM",
163 .flags = IORESOURCE_ROM,
166 static struct resource adapter_rom_resources[] = {
167 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM },
177 { .name = "Adapter ROM", .start = 0, .end = 0,
178 .flags = IORESOURCE_ROM }
181 #define ADAPTER_ROM_RESOURCES \
182 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
184 static struct resource video_rom_resource = {
188 .flags = IORESOURCE_ROM,
191 static struct resource video_ram_resource = {
192 .name = "Video RAM area",
195 .flags = IORESOURCE_RAM,
198 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
200 static int __init romchecksum(unsigned char *rom, unsigned long length)
202 unsigned char *p, sum = 0;
204 for (p = rom; p < rom + length; p++)
209 static void __init probe_roms(void)
211 unsigned long start, length, upper;
216 upper = adapter_rom_resources[0].start;
217 for (start = video_rom_resource.start; start < upper; start += 2048) {
218 rom = isa_bus_to_virt(start);
219 if (!romsignature(rom))
222 video_rom_resource.start = start;
224 /* 0 < length <= 0x7f * 512, historically */
225 length = rom[2] * 512;
227 /* if checksum okay, trust length byte */
228 if (length && romchecksum(rom, length))
229 video_rom_resource.end = start + length - 1;
231 request_resource(&iomem_resource, &video_rom_resource);
235 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
240 request_resource(&iomem_resource, &system_rom_resource);
241 upper = system_rom_resource.start;
243 /* check for extension rom (ignore length byte!) */
244 rom = isa_bus_to_virt(extension_rom_resource.start);
245 if (romsignature(rom)) {
246 length = extension_rom_resource.end - extension_rom_resource.start + 1;
247 if (romchecksum(rom, length)) {
248 request_resource(&iomem_resource, &extension_rom_resource);
249 upper = extension_rom_resource.start;
253 /* check for adapter roms on 2k boundaries */
254 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
255 rom = isa_bus_to_virt(start);
256 if (!romsignature(rom))
259 /* 0 < length <= 0x7f * 512, historically */
260 length = rom[2] * 512;
262 /* but accept any length that fits if checksum okay */
263 if (!length || start + length > upper || !romchecksum(rom, length))
266 adapter_rom_resources[i].start = start;
267 adapter_rom_resources[i].end = start + length - 1;
268 request_resource(&iomem_resource, &adapter_rom_resources[i]);
270 start = adapter_rom_resources[i++].end & ~2047UL;
274 #ifdef CONFIG_PROC_VMCORE
275 /* elfcorehdr= specifies the location of elf core header
276 * stored by the crashed kernel. This option will be passed
277 * by kexec loader to the capture kernel.
279 static int __init setup_elfcorehdr(char *arg)
284 elfcorehdr_addr = memparse(arg, &end);
285 return end > arg ? 0 : -EINVAL;
287 early_param("elfcorehdr", setup_elfcorehdr);
292 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
294 unsigned long bootmap_size, bootmap;
296 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
297 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
299 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
300 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
301 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
302 reserve_bootmem(bootmap, bootmap_size);
306 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
308 #ifdef CONFIG_EDD_MODULE
312 * copy_edd() - Copy the BIOS EDD information
313 * from boot_params into a safe place.
316 static inline void copy_edd(void)
318 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
319 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
320 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
321 edd.edd_info_nr = EDD_NR;
324 static inline void copy_edd(void)
329 #define EBDA_ADDR_POINTER 0x40E
331 unsigned __initdata ebda_addr;
332 unsigned __initdata ebda_size;
334 static void discover_ebda(void)
337 * there is a real-mode segmented pointer pointing to the
338 * 4K EBDA area at 0x40E
340 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
343 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
345 /* Round EBDA up to pages */
349 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
350 if (ebda_size > 64*1024)
354 void __init setup_arch(char **cmdline_p)
356 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
357 screen_info = SCREEN_INFO;
358 edid_info = EDID_INFO;
359 saved_video_mode = SAVED_VIDEO_MODE;
360 bootloader_type = LOADER_TYPE;
362 #ifdef CONFIG_BLK_DEV_RAM
363 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
364 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
365 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
367 setup_memory_region();
370 if (!MOUNT_ROOT_RDONLY)
371 root_mountflags &= ~MS_RDONLY;
372 init_mm.start_code = (unsigned long) &_text;
373 init_mm.end_code = (unsigned long) &_etext;
374 init_mm.end_data = (unsigned long) &_edata;
375 init_mm.brk = (unsigned long) &_end;
377 code_resource.start = virt_to_phys(&_text);
378 code_resource.end = virt_to_phys(&_etext)-1;
379 data_resource.start = virt_to_phys(&_etext);
380 data_resource.end = virt_to_phys(&_edata)-1;
382 early_identify_cpu(&boot_cpu_data);
384 strlcpy(command_line, saved_command_line, COMMAND_LINE_SIZE);
385 *cmdline_p = command_line;
389 finish_e820_parsing();
392 * partially used pages are not usable - thus
393 * we are rounding upwards:
395 end_pfn = e820_end_of_ram();
396 num_physpages = end_pfn;
402 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
410 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
411 * Call this early for SRAT node setup.
413 acpi_boot_table_init();
416 /* How many end-of-memory variables you have, grandma! */
417 max_low_pfn = end_pfn;
419 high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1;
421 #ifdef CONFIG_ACPI_NUMA
423 * Parse SRAT to discover nodes.
429 numa_initmem_init(0, end_pfn);
431 contig_initmem_init(0, end_pfn);
434 /* Reserve direct mapping */
435 reserve_bootmem_generic(table_start << PAGE_SHIFT,
436 (table_end - table_start) << PAGE_SHIFT);
439 reserve_bootmem_generic(__pa_symbol(&_text),
440 __pa_symbol(&_end) - __pa_symbol(&_text));
443 * reserve physical page 0 - it's a special BIOS page on many boxes,
444 * enabling clean reboots, SMP operation, laptop functions.
446 reserve_bootmem_generic(0, PAGE_SIZE);
448 /* reserve ebda region */
450 reserve_bootmem_generic(ebda_addr, ebda_size);
454 * But first pinch a few for the stack/trampoline stuff
455 * FIXME: Don't need the extra page at 4K, but need to fix
456 * trampoline before removing it. (see the GDT stuff)
458 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
460 /* Reserve SMP trampoline */
461 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
464 #ifdef CONFIG_ACPI_SLEEP
466 * Reserve low memory region for sleep support.
468 acpi_reserve_bootmem();
471 * Find and reserve possible boot-time SMP configuration:
474 #ifdef CONFIG_BLK_DEV_INITRD
475 if (LOADER_TYPE && INITRD_START) {
476 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
477 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
479 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
480 initrd_end = initrd_start+INITRD_SIZE;
483 printk(KERN_ERR "initrd extends beyond end of memory "
484 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
485 (unsigned long)(INITRD_START + INITRD_SIZE),
486 (unsigned long)(end_pfn << PAGE_SHIFT));
492 if (crashk_res.start != crashk_res.end) {
493 reserve_bootmem_generic(crashk_res.start,
494 crashk_res.end - crashk_res.start + 1);
503 * set this early, so we dont allocate cpu0
504 * if MADT list doesnt list BSP first
505 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
507 cpu_set(0, cpu_present_map);
510 * Read APIC and some other early information from ACPI tables.
518 * get boot-time SMP configuration:
520 if (smp_found_config)
522 init_apic_mappings();
525 * Request address space for all standard RAM and ROM resources
526 * and also for regions reported as reserved by the e820.
529 e820_reserve_resources();
531 request_resource(&iomem_resource, &video_ram_resource);
535 /* request I/O space for devices used on all i[345]86 PCs */
536 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
537 request_resource(&ioport_resource, &standard_io_resources[i]);
543 #if defined(CONFIG_VGA_CONSOLE)
544 conswitchp = &vga_con;
545 #elif defined(CONFIG_DUMMY_CONSOLE)
546 conswitchp = &dummy_con;
551 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
555 if (c->extended_cpuid_level < 0x80000004)
558 v = (unsigned int *) c->x86_model_id;
559 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
560 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
561 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
562 c->x86_model_id[48] = 0;
567 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
569 unsigned int n, dummy, eax, ebx, ecx, edx;
571 n = c->extended_cpuid_level;
573 if (n >= 0x80000005) {
574 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
575 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
576 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
577 c->x86_cache_size=(ecx>>24)+(edx>>24);
578 /* On K8 L1 TLB is inclusive, so don't count it */
582 if (n >= 0x80000006) {
583 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
584 ecx = cpuid_ecx(0x80000006);
585 c->x86_cache_size = ecx >> 16;
586 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
588 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
589 c->x86_cache_size, ecx & 0xFF);
593 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
594 if (n >= 0x80000008) {
595 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
596 c->x86_virt_bits = (eax >> 8) & 0xff;
597 c->x86_phys_bits = eax & 0xff;
602 static int nearby_node(int apicid)
605 for (i = apicid - 1; i >= 0; i--) {
606 int node = apicid_to_node[i];
607 if (node != NUMA_NO_NODE && node_online(node))
610 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
611 int node = apicid_to_node[i];
612 if (node != NUMA_NO_NODE && node_online(node))
615 return first_node(node_online_map); /* Shouldn't happen */
620 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
621 * Assumes number of cores is a power of two.
623 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
628 int cpu = smp_processor_id();
630 unsigned apicid = hard_smp_processor_id();
632 unsigned ecx = cpuid_ecx(0x80000008);
634 c->x86_max_cores = (ecx & 0xff) + 1;
636 /* CPU telling us the core id bits shift? */
637 bits = (ecx >> 12) & 0xF;
639 /* Otherwise recompute */
641 while ((1 << bits) < c->x86_max_cores)
645 /* Low order bits define the core id (index of core in socket) */
646 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
647 /* Convert the APIC ID into the socket ID */
648 c->phys_proc_id = phys_pkg_id(bits);
651 node = c->phys_proc_id;
652 if (apicid_to_node[apicid] != NUMA_NO_NODE)
653 node = apicid_to_node[apicid];
654 if (!node_online(node)) {
655 /* Two possibilities here:
656 - The CPU is missing memory and no node was created.
657 In that case try picking one from a nearby CPU
658 - The APIC IDs differ from the HyperTransport node IDs
659 which the K8 northbridge parsing fills in.
660 Assume they are all increased by a constant offset,
661 but in the same order as the HT nodeids.
662 If that doesn't result in a usable node fall back to the
663 path for the previous case. */
664 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
665 if (ht_nodeid >= 0 &&
666 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
667 node = apicid_to_node[ht_nodeid];
668 /* Pick a nearby node */
669 if (!node_online(node))
670 node = nearby_node(apicid);
672 numa_set_node(cpu, node);
674 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
679 static void __init init_amd(struct cpuinfo_x86 *c)
687 * Disable TLB flush filter by setting HWCR.FFDIS on K8
688 * bit 6 of msr C001_0015
690 * Errata 63 for SH-B3 steppings
691 * Errata 122 for all steppings (F+ have it disabled by default)
694 rdmsrl(MSR_K8_HWCR, value);
696 wrmsrl(MSR_K8_HWCR, value);
700 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
701 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
702 clear_bit(0*32+31, &c->x86_capability);
704 /* On C+ stepping K8 rep microcode works well for copy/memset */
705 level = cpuid_eax(1);
706 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
707 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
709 /* Enable workaround for FXSAVE leak */
711 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
713 level = get_model_name(c);
717 /* Should distinguish Models here, but this is only
718 a fallback anyways. */
719 strcpy(c->x86_model_id, "Hammer");
723 display_cacheinfo(c);
725 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
726 if (c->x86_power & (1<<8))
727 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
729 /* Multi core CPU? */
730 if (c->extended_cpuid_level >= 0x80000008)
733 /* Fix cpuid4 emulation for more */
734 num_cache_leaves = 3;
737 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
740 u32 eax, ebx, ecx, edx;
741 int index_msb, core_bits;
743 cpuid(1, &eax, &ebx, &ecx, &edx);
746 if (!cpu_has(c, X86_FEATURE_HT))
748 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
751 smp_num_siblings = (ebx & 0xff0000) >> 16;
753 if (smp_num_siblings == 1) {
754 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
755 } else if (smp_num_siblings > 1 ) {
757 if (smp_num_siblings > NR_CPUS) {
758 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
759 smp_num_siblings = 1;
763 index_msb = get_count_order(smp_num_siblings);
764 c->phys_proc_id = phys_pkg_id(index_msb);
766 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
768 index_msb = get_count_order(smp_num_siblings) ;
770 core_bits = get_count_order(c->x86_max_cores);
772 c->cpu_core_id = phys_pkg_id(index_msb) &
773 ((1 << core_bits) - 1);
776 if ((c->x86_max_cores * smp_num_siblings) > 1) {
777 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
778 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
785 * find out the number of processor cores on the die
787 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
791 if (c->cpuid_level < 4)
794 cpuid_count(4, 0, &eax, &t, &t, &t);
797 return ((eax >> 26) + 1);
802 static void srat_detect_node(void)
806 int cpu = smp_processor_id();
807 int apicid = hard_smp_processor_id();
809 /* Don't do the funky fallback heuristics the AMD version employs
811 node = apicid_to_node[apicid];
812 if (node == NUMA_NO_NODE)
813 node = first_node(node_online_map);
814 numa_set_node(cpu, node);
817 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
821 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
826 init_intel_cacheinfo(c);
827 if (c->cpuid_level > 9 ) {
828 unsigned eax = cpuid_eax(10);
829 /* Check for version and the number of counters */
830 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
831 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
834 n = c->extended_cpuid_level;
835 if (n >= 0x80000008) {
836 unsigned eax = cpuid_eax(0x80000008);
837 c->x86_virt_bits = (eax >> 8) & 0xff;
838 c->x86_phys_bits = eax & 0xff;
839 /* CPUID workaround for Intel 0F34 CPU */
840 if (c->x86_vendor == X86_VENDOR_INTEL &&
841 c->x86 == 0xF && c->x86_model == 0x3 &&
843 c->x86_phys_bits = 36;
847 c->x86_cache_alignment = c->x86_clflush_size * 2;
848 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
849 (c->x86 == 0x6 && c->x86_model >= 0x0e))
850 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
851 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
852 c->x86_max_cores = intel_num_cpu_cores(c);
857 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
859 char *v = c->x86_vendor_id;
861 if (!strcmp(v, "AuthenticAMD"))
862 c->x86_vendor = X86_VENDOR_AMD;
863 else if (!strcmp(v, "GenuineIntel"))
864 c->x86_vendor = X86_VENDOR_INTEL;
866 c->x86_vendor = X86_VENDOR_UNKNOWN;
869 struct cpu_model_info {
872 char *model_names[16];
875 /* Do some early cpuid on the boot CPU to get some parameter that are
876 needed before check_bugs. Everything advanced is in identify_cpu
878 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
882 c->loops_per_jiffy = loops_per_jiffy;
883 c->x86_cache_size = -1;
884 c->x86_vendor = X86_VENDOR_UNKNOWN;
885 c->x86_model = c->x86_mask = 0; /* So far unknown... */
886 c->x86_vendor_id[0] = '\0'; /* Unset */
887 c->x86_model_id[0] = '\0'; /* Unset */
888 c->x86_clflush_size = 64;
889 c->x86_cache_alignment = c->x86_clflush_size;
890 c->x86_max_cores = 1;
891 c->extended_cpuid_level = 0;
892 memset(&c->x86_capability, 0, sizeof c->x86_capability);
894 /* Get vendor name */
895 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
896 (unsigned int *)&c->x86_vendor_id[0],
897 (unsigned int *)&c->x86_vendor_id[8],
898 (unsigned int *)&c->x86_vendor_id[4]);
902 /* Initialize the standard set of capabilities */
903 /* Note that the vendor-specific code below might override */
905 /* Intel-defined flags: level 0x00000001 */
906 if (c->cpuid_level >= 0x00000001) {
908 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
909 &c->x86_capability[0]);
910 c->x86 = (tfms >> 8) & 0xf;
911 c->x86_model = (tfms >> 4) & 0xf;
912 c->x86_mask = tfms & 0xf;
914 c->x86 += (tfms >> 20) & 0xff;
916 c->x86_model += ((tfms >> 16) & 0xF) << 4;
917 if (c->x86_capability[0] & (1<<19))
918 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
920 /* Have CPUID level 0 only - unheard of */
925 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
930 * This does the hard work of actually picking apart the CPU stuff...
932 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
937 early_identify_cpu(c);
939 /* AMD-defined flags: level 0x80000001 */
940 xlvl = cpuid_eax(0x80000000);
941 c->extended_cpuid_level = xlvl;
942 if ((xlvl & 0xffff0000) == 0x80000000) {
943 if (xlvl >= 0x80000001) {
944 c->x86_capability[1] = cpuid_edx(0x80000001);
945 c->x86_capability[6] = cpuid_ecx(0x80000001);
947 if (xlvl >= 0x80000004)
948 get_model_name(c); /* Default name */
951 /* Transmeta-defined flags: level 0x80860001 */
952 xlvl = cpuid_eax(0x80860000);
953 if ((xlvl & 0xffff0000) == 0x80860000) {
954 /* Don't set x86_cpuid_level here for now to not confuse. */
955 if (xlvl >= 0x80860001)
956 c->x86_capability[2] = cpuid_edx(0x80860001);
959 c->apicid = phys_pkg_id(0);
962 * Vendor-specific initialization. In this section we
963 * canonicalize the feature flags, meaning if there are
964 * features a certain CPU supports which CPUID doesn't
965 * tell us, CPUID claiming incorrect flags, or other bugs,
966 * we handle them here.
968 * At the end of this section, c->x86_capability better
969 * indicate the features this CPU genuinely supports!
971 switch (c->x86_vendor) {
976 case X86_VENDOR_INTEL:
980 case X86_VENDOR_UNKNOWN:
982 display_cacheinfo(c);
986 select_idle_routine(c);
990 * On SMP, boot_cpu_data holds the common feature set between
991 * all CPUs; so make sure that we indicate which features are
992 * common between the CPUs. The first time this routine gets
993 * executed, c == &boot_cpu_data.
995 if (c != &boot_cpu_data) {
996 /* AND the already accumulated flags with these */
997 for (i = 0 ; i < NCAPINTS ; i++)
998 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1001 #ifdef CONFIG_X86_MCE
1004 if (c == &boot_cpu_data)
1009 numa_add_cpu(smp_processor_id());
1014 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1016 if (c->x86_model_id[0])
1017 printk("%s", c->x86_model_id);
1019 if (c->x86_mask || c->cpuid_level >= 0)
1020 printk(" stepping %02x\n", c->x86_mask);
1026 * Get CPU information for use by the procfs.
1029 static int show_cpuinfo(struct seq_file *m, void *v)
1031 struct cpuinfo_x86 *c = v;
1034 * These flag bits must match the definitions in <asm/cpufeature.h>.
1035 * NULL means this bit is undefined or reserved; either way it doesn't
1036 * have meaning as far as Linux is concerned. Note that it's important
1037 * to realize there is a difference between this table and CPUID -- if
1038 * applications want to get the raw CPUID data, they should access
1039 * /dev/cpu/<cpu_nr>/cpuid instead.
1041 static char *x86_cap_flags[] = {
1043 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1044 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1045 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1046 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1049 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1050 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1051 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1052 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1054 /* Transmeta-defined */
1055 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1056 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1057 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1058 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1060 /* Other (Linux-defined) */
1061 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1062 "constant_tsc", NULL, NULL,
1063 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1064 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1065 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1067 /* Intel-defined (#2) */
1068 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1069 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1070 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1071 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1073 /* VIA/Cyrix/Centaur-defined */
1074 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1075 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1076 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1077 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1079 /* AMD-defined (#2) */
1080 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1081 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1082 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1083 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1085 static char *x86_power_flags[] = {
1086 "ts", /* temperature sensor */
1087 "fid", /* frequency id control */
1088 "vid", /* voltage id control */
1089 "ttp", /* thermal trip */
1093 /* nothing */ /* constant_tsc - moved to flags */
1098 if (!cpu_online(c-cpu_data))
1102 seq_printf(m,"processor\t: %u\n"
1104 "cpu family\t: %d\n"
1106 "model name\t: %s\n",
1107 (unsigned)(c-cpu_data),
1108 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1111 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1113 if (c->x86_mask || c->cpuid_level >= 0)
1114 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1116 seq_printf(m, "stepping\t: unknown\n");
1118 if (cpu_has(c,X86_FEATURE_TSC)) {
1119 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1122 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1123 freq / 1000, (freq % 1000));
1127 if (c->x86_cache_size >= 0)
1128 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1131 if (smp_num_siblings * c->x86_max_cores > 1) {
1132 int cpu = c - cpu_data;
1133 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1134 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1135 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1136 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1142 "fpu_exception\t: yes\n"
1143 "cpuid level\t: %d\n"
1150 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1151 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1152 seq_printf(m, " %s", x86_cap_flags[i]);
1155 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1156 c->loops_per_jiffy/(500000/HZ),
1157 (c->loops_per_jiffy/(5000/HZ)) % 100);
1159 if (c->x86_tlbsize > 0)
1160 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1161 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1162 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1164 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1165 c->x86_phys_bits, c->x86_virt_bits);
1167 seq_printf(m, "power management:");
1170 for (i = 0; i < 32; i++)
1171 if (c->x86_power & (1 << i)) {
1172 if (i < ARRAY_SIZE(x86_power_flags) &&
1174 seq_printf(m, "%s%s",
1175 x86_power_flags[i][0]?" ":"",
1176 x86_power_flags[i]);
1178 seq_printf(m, " [%d]", i);
1182 seq_printf(m, "\n\n");
1187 static void *c_start(struct seq_file *m, loff_t *pos)
1189 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1192 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1195 return c_start(m, pos);
1198 static void c_stop(struct seq_file *m, void *v)
1202 struct seq_operations cpuinfo_op = {
1206 .show = show_cpuinfo,
1209 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1210 #include <linux/platform_device.h>
1211 static __init int add_pcspkr(void)
1213 struct platform_device *pd;
1216 pd = platform_device_alloc("pcspkr", -1);
1220 ret = platform_device_add(pd);
1222 platform_device_put(pd);
1226 device_initcall(add_pcspkr);