2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
43 #include <asm/uaccess.h>
45 #include <acpi/acpi_bus.h>
46 #include <acpi/processor.h>
48 #define ACPI_PROCESSOR_COMPONENT 0x01000000
49 #define ACPI_PROCESSOR_CLASS "processor"
50 #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
51 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
52 ACPI_MODULE_NAME("acpi_processor")
53 #define ACPI_PROCESSOR_FILE_POWER "power"
54 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
55 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
56 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
57 static void (*pm_idle_save) (void) __read_mostly;
58 module_param(max_cstate, uint, 0644);
60 static unsigned int nocst __read_mostly;
61 module_param(nocst, uint, 0000);
64 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
65 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
66 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
67 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
68 * reduce history for more aggressive entry into C3
70 static unsigned int bm_history __read_mostly =
71 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
72 module_param(bm_history, uint, 0644);
73 /* --------------------------------------------------------------------------
75 -------------------------------------------------------------------------- */
78 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
79 * For now disable this. Probably a bug somewhere else.
81 * To skip this limit, boot/load with a large max_cstate limit.
83 static int set_max_cstate(struct dmi_system_id *id)
85 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
88 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
89 " Override with \"processor.max_cstate=%d\"\n", id->ident,
90 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
92 max_cstate = (long)id->driver_data;
97 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
98 callers to only run once -AK */
99 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
100 { set_max_cstate, "IBM ThinkPad R40e", {
101 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
102 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
103 { set_max_cstate, "IBM ThinkPad R40e", {
104 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
105 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
106 { set_max_cstate, "IBM ThinkPad R40e", {
107 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
108 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
109 { set_max_cstate, "IBM ThinkPad R40e", {
110 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
111 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
112 { set_max_cstate, "IBM ThinkPad R40e", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
114 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
115 { set_max_cstate, "IBM ThinkPad R40e", {
116 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
117 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
118 { set_max_cstate, "IBM ThinkPad R40e", {
119 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
120 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
121 { set_max_cstate, "IBM ThinkPad R40e", {
122 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
123 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
124 { set_max_cstate, "IBM ThinkPad R40e", {
125 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
126 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
127 { set_max_cstate, "IBM ThinkPad R40e", {
128 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
129 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
130 { set_max_cstate, "IBM ThinkPad R40e", {
131 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
132 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
133 { set_max_cstate, "IBM ThinkPad R40e", {
134 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
135 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
136 { set_max_cstate, "IBM ThinkPad R40e", {
137 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
138 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
139 { set_max_cstate, "IBM ThinkPad R40e", {
140 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
141 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
142 { set_max_cstate, "IBM ThinkPad R40e", {
143 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
144 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
145 { set_max_cstate, "IBM ThinkPad R40e", {
146 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
147 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
148 { set_max_cstate, "Medion 41700", {
149 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
150 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
151 { set_max_cstate, "Clevo 5600D", {
152 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
153 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
158 static inline u32 ticks_elapsed(u32 t1, u32 t2)
162 else if (!acpi_fadt.tmr_val_ext)
163 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
165 return ((0xFFFFFFFF - t1) + t2);
169 acpi_processor_power_activate(struct acpi_processor *pr,
170 struct acpi_processor_cx *new)
172 struct acpi_processor_cx *old;
177 old = pr->power.state;
180 old->promotion.count = 0;
181 new->demotion.count = 0;
183 /* Cleanup from old state. */
187 /* Disable bus master reload */
188 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
189 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
190 ACPI_MTX_DO_NOT_LOCK);
195 /* Prepare to use new state. */
198 /* Enable bus master reload */
199 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
200 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1,
201 ACPI_MTX_DO_NOT_LOCK);
205 pr->power.state = new;
210 static void acpi_safe_halt(void)
212 current_thread_info()->status &= ~TS_POLLING;
213 smp_mb__after_clear_bit();
216 current_thread_info()->status |= TS_POLLING;
219 static atomic_t c3_cpu_count;
221 static void acpi_processor_idle(void)
223 struct acpi_processor *pr = NULL;
224 struct acpi_processor_cx *cx = NULL;
225 struct acpi_processor_cx *next_state = NULL;
229 pr = processors[smp_processor_id()];
234 * Interrupts must be disabled during bus mastering calculations and
235 * for C2/C3 transitions.
240 * Check whether we truly need to go idle, or should
243 if (unlikely(need_resched())) {
248 cx = pr->power.state;
260 * Check for bus mastering activity (if required), record, and check
263 if (pr->flags.bm_check) {
265 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
271 /* if we didn't get called, assume there was busmaster activity */
274 pr->power.bm_activity |= 0x1;
275 pr->power.bm_activity <<= 1;
278 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
279 &bm_status, ACPI_MTX_DO_NOT_LOCK);
281 pr->power.bm_activity++;
282 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
283 1, ACPI_MTX_DO_NOT_LOCK);
286 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
287 * the true state of bus mastering activity; forcing us to
288 * manually check the BMIDEA bit of each IDE channel.
290 else if (errata.piix4.bmisx) {
291 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
292 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
293 pr->power.bm_activity++;
296 pr->power.bm_check_timestamp = jiffies;
299 * Apply bus mastering demotion policy. Automatically demote
300 * to avoid a faulty transition. Note that the processor
301 * won't enter a low-power state during this call (to this
302 * funciton) but should upon the next.
304 * TBD: A better policy might be to fallback to the demotion
305 * state (use it for this quantum only) istead of
306 * demoting -- and rely on duration as our sole demotion
307 * qualification. This may, however, introduce DMA
308 * issues (e.g. floppy DMA transfer overrun/underrun).
310 if (pr->power.bm_activity & cx->demotion.threshold.bm) {
312 next_state = cx->demotion.state;
317 #ifdef CONFIG_HOTPLUG_CPU
319 * Check for P_LVL2_UP flag before entering C2 and above on
320 * an SMP system. We do it here instead of doing it at _CST/P_LVL
321 * detection phase, to work cleanly with logical CPU hotplug.
323 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
324 !pr->flags.has_cst && !acpi_fadt.plvl2_up)
325 cx = &pr->power.states[ACPI_STATE_C1];
333 * Invoke the current Cx state to put the processor to sleep.
335 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
336 current_thread_info()->status &= ~TS_POLLING;
337 smp_mb__after_clear_bit();
338 if (need_resched()) {
339 current_thread_info()->status |= TS_POLLING;
350 * Use the appropriate idle routine, the one that would
351 * be used without acpi C-states.
359 * TBD: Can't get time duration while in C1, as resumes
360 * go to an ISR rather than here. Need to instrument
361 * base interrupt handler.
363 sleep_ticks = 0xFFFFFFFF;
367 /* Get start time (ticks) */
368 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
371 /* Dummy wait op - must do something useless after P_LVL2 read
372 because chipsets cannot guarantee that STPCLK# signal
373 gets asserted in time to freeze execution properly. */
374 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
375 /* Get end time (ticks) */
376 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
378 #ifdef CONFIG_GENERIC_TIME
379 /* TSC halts in C2, so notify users */
382 /* Re-enable interrupts */
384 current_thread_info()->status |= TS_POLLING;
385 /* Compute time (ticks) that we were actually asleep */
387 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
392 if (pr->flags.bm_check) {
393 if (atomic_inc_return(&c3_cpu_count) ==
396 * All CPUs are trying to go to C3
397 * Disable bus master arbitration
399 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
400 ACPI_MTX_DO_NOT_LOCK);
403 /* SMP with no shared cache... Invalidate cache */
404 ACPI_FLUSH_CPU_CACHE();
407 /* Get start time (ticks) */
408 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
411 /* Dummy wait op (see above) */
412 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
413 /* Get end time (ticks) */
414 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
415 if (pr->flags.bm_check) {
416 /* Enable bus master arbitration */
417 atomic_dec(&c3_cpu_count);
418 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
419 ACPI_MTX_DO_NOT_LOCK);
422 #ifdef CONFIG_GENERIC_TIME
423 /* TSC halts in C3, so notify users */
426 /* Re-enable interrupts */
428 current_thread_info()->status |= TS_POLLING;
429 /* Compute time (ticks) that we were actually asleep */
431 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
439 next_state = pr->power.state;
441 #ifdef CONFIG_HOTPLUG_CPU
442 /* Don't do promotion/demotion */
443 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
444 !pr->flags.has_cst && !acpi_fadt.plvl2_up) {
453 * Track the number of longs (time asleep is greater than threshold)
454 * and promote when the count threshold is reached. Note that bus
455 * mastering activity may prevent promotions.
456 * Do not promote above max_cstate.
458 if (cx->promotion.state &&
459 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
460 if (sleep_ticks > cx->promotion.threshold.ticks) {
461 cx->promotion.count++;
462 cx->demotion.count = 0;
463 if (cx->promotion.count >=
464 cx->promotion.threshold.count) {
465 if (pr->flags.bm_check) {
467 (pr->power.bm_activity & cx->
468 promotion.threshold.bm)) {
474 next_state = cx->promotion.state;
484 * Track the number of shorts (time asleep is less than time threshold)
485 * and demote when the usage threshold is reached.
487 if (cx->demotion.state) {
488 if (sleep_ticks < cx->demotion.threshold.ticks) {
489 cx->demotion.count++;
490 cx->promotion.count = 0;
491 if (cx->demotion.count >= cx->demotion.threshold.count) {
492 next_state = cx->demotion.state;
500 * Demote if current state exceeds max_cstate
502 if ((pr->power.state - pr->power.states) > max_cstate) {
503 if (cx->demotion.state)
504 next_state = cx->demotion.state;
510 * If we're going to start using a new Cx state we must clean up
511 * from the previous and prepare to use the new.
513 if (next_state != pr->power.state)
514 acpi_processor_power_activate(pr, next_state);
517 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
520 unsigned int state_is_set = 0;
521 struct acpi_processor_cx *lower = NULL;
522 struct acpi_processor_cx *higher = NULL;
523 struct acpi_processor_cx *cx;
530 * This function sets the default Cx state policy (OS idle handler).
531 * Our scheme is to promote quickly to C2 but more conservatively
532 * to C3. We're favoring C2 for its characteristics of low latency
533 * (quick response), good power savings, and ability to allow bus
534 * mastering activity. Note that the Cx state policy is completely
535 * customizable and can be altered dynamically.
539 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
540 cx = &pr->power.states[i];
545 pr->power.state = cx;
554 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
555 cx = &pr->power.states[i];
560 cx->demotion.state = lower;
561 cx->demotion.threshold.ticks = cx->latency_ticks;
562 cx->demotion.threshold.count = 1;
563 if (cx->type == ACPI_STATE_C3)
564 cx->demotion.threshold.bm = bm_history;
571 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
572 cx = &pr->power.states[i];
577 cx->promotion.state = higher;
578 cx->promotion.threshold.ticks = cx->latency_ticks;
579 if (cx->type >= ACPI_STATE_C2)
580 cx->promotion.threshold.count = 4;
582 cx->promotion.threshold.count = 10;
583 if (higher->type == ACPI_STATE_C3)
584 cx->promotion.threshold.bm = bm_history;
593 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
602 /* if info is obtained from pblk/fadt, type equals state */
603 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
604 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
606 #ifndef CONFIG_HOTPLUG_CPU
608 * Check for P_LVL2_UP flag before entering C2 and above on
611 if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up)
615 /* determine C2 and C3 address from pblk */
616 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
617 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
619 /* determine latencies from FADT */
620 pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat;
621 pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat;
623 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
624 "lvl2[0x%08x] lvl3[0x%08x]\n",
625 pr->power.states[ACPI_STATE_C2].address,
626 pr->power.states[ACPI_STATE_C3].address));
631 static int acpi_processor_get_power_info_default_c1(struct acpi_processor *pr)
634 /* Zero initialize all the C-states info. */
635 memset(pr->power.states, 0, sizeof(pr->power.states));
637 /* set the first C-State to C1 */
638 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
640 /* the C0 state only exists as a filler in our array,
641 * and all processors need to support C1 */
642 pr->power.states[ACPI_STATE_C0].valid = 1;
643 pr->power.states[ACPI_STATE_C1].valid = 1;
648 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
650 acpi_status status = 0;
654 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
655 union acpi_object *cst;
663 /* Zero initialize C2 onwards and prepare for fresh CST lookup */
664 for (i = 2; i < ACPI_PROCESSOR_MAX_POWER; i++)
665 memset(&(pr->power.states[i]), 0,
666 sizeof(struct acpi_processor_cx));
668 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
669 if (ACPI_FAILURE(status)) {
670 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
674 cst = (union acpi_object *)buffer.pointer;
676 /* There must be at least 2 elements */
677 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
678 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
683 count = cst->package.elements[0].integer.value;
685 /* Validate number of power states. */
686 if (count < 1 || count != cst->package.count - 1) {
687 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
692 /* Tell driver that at least _CST is supported. */
693 pr->flags.has_cst = 1;
695 for (i = 1; i <= count; i++) {
696 union acpi_object *element;
697 union acpi_object *obj;
698 struct acpi_power_register *reg;
699 struct acpi_processor_cx cx;
701 memset(&cx, 0, sizeof(cx));
703 element = (union acpi_object *)&(cst->package.elements[i]);
704 if (element->type != ACPI_TYPE_PACKAGE)
707 if (element->package.count != 4)
710 obj = (union acpi_object *)&(element->package.elements[0]);
712 if (obj->type != ACPI_TYPE_BUFFER)
715 reg = (struct acpi_power_register *)obj->buffer.pointer;
717 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
718 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
721 cx.address = (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) ?
724 /* There should be an easy way to extract an integer... */
725 obj = (union acpi_object *)&(element->package.elements[1]);
726 if (obj->type != ACPI_TYPE_INTEGER)
729 cx.type = obj->integer.value;
731 if ((cx.type != ACPI_STATE_C1) &&
732 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO))
735 if ((cx.type < ACPI_STATE_C2) || (cx.type > ACPI_STATE_C3))
738 obj = (union acpi_object *)&(element->package.elements[2]);
739 if (obj->type != ACPI_TYPE_INTEGER)
742 cx.latency = obj->integer.value;
744 obj = (union acpi_object *)&(element->package.elements[3]);
745 if (obj->type != ACPI_TYPE_INTEGER)
748 cx.power = obj->integer.value;
751 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
754 * We support total ACPI_PROCESSOR_MAX_POWER - 1
755 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
757 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
759 "Limiting number of power states to max (%d)\n",
760 ACPI_PROCESSOR_MAX_POWER);
762 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
767 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
770 /* Validate number of power states discovered */
771 if (current_count < 2)
775 acpi_os_free(buffer.pointer);
780 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
787 * C2 latency must be less than or equal to 100
790 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
791 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
792 "latency too large [%d]\n", cx->latency));
797 * Otherwise we've met all of our C2 requirements.
798 * Normalize the C2 latency to expidite policy
801 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
806 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
807 struct acpi_processor_cx *cx)
809 static int bm_check_flag;
816 * C3 latency must be less than or equal to 1000
819 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
820 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
821 "latency too large [%d]\n", cx->latency));
826 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
827 * DMA transfers are used by any ISA device to avoid livelock.
828 * Note that we could disable Type-F DMA (as recommended by
829 * the erratum), but this is known to disrupt certain ISA
830 * devices thus we take the conservative approach.
832 else if (errata.piix4.fdma) {
833 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
834 "C3 not supported on PIIX4 with Type-F DMA\n"));
838 /* All the logic here assumes flags.bm_check is same across all CPUs */
839 if (!bm_check_flag) {
840 /* Determine whether bm_check is needed based on CPU */
841 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
842 bm_check_flag = pr->flags.bm_check;
844 pr->flags.bm_check = bm_check_flag;
847 if (pr->flags.bm_check) {
848 /* bus mastering control is necessary */
849 if (!pr->flags.bm_control) {
850 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
851 "C3 support requires bus mastering control\n"));
856 * WBINVD should be set in fadt, for C3 state to be
857 * supported on when bm_check is not required.
859 if (acpi_fadt.wb_invd != 1) {
860 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
861 "Cache invalidation should work properly"
862 " for C3 to be enabled on SMP systems\n"));
865 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD,
866 0, ACPI_MTX_DO_NOT_LOCK);
870 * Otherwise we've met all of our C3 requirements.
871 * Normalize the C3 latency to expidite policy. Enable
872 * checking of bus mastering status (bm_check) so we can
873 * use this in our C3 policy
876 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
881 static int acpi_processor_power_verify(struct acpi_processor *pr)
884 unsigned int working = 0;
886 #ifdef ARCH_APICTIMER_STOPS_ON_C3
887 int timer_broadcast = 0;
888 cpumask_t mask = cpumask_of_cpu(pr->id);
889 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
892 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
893 struct acpi_processor_cx *cx = &pr->power.states[i];
901 acpi_processor_power_verify_c2(cx);
902 #ifdef ARCH_APICTIMER_STOPS_ON_C3
903 /* Some AMD systems fake C3 as C2, but still
904 have timer troubles */
906 boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
912 acpi_processor_power_verify_c3(pr, cx);
913 #ifdef ARCH_APICTIMER_STOPS_ON_C3
924 #ifdef ARCH_APICTIMER_STOPS_ON_C3
926 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
932 static int acpi_processor_get_power_info(struct acpi_processor *pr)
938 /* NOTE: the idle thread may not be running while calling
941 /* Adding C1 state */
942 acpi_processor_get_power_info_default_c1(pr);
943 result = acpi_processor_get_power_info_cst(pr);
944 if (result == -ENODEV)
945 acpi_processor_get_power_info_fadt(pr);
947 pr->power.count = acpi_processor_power_verify(pr);
952 * Now that we know which states are supported, set the default
953 * policy. Note that this policy can be changed dynamically
954 * (e.g. encourage deeper sleeps to conserve battery life when
957 result = acpi_processor_set_power_policy(pr);
962 * if one state of type C2 or C3 is available, mark this
963 * CPU as being "idle manageable"
965 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
966 if (pr->power.states[i].valid) {
968 if (pr->power.states[i].type >= ACPI_STATE_C2)
976 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
988 if (!pr->flags.power_setup_done)
991 /* Fall back to the default idle loop */
992 pm_idle = pm_idle_save;
993 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
996 result = acpi_processor_get_power_info(pr);
997 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
998 pm_idle = acpi_processor_idle;
1003 /* proc interface */
1005 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1007 struct acpi_processor *pr = (struct acpi_processor *)seq->private;
1014 seq_printf(seq, "active state: C%zd\n"
1016 "bus master activity: %08x\n",
1017 pr->power.state ? pr->power.state - pr->power.states : 0,
1018 max_cstate, (unsigned)pr->power.bm_activity);
1020 seq_puts(seq, "states:\n");
1022 for (i = 1; i <= pr->power.count; i++) {
1023 seq_printf(seq, " %cC%d: ",
1024 (&pr->power.states[i] ==
1025 pr->power.state ? '*' : ' '), i);
1027 if (!pr->power.states[i].valid) {
1028 seq_puts(seq, "<not supported>\n");
1032 switch (pr->power.states[i].type) {
1034 seq_printf(seq, "type[C1] ");
1037 seq_printf(seq, "type[C2] ");
1040 seq_printf(seq, "type[C3] ");
1043 seq_printf(seq, "type[--] ");
1047 if (pr->power.states[i].promotion.state)
1048 seq_printf(seq, "promotion[C%zd] ",
1049 (pr->power.states[i].promotion.state -
1052 seq_puts(seq, "promotion[--] ");
1054 if (pr->power.states[i].demotion.state)
1055 seq_printf(seq, "demotion[C%zd] ",
1056 (pr->power.states[i].demotion.state -
1059 seq_puts(seq, "demotion[--] ");
1061 seq_printf(seq, "latency[%03d] usage[%08d]\n",
1062 pr->power.states[i].latency,
1063 pr->power.states[i].usage);
1070 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1072 return single_open(file, acpi_processor_power_seq_show,
1076 static struct file_operations acpi_processor_power_fops = {
1077 .open = acpi_processor_power_open_fs,
1079 .llseek = seq_lseek,
1080 .release = single_release,
1083 int acpi_processor_power_init(struct acpi_processor *pr,
1084 struct acpi_device *device)
1086 acpi_status status = 0;
1087 static int first_run;
1088 struct proc_dir_entry *entry = NULL;
1093 dmi_check_system(processor_power_dmi_table);
1094 if (max_cstate < ACPI_C_STATES_MAX)
1096 "ACPI: processor limited to max C-state %d\n",
1104 if (acpi_fadt.cst_cnt && !nocst) {
1106 acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8);
1107 if (ACPI_FAILURE(status)) {
1108 ACPI_EXCEPTION((AE_INFO, status,
1109 "Notifying BIOS of _CST ability failed"));
1113 acpi_processor_get_power_info(pr);
1116 * Install the idle handler if processor power management is supported.
1117 * Note that we use previously set idle handler will be used on
1118 * platforms that only support C1.
1120 if ((pr->flags.power) && (!boot_option_idle_override)) {
1121 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1122 for (i = 1; i <= pr->power.count; i++)
1123 if (pr->power.states[i].valid)
1124 printk(" C%d[C%d]", i,
1125 pr->power.states[i].type);
1129 pm_idle_save = pm_idle;
1130 pm_idle = acpi_processor_idle;
1135 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1136 S_IRUGO, acpi_device_dir(device));
1140 entry->proc_fops = &acpi_processor_power_fops;
1141 entry->data = acpi_driver_data(device);
1142 entry->owner = THIS_MODULE;
1145 pr->flags.power_setup_done = 1;
1150 int acpi_processor_power_exit(struct acpi_processor *pr,
1151 struct acpi_device *device)
1154 pr->flags.power_setup_done = 0;
1156 if (acpi_device_dir(device))
1157 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1158 acpi_device_dir(device));
1160 /* Unregister the idle handler when processor #0 is removed. */
1162 pm_idle = pm_idle_save;
1165 * We are about to unload the current idle thread pm callback
1166 * (pm_idle), Wait for all processors to update cached/local
1167 * copies of pm_idle before proceeding.