2 * pata_via.c - VIA PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
7 * Most chipset documentation available under NDA only
10 * VIA VT82C561 - early design, uses ata_generic currently
11 * VIA VT82C576 - MWDMA, 33Mhz
12 * VIA VT82C586 - MWDMA, 33Mhz
13 * VIA VT82C586a - Added UDMA to 33Mhz
14 * VIA VT82C586b - UDMA33
15 * VIA VT82C596a - Nonfunctional UDMA66
16 * VIA VT82C596b - Working UDMA66
17 * VIA VT82C686 - Nonfunctional UDMA66
18 * VIA VT82C686a - Working UDMA66
19 * VIA VT82C686b - Updated to UDMA100
20 * VIA VT8231 - UDMA100
21 * VIA VT8233 - UDMA100
22 * VIA VT8233a - UDMA133
23 * VIA VT8233c - UDMA100
24 * VIA VT8235 - UDMA133
25 * VIA VT8237 - UDMA133
26 * VIA VT8237S - UDMA133
27 * VIA VT8251 - UDMA133
29 * Most registers remain compatible across chips. Others start reserved
30 * and acquire sensible semantics if set to 1 (eg cable detect). A few
31 * exceptions exist, notably around the FIFO settings.
33 * One additional quirk of the VIA design is that like ALi they use few
34 * PCI IDs for a lot of chips.
40 * VIA IDE driver for Linux. Supported southbridges:
42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
46 * Copyright (c) 2000-2002 Vojtech Pavlik
48 * Based on the work of:
55 #include <linux/kernel.h>
56 #include <linux/module.h>
57 #include <linux/pci.h>
58 #include <linux/init.h>
59 #include <linux/blkdev.h>
60 #include <linux/delay.h>
61 #include <scsi/scsi_host.h>
62 #include <linux/libata.h>
63 #include <linux/dmi.h>
65 #define DRV_NAME "pata_via"
66 #define DRV_VERSION "0.3.2"
69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
75 VIA_UDMA_NONE = 0x000,
80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
90 * VIA SouthBridge chips.
93 static const struct via_isa_bridge {
99 } via_isa_bridges[] = {
100 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
101 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
102 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
103 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
104 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
105 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
106 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
107 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
108 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
109 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
110 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
111 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
112 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
113 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
114 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
115 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
116 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
117 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
118 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
119 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
120 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
121 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
122 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
128 * Cable special cases
131 static struct dmi_system_id cable_dmi_table[] = {
133 .ident = "Acer Ferrari 3400",
135 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
136 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
142 static int via_cable_override(struct pci_dev *pdev)
145 if (dmi_check_system(cable_dmi_table))
147 /* Arima W730-K8/Targa Visionary 811/... */
148 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
155 * via_cable_detect - cable detection
158 * Perform cable detection. Actually for the VIA case the BIOS
159 * already did this for us. We read the values provided by the
160 * BIOS. If you are using an 8235 in a non-PC configuration you
161 * may need to update this code.
163 * Hotplug also impacts on this.
166 static int via_cable_detect(struct ata_port *ap) {
167 const struct via_isa_bridge *config = ap->host->private_data;
168 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
171 if (via_cable_override(pdev))
172 return ATA_CBL_PATA40_SHORT;
174 /* Early chips are 40 wire */
175 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
176 return ATA_CBL_PATA40;
177 /* UDMA 66 chips have only drive side logic */
178 else if((config->flags & VIA_UDMA) < VIA_UDMA_100)
179 return ATA_CBL_PATA_UNK;
180 /* UDMA 100 or later */
181 pci_read_config_dword(pdev, 0x50, &ata66);
182 /* Check both the drive cable reporting bits, we might not have
184 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
185 return ATA_CBL_PATA80;
186 return ATA_CBL_PATA40;
189 static int via_pre_reset(struct ata_port *ap, unsigned long deadline)
191 const struct via_isa_bridge *config = ap->host->private_data;
193 if (!(config->flags & VIA_NO_ENABLES)) {
194 static const struct pci_bits via_enable_bits[] = {
195 { 0x40, 1, 0x02, 0x02 },
196 { 0x40, 1, 0x01, 0x01 }
198 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
199 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
203 return ata_std_prereset(ap, deadline);
208 * via_error_handler - reset for VIA chips
211 * Handle the reset callback for the later chips with cable detect
214 static void via_error_handler(struct ata_port *ap)
216 ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
220 * via_do_set_mode - set initial PIO mode data
223 * @mode: ATA mode being programmed
224 * @tdiv: Clocks per PCI clock
225 * @set_ast: Set to program address setup
226 * @udma_type: UDMA mode/format of registers
228 * Program the VIA registers for DMA and PIO modes. Uses the ata timing
229 * support in order to compute modes.
231 * FIXME: Hotplug will require we serialize multiple mode changes
232 * on the two channels.
235 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
237 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
238 struct ata_device *peer = ata_dev_pair(adev);
239 struct ata_timing t, p;
240 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
241 unsigned long T = 1000000000 / via_clock;
242 unsigned long UT = T/tdiv;
244 int offset = 3 - (2*ap->port_no) - adev->devno;
246 /* Calculate the timing values we require */
247 ata_timing_compute(adev, mode, &t, T, UT);
249 /* We share 8bit timing so we must merge the constraints */
251 if (peer->pio_mode) {
252 ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
253 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
257 /* Address setup is programmable but breaks on UDMA133 setups */
259 u8 setup; /* 2 bits per drive */
260 int shift = 2 * offset;
262 pci_read_config_byte(pdev, 0x4C, &setup);
263 setup &= ~(3 << shift);
264 setup |= FIT(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
265 pci_write_config_byte(pdev, 0x4C, setup);
268 /* Load the PIO mode bits */
269 pci_write_config_byte(pdev, 0x4F - ap->port_no,
270 ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1));
271 pci_write_config_byte(pdev, 0x48 + offset,
272 ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1));
274 /* Load the UDMA bits according to type */
280 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03;
283 ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f;
286 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
289 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
293 /* Set UDMA unless device is not UDMA capable */
297 /* Get 80-wire cable detection bit */
298 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
299 cable80_status &= 0x10;
301 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
305 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
307 const struct via_isa_bridge *config = ap->host->private_data;
308 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
309 int mode = config->flags & VIA_UDMA;
310 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
311 static u8 udma[5] = { 0, 33, 66, 100, 133 };
313 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
316 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
318 const struct via_isa_bridge *config = ap->host->private_data;
319 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
320 int mode = config->flags & VIA_UDMA;
321 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
322 static u8 udma[5] = { 0, 33, 66, 100, 133 };
324 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
327 static struct scsi_host_template via_sht = {
328 .module = THIS_MODULE,
330 .ioctl = ata_scsi_ioctl,
331 .queuecommand = ata_scsi_queuecmd,
332 .can_queue = ATA_DEF_QUEUE,
333 .this_id = ATA_SHT_THIS_ID,
334 .sg_tablesize = LIBATA_MAX_PRD,
335 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
336 .emulated = ATA_SHT_EMULATED,
337 .use_clustering = ATA_SHT_USE_CLUSTERING,
338 .proc_name = DRV_NAME,
339 .dma_boundary = ATA_DMA_BOUNDARY,
340 .slave_configure = ata_scsi_slave_config,
341 .slave_destroy = ata_scsi_slave_destroy,
342 .bios_param = ata_std_bios_param,
345 static struct ata_port_operations via_port_ops = {
346 .port_disable = ata_port_disable,
347 .set_piomode = via_set_piomode,
348 .set_dmamode = via_set_dmamode,
349 .mode_filter = ata_pci_default_filter,
351 .tf_load = ata_tf_load,
352 .tf_read = ata_tf_read,
353 .check_status = ata_check_status,
354 .exec_command = ata_exec_command,
355 .dev_select = ata_std_dev_select,
357 .freeze = ata_bmdma_freeze,
358 .thaw = ata_bmdma_thaw,
359 .error_handler = via_error_handler,
360 .post_internal_cmd = ata_bmdma_post_internal_cmd,
361 .cable_detect = via_cable_detect,
363 .bmdma_setup = ata_bmdma_setup,
364 .bmdma_start = ata_bmdma_start,
365 .bmdma_stop = ata_bmdma_stop,
366 .bmdma_status = ata_bmdma_status,
368 .qc_prep = ata_qc_prep,
369 .qc_issue = ata_qc_issue_prot,
371 .data_xfer = ata_data_xfer,
373 .irq_handler = ata_interrupt,
374 .irq_clear = ata_bmdma_irq_clear,
375 .irq_on = ata_irq_on,
376 .irq_ack = ata_irq_ack,
378 .port_start = ata_port_start,
381 static struct ata_port_operations via_port_ops_noirq = {
382 .port_disable = ata_port_disable,
383 .set_piomode = via_set_piomode,
384 .set_dmamode = via_set_dmamode,
385 .mode_filter = ata_pci_default_filter,
387 .tf_load = ata_tf_load,
388 .tf_read = ata_tf_read,
389 .check_status = ata_check_status,
390 .exec_command = ata_exec_command,
391 .dev_select = ata_std_dev_select,
393 .freeze = ata_bmdma_freeze,
394 .thaw = ata_bmdma_thaw,
395 .error_handler = via_error_handler,
396 .post_internal_cmd = ata_bmdma_post_internal_cmd,
397 .cable_detect = via_cable_detect,
399 .bmdma_setup = ata_bmdma_setup,
400 .bmdma_start = ata_bmdma_start,
401 .bmdma_stop = ata_bmdma_stop,
402 .bmdma_status = ata_bmdma_status,
404 .qc_prep = ata_qc_prep,
405 .qc_issue = ata_qc_issue_prot,
407 .data_xfer = ata_data_xfer_noirq,
409 .irq_handler = ata_interrupt,
410 .irq_clear = ata_bmdma_irq_clear,
411 .irq_on = ata_irq_on,
412 .irq_ack = ata_irq_ack,
414 .port_start = ata_port_start,
418 * via_config_fifo - set up the FIFO
420 * @flags: configuration flags
422 * Set the FIFO properties for this device if neccessary. Used both on
423 * set up and on and the resume path
426 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
430 /* 0x40 low bits indicate enabled channels */
431 pci_read_config_byte(pdev, 0x40 , &enable);
434 if (flags & VIA_SET_FIFO) {
435 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
438 pci_read_config_byte(pdev, 0x43, &fifo);
440 /* Clear PREQ# until DDACK# for errata */
441 if (flags & VIA_BAD_PREQ)
445 /* Turn on FIFO for enabled channels */
446 fifo |= fifo_setting[enable];
447 pci_write_config_byte(pdev, 0x43, fifo);
452 * via_init_one - discovery callback
454 * @id: PCI table info
456 * A VIA IDE interface has been discovered. Figure out what revision
457 * and perform configuration work before handing it to the ATA layer
460 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
462 /* Early VIA without UDMA support */
463 static const struct ata_port_info via_mwdma_info = {
465 .flags = ATA_FLAG_SLAVE_POSS,
468 .port_ops = &via_port_ops
470 /* Ditto with IRQ masking required */
471 static const struct ata_port_info via_mwdma_info_borked = {
473 .flags = ATA_FLAG_SLAVE_POSS,
476 .port_ops = &via_port_ops_noirq,
478 /* VIA UDMA 33 devices (and borked 66) */
479 static const struct ata_port_info via_udma33_info = {
481 .flags = ATA_FLAG_SLAVE_POSS,
484 .udma_mask = ATA_UDMA2,
485 .port_ops = &via_port_ops
487 /* VIA UDMA 66 devices */
488 static const struct ata_port_info via_udma66_info = {
490 .flags = ATA_FLAG_SLAVE_POSS,
493 .udma_mask = ATA_UDMA4,
494 .port_ops = &via_port_ops
496 /* VIA UDMA 100 devices */
497 static const struct ata_port_info via_udma100_info = {
499 .flags = ATA_FLAG_SLAVE_POSS,
502 .udma_mask = ATA_UDMA5,
503 .port_ops = &via_port_ops
505 /* UDMA133 with bad AST (All current 133) */
506 static const struct ata_port_info via_udma133_info = {
508 .flags = ATA_FLAG_SLAVE_POSS,
511 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
512 .port_ops = &via_port_ops
514 struct ata_port_info type;
515 const struct ata_port_info *ppi[] = { &type, NULL };
516 struct pci_dev *isa = NULL;
517 const struct via_isa_bridge *config;
518 static int printed_version;
522 if (!printed_version++)
523 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
525 /* To find out how the IDE will behave and what features we
526 actually have to look at the bridge not the IDE controller */
527 for (config = via_isa_bridges; config->id; config++)
528 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
529 !!(config->flags & VIA_BAD_ID),
530 config->id, NULL))) {
532 if (isa->revision >= config->rev_min &&
533 isa->revision <= config->rev_max)
539 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
544 /* 0x40 low bits indicate enabled channels */
545 pci_read_config_byte(pdev, 0x40 , &enable);
551 /* Initialise the FIFO for the enabled channels. */
552 via_config_fifo(pdev, config->flags);
555 switch(config->flags & VIA_UDMA) {
557 if (config->flags & VIA_NO_UNMASK)
558 type = via_mwdma_info_borked;
560 type = via_mwdma_info;
563 type = via_udma33_info;
566 type = via_udma66_info;
567 /* The 66 MHz devices require we enable the clock */
568 pci_read_config_dword(pdev, 0x50, &timing);
570 pci_write_config_dword(pdev, 0x50, timing);
573 type = via_udma100_info;
576 type = via_udma133_info;
583 if (config->flags & VIA_BAD_CLK66) {
584 /* Disable the 66MHz clock on problem devices */
585 pci_read_config_dword(pdev, 0x50, &timing);
587 pci_write_config_dword(pdev, 0x50, timing);
590 /* We have established the device type, now fire it up */
591 type.private_data = (void *)config;
593 return ata_pci_init_one(pdev, ppi);
598 * via_reinit_one - reinit after resume
601 * Called when the VIA PATA device is resumed. We must then
602 * reconfigure the fifo and other setup we may have altered. In
603 * addition the kernel needs to have the resume methods on PCI
607 static int via_reinit_one(struct pci_dev *pdev)
610 struct ata_host *host = dev_get_drvdata(&pdev->dev);
611 const struct via_isa_bridge *config = host->private_data;
613 via_config_fifo(pdev, config->flags);
615 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
616 /* The 66 MHz devices require we enable the clock */
617 pci_read_config_dword(pdev, 0x50, &timing);
619 pci_write_config_dword(pdev, 0x50, timing);
621 if (config->flags & VIA_BAD_CLK66) {
622 /* Disable the 66MHz clock on problem devices */
623 pci_read_config_dword(pdev, 0x50, &timing);
625 pci_write_config_dword(pdev, 0x50, timing);
627 return ata_pci_device_resume(pdev);
631 static const struct pci_device_id via[] = {
632 { PCI_VDEVICE(VIA, 0x0571), },
633 { PCI_VDEVICE(VIA, 0x0581), },
634 { PCI_VDEVICE(VIA, 0x1571), },
635 { PCI_VDEVICE(VIA, 0x3164), },
636 { PCI_VDEVICE(VIA, 0x5324), },
641 static struct pci_driver via_pci_driver = {
644 .probe = via_init_one,
645 .remove = ata_pci_remove_one,
647 .suspend = ata_pci_device_suspend,
648 .resume = via_reinit_one,
652 static int __init via_init(void)
654 return pci_register_driver(&via_pci_driver);
657 static void __exit via_exit(void)
659 pci_unregister_driver(&via_pci_driver);
662 MODULE_AUTHOR("Alan Cox");
663 MODULE_DESCRIPTION("low-level driver for VIA PATA");
664 MODULE_LICENSE("GPL");
665 MODULE_DEVICE_TABLE(pci, via);
666 MODULE_VERSION(DRV_VERSION);
668 module_init(via_init);
669 module_exit(via_exit);