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1 /*
2  * linux/drivers/char/watchdog/omap_wdt.c
3  *
4  * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
5  *
6  * Author: MontaVista Software, Inc.
7  *       <gdavis@mvista.com> or <source@mvista.com>
8  *
9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10  * terms of the GNU General Public License version 2. This program is
11  * licensed "as is" without any warranty of any kind, whether express
12  * or implied.
13  *
14  * History:
15  *
16  * 20030527: George G. Davis <gdavis@mvista.com>
17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19  *      Based on SoftDog driver by Alan Cox <alan@redhat.com>
20  *
21  * Copyright (c) 2004 Texas Instruments.
22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
23  *      2. Ported to 2.6 kernel
24  *
25  * Copyright (c) 2005 David Brownell
26  *      Use the driver model and standard identifiers; handle bigger timeouts.
27  */
28
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/mm.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/clk.h>
42
43 #include <asm/io.h>
44 #include <asm/uaccess.h>
45 #include <asm/hardware.h>
46 #include <asm/bitops.h>
47
48 #include <asm/arch/prcm.h>
49
50 #include "omap_wdt.h"
51
52 static struct platform_device *omap_wdt_dev;
53
54 static unsigned timer_margin;
55 module_param(timer_margin, uint, 0);
56 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
57
58 static unsigned int wdt_trgr_pattern = 0x1234;
59 struct omap_wdt_dev {
60         void __iomem    *base;          /* physical */
61         struct device   *dev;
62         int             omap_wdt_users;
63         struct clk      *armwdt_ck;
64         struct clk      *mpu_wdt_ick;
65         struct clk      *mpu_wdt_fck;
66         struct resource *mem;
67         struct miscdevice omap_wdt_miscdev;
68 };
69
70 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
71 {
72         void __iomem    *base = wdev->base;
73         /* wait for posted write to complete */
74         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
75                 cpu_relax();
76         wdt_trgr_pattern = ~wdt_trgr_pattern;
77         omap_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
78         /* wait for posted write to complete */
79         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
80                 cpu_relax();
81         /* reloaded WCRR from WLDR */
82 }
83
84 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
85 {
86         void __iomem *base;
87         base = wdev->base;
88         /* Sequence to enable the watchdog */
89         omap_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
90         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
91                 cpu_relax();
92         omap_writel(0x4444, base + OMAP_WATCHDOG_SPR);
93         while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
94                 cpu_relax();
95 }
96
97 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
98 {
99         void __iomem *base;
100         base = wdev->base;
101         /* sequence required to disable watchdog */
102         omap_writel(0xAAAA, base + OMAP_WATCHDOG_SPR);  /* TIMER_MODE */
103         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
104                 cpu_relax();
105         omap_writel(0x5555, base + OMAP_WATCHDOG_SPR);  /* TIMER_MODE */
106         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
107                 cpu_relax();
108 }
109
110 static void omap_wdt_adjust_timeout(unsigned new_timeout)
111 {
112         if (new_timeout < TIMER_MARGIN_MIN)
113                 new_timeout = TIMER_MARGIN_DEFAULT;
114         if (new_timeout > TIMER_MARGIN_MAX)
115                 new_timeout = TIMER_MARGIN_MAX;
116         timer_margin = new_timeout;
117 }
118
119 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
120 {
121         u32 pre_margin = GET_WLDR_VAL(timer_margin);
122         void __iomem *base;
123         base = wdev->base;
124
125         /* just count up at 32 KHz */
126         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
127                 cpu_relax();
128         omap_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
129         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
130                 cpu_relax();
131 }
132
133 /*
134  *      Allow only one task to hold it open
135  */
136
137 static int omap_wdt_open(struct inode *inode, struct file *file)
138 {
139         struct omap_wdt_dev *wdev;
140         void __iomem *base;
141         wdev = platform_get_drvdata(omap_wdt_dev);
142         base = wdev->base;
143         if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
144                 return -EBUSY;
145
146         if (cpu_is_omap16xx())
147                 clk_enable(wdev->armwdt_ck);    /* Enable the clock */
148
149         if (cpu_is_omap24xx()) {
150                 clk_enable(wdev->mpu_wdt_ick);    /* Enable the interface clock */
151                 clk_enable(wdev->mpu_wdt_fck);    /* Enable the functional clock */
152         }
153
154         /* initialize prescaler */
155         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
156                 cpu_relax();
157         omap_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
158         while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
159                 cpu_relax();
160
161         file->private_data = (void *) wdev;
162
163         omap_wdt_set_timeout(wdev);
164         omap_wdt_enable(wdev);
165
166         return 0;
167 }
168
169 static int omap_wdt_release(struct inode *inode, struct file *file)
170 {
171         struct omap_wdt_dev *wdev;
172         wdev = file->private_data;
173         /*
174          *      Shut off the timer unless NOWAYOUT is defined.
175          */
176 #ifndef CONFIG_WATCHDOG_NOWAYOUT
177
178         omap_wdt_disable(wdev);
179
180         if (cpu_is_omap16xx()) {
181                 clk_disable(wdev->armwdt_ck);   /* Disable the clock */
182                 clk_put(wdev->armwdt_ck);
183                 wdev->armwdt_ck = NULL;
184         }
185
186         if (cpu_is_omap24xx()) {
187                 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
188                 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
189                 clk_put(wdev->mpu_wdt_ick);
190                 clk_put(wdev->mpu_wdt_fck);
191                 wdev->mpu_wdt_ick = NULL;
192                 wdev->mpu_wdt_fck = NULL;
193         }
194 #else
195         printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
196 #endif
197         wdev->omap_wdt_users = 0;
198         return 0;
199 }
200
201 static ssize_t
202 omap_wdt_write(struct file *file, const char __user *data,
203                 size_t len, loff_t *ppos)
204 {
205         struct omap_wdt_dev *wdev;
206         wdev = file->private_data;
207         /* Refresh LOAD_TIME. */
208         if (len)
209                 omap_wdt_ping(wdev);
210         return len;
211 }
212
213 static int
214 omap_wdt_ioctl(struct inode *inode, struct file *file,
215         unsigned int cmd, unsigned long arg)
216 {
217         struct omap_wdt_dev *wdev;
218         int new_margin;
219         static struct watchdog_info ident = {
220                 .identity = "OMAP Watchdog",
221                 .options = WDIOF_SETTIMEOUT,
222                 .firmware_version = 0,
223         };
224         wdev = file->private_data;
225
226         switch (cmd) {
227         default:
228                 return -ENOIOCTLCMD;
229         case WDIOC_GETSUPPORT:
230                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
231                                 sizeof(ident));
232         case WDIOC_GETSTATUS:
233                 return put_user(0, (int __user *)arg);
234         case WDIOC_GETBOOTSTATUS:
235                 if (cpu_is_omap16xx())
236                         return put_user(omap_readw(ARM_SYSST),
237                                         (int __user *)arg);
238                 if (cpu_is_omap24xx())
239                         return put_user(omap_prcm_get_reset_sources(),
240                                         (int __user *)arg);
241         case WDIOC_KEEPALIVE:
242                 omap_wdt_ping(wdev);
243                 return 0;
244         case WDIOC_SETTIMEOUT:
245                 if (get_user(new_margin, (int __user *)arg))
246                         return -EFAULT;
247                 omap_wdt_adjust_timeout(new_margin);
248
249                 omap_wdt_disable(wdev);
250                 omap_wdt_set_timeout(wdev);
251                 omap_wdt_enable(wdev);
252
253                 omap_wdt_ping(wdev);
254                 /* Fall */
255         case WDIOC_GETTIMEOUT:
256                 return put_user(timer_margin, (int __user *)arg);
257         }
258         return 0;
259 }
260
261 static const struct file_operations omap_wdt_fops = {
262         .owner = THIS_MODULE,
263         .write = omap_wdt_write,
264         .ioctl = omap_wdt_ioctl,
265         .open = omap_wdt_open,
266         .release = omap_wdt_release,
267 };
268
269
270 static int __init omap_wdt_probe(struct platform_device *pdev)
271 {
272         struct resource *res, *mem;
273         int ret;
274         struct omap_wdt_dev *wdev;
275
276         /* reserve static register mappings */
277         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
278         if (!res)
279                 return -ENOENT;
280
281         if (omap_wdt_dev)
282                 return -EBUSY;
283
284         mem = request_mem_region(res->start, res->end - res->start + 1,
285                                  pdev->name);
286         if (mem == NULL)
287                 return -EBUSY;
288
289         wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
290         if (!wdev) {
291                 ret = -ENOMEM;
292                 goto fail;
293         }
294         wdev->omap_wdt_users = 0;
295         wdev->mem = mem;
296
297         if (cpu_is_omap16xx()) {
298                 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
299                 if (IS_ERR(wdev->armwdt_ck)) {
300                         ret = PTR_ERR(wdev->armwdt_ck);
301                         wdev->armwdt_ck = NULL;
302                         goto fail;
303                 }
304         }
305
306         if (cpu_is_omap24xx()) {
307                 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
308                 if (IS_ERR(wdev->mpu_wdt_ick)) {
309                         ret = PTR_ERR(wdev->mpu_wdt_ick);
310                         wdev->mpu_wdt_ick = NULL;
311                         goto fail;
312                 }
313                 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
314                 if (IS_ERR(wdev->mpu_wdt_fck)) {
315                         ret = PTR_ERR(wdev->mpu_wdt_fck);
316                         wdev->mpu_wdt_fck = NULL;
317                         goto fail;
318                 }
319         }
320         wdev->base = (void __iomem *) (mem->start);
321         platform_set_drvdata(pdev, wdev);
322
323         omap_wdt_disable(wdev);
324         omap_wdt_adjust_timeout(timer_margin);
325
326         wdev->omap_wdt_miscdev.parent = &pdev->dev;
327         wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
328         wdev->omap_wdt_miscdev.name = "watchdog";
329         wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
330
331         ret = misc_register(&(wdev->omap_wdt_miscdev));
332         if (ret)
333                 goto fail;
334
335         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
336                 omap_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
337                 timer_margin);
338
339         /* autogate OCP interface clock */
340         omap_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
341
342         omap_wdt_dev = pdev;
343
344         return 0;
345
346 fail:
347         if (wdev) {
348                 platform_set_drvdata(pdev, NULL);
349                 if (wdev->armwdt_ck)
350                         clk_put(wdev->armwdt_ck);
351                 if (wdev->mpu_wdt_ick)
352                         clk_put(wdev->mpu_wdt_ick);
353                 if (wdev->mpu_wdt_fck)
354                         clk_put(wdev->mpu_wdt_fck);
355                 kfree(wdev);
356         }
357         if (mem) {
358                 release_resource(mem);
359         }
360         return ret;
361 }
362
363 static void omap_wdt_shutdown(struct platform_device *pdev)
364 {
365         struct omap_wdt_dev *wdev;
366         wdev = platform_get_drvdata(pdev);
367         omap_wdt_disable(wdev);
368 }
369
370 static int omap_wdt_remove(struct platform_device *pdev)
371 {
372         struct omap_wdt_dev *wdev;
373         wdev = platform_get_drvdata(pdev);
374
375         misc_deregister(&(wdev->omap_wdt_miscdev));
376         release_resource(wdev->mem);
377         platform_set_drvdata(pdev, NULL);
378         if (wdev->armwdt_ck)
379                 clk_put(wdev->armwdt_ck);
380         if (wdev->mpu_wdt_ick)
381                 clk_put(wdev->mpu_wdt_ick);
382         if (wdev->mpu_wdt_fck)
383                 clk_put(wdev->mpu_wdt_fck);
384         kfree(wdev);
385         omap_wdt_dev = NULL;
386         return 0;
387 }
388
389 #ifdef  CONFIG_PM
390
391 /* REVISIT ... not clear this is the best way to handle system suspend; and
392  * it's very inappropriate for selective device suspend (e.g. suspending this
393  * through sysfs rather than by stopping the watchdog daemon).  Also, this
394  * may not play well enough with NOWAYOUT...
395  */
396
397 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
398 {
399         struct omap_wdt_dev *wdev;
400         wdev = platform_get_drvdata(pdev);
401         if (wdev->omap_wdt_users)
402                 omap_wdt_disable(wdev);
403         return 0;
404 }
405
406 static int omap_wdt_resume(struct platform_device *pdev)
407 {
408         struct omap_wdt_dev *wdev;
409         wdev = platform_get_drvdata(pdev);
410         if (wdev->omap_wdt_users) {
411                 omap_wdt_enable(wdev);
412                 omap_wdt_ping(wdev);
413         }
414         return 0;
415 }
416
417 #else
418 #define omap_wdt_suspend        NULL
419 #define omap_wdt_resume         NULL
420 #endif
421
422 static struct platform_driver omap_wdt_driver = {
423         .probe          = omap_wdt_probe,
424         .remove         = omap_wdt_remove,
425         .shutdown       = omap_wdt_shutdown,
426         .suspend        = omap_wdt_suspend,
427         .resume         = omap_wdt_resume,
428         .driver         = {
429                 .owner  = THIS_MODULE,
430                 .name   = "omap_wdt",
431         },
432 };
433
434 static int __init omap_wdt_init(void)
435 {
436         return platform_driver_register(&omap_wdt_driver);
437 }
438
439 static void __exit omap_wdt_exit(void)
440 {
441         platform_driver_unregister(&omap_wdt_driver);
442 }
443
444 module_init(omap_wdt_init);
445 module_exit(omap_wdt_exit);
446
447 MODULE_AUTHOR("George G. Davis");
448 MODULE_LICENSE("GPL");
449 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);