2 SMBus driver for nVidia nForce2 MCP
4 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
5 Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
6 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
8 SMBus 2.0 driver for AMD-8111 IO-Hub
9 Copyright (c) 2002 Vojtech Pavlik
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 SUPPORTED DEVICES PCI ID
29 nForce2 Ultra 400 MCP 0084
30 nForce3 Pro150 MCP 00D4
31 nForce3 250Gb MCP 00E4
39 This driver supports the 2 SMBuses that are included in the MCP of the
40 nForce2/3/4/5xx chipsets.
43 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/kernel.h>
48 #include <linux/stddef.h>
49 #include <linux/ioport.h>
50 #include <linux/init.h>
51 #include <linux/i2c.h>
52 #include <linux/delay.h>
55 MODULE_LICENSE("GPL");
56 MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
57 MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
60 struct nforce2_smbus {
61 struct i2c_adapter adapter;
69 * nVidia nForce2 SMBus control register definitions
70 * (Newer incarnations use standard BARs 4 and 5 instead)
72 #define NFORCE_PCI_SMB1 0x50
73 #define NFORCE_PCI_SMB2 0x54
77 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
79 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
80 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
81 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
82 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
83 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
84 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
87 #define NVIDIA_SMB_STS_DONE 0x80
88 #define NVIDIA_SMB_STS_ALRM 0x40
89 #define NVIDIA_SMB_STS_RES 0x20
90 #define NVIDIA_SMB_STS_STATUS 0x1f
92 #define NVIDIA_SMB_PRTCL_WRITE 0x00
93 #define NVIDIA_SMB_PRTCL_READ 0x01
94 #define NVIDIA_SMB_PRTCL_QUICK 0x02
95 #define NVIDIA_SMB_PRTCL_BYTE 0x04
96 #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
97 #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
98 #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
99 #define NVIDIA_SMB_PRTCL_PEC 0x80
101 /* Misc definitions */
102 #define MAX_TIMEOUT 100
104 static struct pci_driver nforce2_driver;
106 static int nforce2_check_status(struct i2c_adapter *adap)
108 struct nforce2_smbus *smbus = adap->algo_data;
114 temp = inb_p(NVIDIA_SMB_STS);
115 } while ((!temp) && (timeout++ < MAX_TIMEOUT));
117 if (timeout >= MAX_TIMEOUT) {
118 dev_dbg(&adap->dev, "SMBus Timeout!\n");
121 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
122 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
128 /* Return -1 on error */
129 static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
130 unsigned short flags, char read_write,
131 u8 command, int size, union i2c_smbus_data * data)
133 struct nforce2_smbus *smbus = adap->algo_data;
134 unsigned char protocol, pec;
138 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
139 NVIDIA_SMB_PRTCL_WRITE;
140 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
144 case I2C_SMBUS_QUICK:
145 protocol |= NVIDIA_SMB_PRTCL_QUICK;
146 read_write = I2C_SMBUS_WRITE;
150 if (read_write == I2C_SMBUS_WRITE)
151 outb_p(command, NVIDIA_SMB_CMD);
152 protocol |= NVIDIA_SMB_PRTCL_BYTE;
155 case I2C_SMBUS_BYTE_DATA:
156 outb_p(command, NVIDIA_SMB_CMD);
157 if (read_write == I2C_SMBUS_WRITE)
158 outb_p(data->byte, NVIDIA_SMB_DATA);
159 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
162 case I2C_SMBUS_WORD_DATA:
163 outb_p(command, NVIDIA_SMB_CMD);
164 if (read_write == I2C_SMBUS_WRITE) {
165 outb_p(data->word, NVIDIA_SMB_DATA);
166 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
168 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
171 case I2C_SMBUS_BLOCK_DATA:
172 outb_p(command, NVIDIA_SMB_CMD);
173 if (read_write == I2C_SMBUS_WRITE) {
174 len = data->block[0];
175 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
177 "Transaction failed "
178 "(requested block size: %d)\n",
182 outb_p(len, NVIDIA_SMB_BCNT);
183 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
184 outb_p(data->block[i + 1],
187 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
191 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
195 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
196 outb_p(protocol, NVIDIA_SMB_PRTCL);
198 if (nforce2_check_status(adap))
201 if (read_write == I2C_SMBUS_WRITE)
207 case I2C_SMBUS_BYTE_DATA:
208 data->byte = inb_p(NVIDIA_SMB_DATA);
211 case I2C_SMBUS_WORD_DATA:
212 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
215 case I2C_SMBUS_BLOCK_DATA:
216 len = inb_p(NVIDIA_SMB_BCNT);
217 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
218 dev_err(&adap->dev, "Transaction failed "
219 "(received block size: 0x%02x)\n",
223 for (i = 0; i < len; i++)
224 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
225 data->block[0] = len;
233 static u32 nforce2_func(struct i2c_adapter *adapter)
235 /* other functionality might be possible, but is not tested */
236 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
237 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
238 (((struct nforce2_smbus*)adapter->algo_data)->blockops ?
239 I2C_FUNC_SMBUS_BLOCK_DATA : 0);
242 static struct i2c_algorithm smbus_algorithm = {
243 .smbus_xfer = nforce2_access,
244 .functionality = nforce2_func,
248 static struct pci_device_id nforce2_ids[] = {
249 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
250 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
251 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
252 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
253 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
254 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
255 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
256 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
257 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
258 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
262 MODULE_DEVICE_TABLE (pci, nforce2_ids);
265 static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
266 int alt_reg, struct nforce2_smbus *smbus, const char *name)
270 smbus->base = pci_resource_start(dev, bar);
272 smbus->size = pci_resource_len(dev, bar);
274 /* Older incarnations of the device used non-standard BARs */
277 if (pci_read_config_word(dev, alt_reg, &iobase)
278 != PCIBIOS_SUCCESSFUL) {
279 dev_err(&dev->dev, "Error reading PCI config for %s\n",
284 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
288 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
289 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
290 smbus->base, smbus->base+smbus->size-1, name);
293 smbus->adapter.owner = THIS_MODULE;
294 smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
295 smbus->adapter.class = I2C_CLASS_HWMON;
296 smbus->adapter.algo = &smbus_algorithm;
297 smbus->adapter.algo_data = smbus;
298 smbus->adapter.dev.parent = &dev->dev;
299 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
300 "SMBus nForce2 adapter at %04x", smbus->base);
302 error = i2c_add_adapter(&smbus->adapter);
304 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
305 release_region(smbus->base, smbus->size);
308 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
313 static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
315 struct nforce2_smbus *smbuses;
318 /* we support 2 SMBus adapters */
319 if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
321 pci_set_drvdata(dev, smbuses);
323 switch(dev->device) {
324 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
325 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
326 smbuses[0].blockops = 1;
327 smbuses[1].blockops = 1;
330 /* SMBus adapter 1 */
331 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
333 dev_err(&dev->dev, "Error probing SMB1.\n");
334 smbuses[0].base = 0; /* to have a check value */
336 /* SMBus adapter 2 */
337 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
339 dev_err(&dev->dev, "Error probing SMB2.\n");
340 smbuses[1].base = 0; /* to have a check value */
342 if ((res1 < 0) && (res2 < 0)) {
343 /* we did not find even one of the SMBuses, so we give up */
352 static void __devexit nforce2_remove(struct pci_dev *dev)
354 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
356 if (smbuses[0].base) {
357 i2c_del_adapter(&smbuses[0].adapter);
358 release_region(smbuses[0].base, smbuses[0].size);
360 if (smbuses[1].base) {
361 i2c_del_adapter(&smbuses[1].adapter);
362 release_region(smbuses[1].base, smbuses[1].size);
367 static struct pci_driver nforce2_driver = {
368 .name = "nForce2_smbus",
369 .id_table = nforce2_ids,
370 .probe = nforce2_probe,
371 .remove = __devexit_p(nforce2_remove),
374 static int __init nforce2_init(void)
376 return pci_register_driver(&nforce2_driver);
379 static void __exit nforce2_exit(void)
381 pci_unregister_driver(&nforce2_driver);
384 module_init(nforce2_init);
385 module_exit(nforce2_exit);