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ide: use ->tf_load in SELECT_DRIVE()
[linux-2.6-omap-h63xx.git] / drivers / ide / ide-iops.c
1 /*
2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
4  *
5  */
6
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/string.h>
10 #include <linux/kernel.h>
11 #include <linux/timer.h>
12 #include <linux/mm.h>
13 #include <linux/interrupt.h>
14 #include <linux/major.h>
15 #include <linux/errno.h>
16 #include <linux/genhd.h>
17 #include <linux/blkpg.h>
18 #include <linux/slab.h>
19 #include <linux/pci.h>
20 #include <linux/delay.h>
21 #include <linux/hdreg.h>
22 #include <linux/ide.h>
23 #include <linux/bitops.h>
24 #include <linux/nmi.h>
25
26 #include <asm/byteorder.h>
27 #include <asm/irq.h>
28 #include <asm/uaccess.h>
29 #include <asm/io.h>
30
31 /*
32  *      Conventional PIO operations for ATA devices
33  */
34
35 static u8 ide_inb (unsigned long port)
36 {
37         return (u8) inb(port);
38 }
39
40 static void ide_outb (u8 val, unsigned long port)
41 {
42         outb(val, port);
43 }
44
45 static void ide_outbsync(ide_hwif_t *hwif, u8 addr, unsigned long port)
46 {
47         outb(addr, port);
48 }
49
50 void default_hwif_iops (ide_hwif_t *hwif)
51 {
52         hwif->OUTB      = ide_outb;
53         hwif->OUTBSYNC  = ide_outbsync;
54         hwif->INB       = ide_inb;
55 }
56
57 /*
58  *      MMIO operations, typically used for SATA controllers
59  */
60
61 static u8 ide_mm_inb (unsigned long port)
62 {
63         return (u8) readb((void __iomem *) port);
64 }
65
66 static void ide_mm_outb (u8 value, unsigned long port)
67 {
68         writeb(value, (void __iomem *) port);
69 }
70
71 static void ide_mm_outbsync(ide_hwif_t *hwif, u8 value, unsigned long port)
72 {
73         writeb(value, (void __iomem *) port);
74 }
75
76 void default_hwif_mmiops (ide_hwif_t *hwif)
77 {
78         hwif->OUTB      = ide_mm_outb;
79         /* Most systems will need to override OUTBSYNC, alas however
80            this one is controller specific! */
81         hwif->OUTBSYNC  = ide_mm_outbsync;
82         hwif->INB       = ide_mm_inb;
83 }
84
85 EXPORT_SYMBOL(default_hwif_mmiops);
86
87 void SELECT_DRIVE (ide_drive_t *drive)
88 {
89         ide_hwif_t *hwif = drive->hwif;
90         const struct ide_port_ops *port_ops = hwif->port_ops;
91         ide_task_t task;
92
93         if (port_ops && port_ops->selectproc)
94                 port_ops->selectproc(drive);
95
96         memset(&task, 0, sizeof(task));
97         task.tf_flags = IDE_TFLAG_OUT_DEVICE;
98
99         drive->hwif->tf_load(drive, &task);
100 }
101
102 void SELECT_MASK(ide_drive_t *drive, int mask)
103 {
104         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
105
106         if (port_ops && port_ops->maskproc)
107                 port_ops->maskproc(drive, mask);
108 }
109
110 static void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
111 {
112         if (hwif->host_flags & IDE_HFLAG_MMIO)
113                 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
114         else
115                 outb(cmd, hwif->io_ports.command_addr);
116 }
117
118 static u8 ide_read_status(ide_hwif_t *hwif)
119 {
120         if (hwif->host_flags & IDE_HFLAG_MMIO)
121                 return readb((void __iomem *)hwif->io_ports.status_addr);
122         else
123                 return inb(hwif->io_ports.status_addr);
124 }
125
126 static u8 ide_read_altstatus(ide_hwif_t *hwif)
127 {
128         if (hwif->host_flags & IDE_HFLAG_MMIO)
129                 return readb((void __iomem *)hwif->io_ports.ctl_addr);
130         else
131                 return inb(hwif->io_ports.ctl_addr);
132 }
133
134 static u8 ide_read_sff_dma_status(ide_hwif_t *hwif)
135 {
136         if (hwif->host_flags & IDE_HFLAG_MMIO)
137                 return readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
138         else
139                 return inb(hwif->dma_base + ATA_DMA_STATUS);
140 }
141
142 static void ide_set_irq(ide_hwif_t *hwif, int on)
143 {
144         u8 ctl = ATA_DEVCTL_OBS;
145
146         if (on == 4) { /* hack for SRST */
147                 ctl |= 4;
148                 on &= ~4;
149         }
150
151         ctl |= on ? 0 : 2;
152
153         if (hwif->host_flags & IDE_HFLAG_MMIO)
154                 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
155         else
156                 outb(ctl, hwif->io_ports.ctl_addr);
157 }
158
159 static void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
160 {
161         ide_hwif_t *hwif = drive->hwif;
162         struct ide_io_ports *io_ports = &hwif->io_ports;
163         struct ide_taskfile *tf = &task->tf;
164         void (*tf_outb)(u8 addr, unsigned long port);
165         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
166         u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
167
168         if (mmio)
169                 tf_outb = ide_mm_outb;
170         else
171                 tf_outb = ide_outb;
172
173         if (task->tf_flags & IDE_TFLAG_FLAGGED)
174                 HIHI = 0xFF;
175
176         if (task->tf_flags & IDE_TFLAG_OUT_DATA) {
177                 u16 data = (tf->hob_data << 8) | tf->data;
178
179                 if (mmio)
180                         writew(data, (void __iomem *)io_ports->data_addr);
181                 else
182                         outw(data, io_ports->data_addr);
183         }
184
185         if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
186                 tf_outb(tf->hob_feature, io_ports->feature_addr);
187         if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
188                 tf_outb(tf->hob_nsect, io_ports->nsect_addr);
189         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
190                 tf_outb(tf->hob_lbal, io_ports->lbal_addr);
191         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
192                 tf_outb(tf->hob_lbam, io_ports->lbam_addr);
193         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
194                 tf_outb(tf->hob_lbah, io_ports->lbah_addr);
195
196         if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
197                 tf_outb(tf->feature, io_ports->feature_addr);
198         if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
199                 tf_outb(tf->nsect, io_ports->nsect_addr);
200         if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
201                 tf_outb(tf->lbal, io_ports->lbal_addr);
202         if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
203                 tf_outb(tf->lbam, io_ports->lbam_addr);
204         if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
205                 tf_outb(tf->lbah, io_ports->lbah_addr);
206
207         if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
208                 tf_outb((tf->device & HIHI) | drive->select.all,
209                          io_ports->device_addr);
210 }
211
212 static void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
213 {
214         ide_hwif_t *hwif = drive->hwif;
215         struct ide_io_ports *io_ports = &hwif->io_ports;
216         struct ide_taskfile *tf = &task->tf;
217         void (*tf_outb)(u8 addr, unsigned long port);
218         u8 (*tf_inb)(unsigned long port);
219         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
220
221         if (mmio) {
222                 tf_outb = ide_mm_outb;
223                 tf_inb  = ide_mm_inb;
224         } else {
225                 tf_outb = ide_outb;
226                 tf_inb  = ide_inb;
227         }
228
229         if (task->tf_flags & IDE_TFLAG_IN_DATA) {
230                 u16 data;
231
232                 if (mmio)
233                         data = readw((void __iomem *)io_ports->data_addr);
234                 else
235                         data = inw(io_ports->data_addr);
236
237                 tf->data = data & 0xff;
238                 tf->hob_data = (data >> 8) & 0xff;
239         }
240
241         /* be sure we're looking at the low order bits */
242         tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
243
244         if (task->tf_flags & IDE_TFLAG_IN_NSECT)
245                 tf->nsect  = tf_inb(io_ports->nsect_addr);
246         if (task->tf_flags & IDE_TFLAG_IN_LBAL)
247                 tf->lbal   = tf_inb(io_ports->lbal_addr);
248         if (task->tf_flags & IDE_TFLAG_IN_LBAM)
249                 tf->lbam   = tf_inb(io_ports->lbam_addr);
250         if (task->tf_flags & IDE_TFLAG_IN_LBAH)
251                 tf->lbah   = tf_inb(io_ports->lbah_addr);
252         if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
253                 tf->device = tf_inb(io_ports->device_addr);
254
255         if (task->tf_flags & IDE_TFLAG_LBA48) {
256                 tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
257
258                 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
259                         tf->hob_feature = tf_inb(io_ports->feature_addr);
260                 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
261                         tf->hob_nsect   = tf_inb(io_ports->nsect_addr);
262                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
263                         tf->hob_lbal    = tf_inb(io_ports->lbal_addr);
264                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
265                         tf->hob_lbam    = tf_inb(io_ports->lbam_addr);
266                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
267                         tf->hob_lbah    = tf_inb(io_ports->lbah_addr);
268         }
269 }
270
271 /*
272  * Some localbus EIDE interfaces require a special access sequence
273  * when using 32-bit I/O instructions to transfer data.  We call this
274  * the "vlb_sync" sequence, which consists of three successive reads
275  * of the sector count register location, with interrupts disabled
276  * to ensure that the reads all happen together.
277  */
278 static void ata_vlb_sync(unsigned long port)
279 {
280         (void)inb(port);
281         (void)inb(port);
282         (void)inb(port);
283 }
284
285 /*
286  * This is used for most PIO data transfers *from* the IDE interface
287  *
288  * These routines will round up any request for an odd number of bytes,
289  * so if an odd len is specified, be sure that there's at least one
290  * extra byte allocated for the buffer.
291  */
292 static void ata_input_data(ide_drive_t *drive, struct request *rq,
293                            void *buf, unsigned int len)
294 {
295         ide_hwif_t *hwif = drive->hwif;
296         struct ide_io_ports *io_ports = &hwif->io_ports;
297         unsigned long data_addr = io_ports->data_addr;
298         u8 io_32bit = drive->io_32bit;
299         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
300
301         len++;
302
303         if (io_32bit) {
304                 unsigned long uninitialized_var(flags);
305
306                 if ((io_32bit & 2) && !mmio) {
307                         local_irq_save(flags);
308                         ata_vlb_sync(io_ports->nsect_addr);
309                 }
310
311                 if (mmio)
312                         __ide_mm_insl((void __iomem *)data_addr, buf, len / 4);
313                 else
314                         insl(data_addr, buf, len / 4);
315
316                 if ((io_32bit & 2) && !mmio)
317                         local_irq_restore(flags);
318
319                 if ((len & 3) >= 2) {
320                         if (mmio)
321                                 __ide_mm_insw((void __iomem *)data_addr,
322                                                 (u8 *)buf + (len & ~3), 1);
323                         else
324                                 insw(data_addr, (u8 *)buf + (len & ~3), 1);
325                 }
326         } else {
327                 if (mmio)
328                         __ide_mm_insw((void __iomem *)data_addr, buf, len / 2);
329                 else
330                         insw(data_addr, buf, len / 2);
331         }
332 }
333
334 /*
335  * This is used for most PIO data transfers *to* the IDE interface
336  */
337 static void ata_output_data(ide_drive_t *drive, struct request *rq,
338                             void *buf, unsigned int len)
339 {
340         ide_hwif_t *hwif = drive->hwif;
341         struct ide_io_ports *io_ports = &hwif->io_ports;
342         unsigned long data_addr = io_ports->data_addr;
343         u8 io_32bit = drive->io_32bit;
344         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
345
346         if (io_32bit) {
347                 unsigned long uninitialized_var(flags);
348
349                 if ((io_32bit & 2) && !mmio) {
350                         local_irq_save(flags);
351                         ata_vlb_sync(io_ports->nsect_addr);
352                 }
353
354                 if (mmio)
355                         __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4);
356                 else
357                         outsl(data_addr, buf, len / 4);
358
359                 if ((io_32bit & 2) && !mmio)
360                         local_irq_restore(flags);
361
362                 if ((len & 3) >= 2) {
363                         if (mmio)
364                                 __ide_mm_outsw((void __iomem *)data_addr,
365                                                  (u8 *)buf + (len & ~3), 1);
366                         else
367                                 outsw(data_addr, (u8 *)buf + (len & ~3), 1);
368                 }
369         } else {
370                 if (mmio)
371                         __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2);
372                 else
373                         outsw(data_addr, buf, len / 2);
374         }
375 }
376
377 void default_hwif_transport(ide_hwif_t *hwif)
378 {
379         hwif->exec_command        = ide_exec_command;
380         hwif->read_status         = ide_read_status;
381         hwif->read_altstatus      = ide_read_altstatus;
382         hwif->read_sff_dma_status = ide_read_sff_dma_status;
383
384         hwif->set_irq     = ide_set_irq;
385
386         hwif->tf_load     = ide_tf_load;
387         hwif->tf_read     = ide_tf_read;
388
389         hwif->input_data  = ata_input_data;
390         hwif->output_data = ata_output_data;
391 }
392
393 void ide_fix_driveid (struct hd_driveid *id)
394 {
395 #ifndef __LITTLE_ENDIAN
396 # ifdef __BIG_ENDIAN
397         int i;
398         u16 *stringcast;
399
400         id->config         = __le16_to_cpu(id->config);
401         id->cyls           = __le16_to_cpu(id->cyls);
402         id->reserved2      = __le16_to_cpu(id->reserved2);
403         id->heads          = __le16_to_cpu(id->heads);
404         id->track_bytes    = __le16_to_cpu(id->track_bytes);
405         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
406         id->sectors        = __le16_to_cpu(id->sectors);
407         id->vendor0        = __le16_to_cpu(id->vendor0);
408         id->vendor1        = __le16_to_cpu(id->vendor1);
409         id->vendor2        = __le16_to_cpu(id->vendor2);
410         stringcast = (u16 *)&id->serial_no[0];
411         for (i = 0; i < (20/2); i++)
412                 stringcast[i] = __le16_to_cpu(stringcast[i]);
413         id->buf_type       = __le16_to_cpu(id->buf_type);
414         id->buf_size       = __le16_to_cpu(id->buf_size);
415         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
416         stringcast = (u16 *)&id->fw_rev[0];
417         for (i = 0; i < (8/2); i++)
418                 stringcast[i] = __le16_to_cpu(stringcast[i]);
419         stringcast = (u16 *)&id->model[0];
420         for (i = 0; i < (40/2); i++)
421                 stringcast[i] = __le16_to_cpu(stringcast[i]);
422         id->dword_io       = __le16_to_cpu(id->dword_io);
423         id->reserved50     = __le16_to_cpu(id->reserved50);
424         id->field_valid    = __le16_to_cpu(id->field_valid);
425         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
426         id->cur_heads      = __le16_to_cpu(id->cur_heads);
427         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
428         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
429         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
430         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
431         id->dma_1word      = __le16_to_cpu(id->dma_1word);
432         id->dma_mword      = __le16_to_cpu(id->dma_mword);
433         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
434         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
435         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
436         id->eide_pio       = __le16_to_cpu(id->eide_pio);
437         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
438         for (i = 0; i < 2; ++i)
439                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
440         for (i = 0; i < 4; ++i)
441                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
442         id->queue_depth    = __le16_to_cpu(id->queue_depth);
443         for (i = 0; i < 4; ++i)
444                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
445         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
446         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
447         id->command_set_1  = __le16_to_cpu(id->command_set_1);
448         id->command_set_2  = __le16_to_cpu(id->command_set_2);
449         id->cfsse          = __le16_to_cpu(id->cfsse);
450         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
451         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
452         id->csf_default    = __le16_to_cpu(id->csf_default);
453         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
454         id->trseuc         = __le16_to_cpu(id->trseuc);
455         id->trsEuc         = __le16_to_cpu(id->trsEuc);
456         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
457         id->mprc           = __le16_to_cpu(id->mprc);
458         id->hw_config      = __le16_to_cpu(id->hw_config);
459         id->acoustic       = __le16_to_cpu(id->acoustic);
460         id->msrqs          = __le16_to_cpu(id->msrqs);
461         id->sxfert         = __le16_to_cpu(id->sxfert);
462         id->sal            = __le16_to_cpu(id->sal);
463         id->spg            = __le32_to_cpu(id->spg);
464         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
465         for (i = 0; i < 22; i++)
466                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
467         id->last_lun       = __le16_to_cpu(id->last_lun);
468         id->word127        = __le16_to_cpu(id->word127);
469         id->dlf            = __le16_to_cpu(id->dlf);
470         id->csfo           = __le16_to_cpu(id->csfo);
471         for (i = 0; i < 26; i++)
472                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
473         id->word156        = __le16_to_cpu(id->word156);
474         for (i = 0; i < 3; i++)
475                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
476         id->cfa_power      = __le16_to_cpu(id->cfa_power);
477         for (i = 0; i < 14; i++)
478                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
479         for (i = 0; i < 31; i++)
480                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
481         for (i = 0; i < 48; i++)
482                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
483         id->integrity_word  = __le16_to_cpu(id->integrity_word);
484 # else
485 #  error "Please fix <asm/byteorder.h>"
486 # endif
487 #endif
488 }
489
490 /*
491  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
492  * removing leading/trailing blanks and compressing internal blanks.
493  * It is primarily used to tidy up the model name/number fields as
494  * returned by the WIN_[P]IDENTIFY commands.
495  */
496
497 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
498 {
499         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
500
501         if (byteswap) {
502                 /* convert from big-endian to host byte order */
503                 for (p = end ; p != s;) {
504                         unsigned short *pp = (unsigned short *) (p -= 2);
505                         *pp = ntohs(*pp);
506                 }
507         }
508         /* strip leading blanks */
509         while (s != end && *s == ' ')
510                 ++s;
511         /* compress internal blanks and strip trailing blanks */
512         while (s != end && *s) {
513                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
514                         *p++ = *(s-1);
515         }
516         /* wipe out trailing garbage */
517         while (p != end)
518                 *p++ = '\0';
519 }
520
521 EXPORT_SYMBOL(ide_fixstring);
522
523 /*
524  * Needed for PCI irq sharing
525  */
526 int drive_is_ready (ide_drive_t *drive)
527 {
528         ide_hwif_t *hwif        = HWIF(drive);
529         u8 stat                 = 0;
530
531         if (drive->waiting_for_dma)
532                 return hwif->dma_ops->dma_test_irq(drive);
533
534 #if 0
535         /* need to guarantee 400ns since last command was issued */
536         udelay(1);
537 #endif
538
539         /*
540          * We do a passive status test under shared PCI interrupts on
541          * cards that truly share the ATA side interrupt, but may also share
542          * an interrupt with another pci card/device.  We make no assumptions
543          * about possible isa-pnp and pci-pnp issues yet.
544          */
545         if (hwif->io_ports.ctl_addr)
546                 stat = hwif->read_altstatus(hwif);
547         else
548                 /* Note: this may clear a pending IRQ!! */
549                 stat = hwif->read_status(hwif);
550
551         if (stat & BUSY_STAT)
552                 /* drive busy:  definitely not interrupting */
553                 return 0;
554
555         /* drive ready: *might* be interrupting */
556         return 1;
557 }
558
559 EXPORT_SYMBOL(drive_is_ready);
560
561 /*
562  * This routine busy-waits for the drive status to be not "busy".
563  * It then checks the status for all of the "good" bits and none
564  * of the "bad" bits, and if all is okay it returns 0.  All other
565  * cases return error -- caller may then invoke ide_error().
566  *
567  * This routine should get fixed to not hog the cpu during extra long waits..
568  * That could be done by busy-waiting for the first jiffy or two, and then
569  * setting a timer to wake up at half second intervals thereafter,
570  * until timeout is achieved, before timing out.
571  */
572 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
573 {
574         ide_hwif_t *hwif = drive->hwif;
575         unsigned long flags;
576         int i;
577         u8 stat;
578
579         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
580         stat = hwif->read_status(hwif);
581
582         if (stat & BUSY_STAT) {
583                 local_irq_set(flags);
584                 timeout += jiffies;
585                 while ((stat = hwif->read_status(hwif)) & BUSY_STAT) {
586                         if (time_after(jiffies, timeout)) {
587                                 /*
588                                  * One last read after the timeout in case
589                                  * heavy interrupt load made us not make any
590                                  * progress during the timeout..
591                                  */
592                                 stat = hwif->read_status(hwif);
593                                 if (!(stat & BUSY_STAT))
594                                         break;
595
596                                 local_irq_restore(flags);
597                                 *rstat = stat;
598                                 return -EBUSY;
599                         }
600                 }
601                 local_irq_restore(flags);
602         }
603         /*
604          * Allow status to settle, then read it again.
605          * A few rare drives vastly violate the 400ns spec here,
606          * so we'll wait up to 10usec for a "good" status
607          * rather than expensively fail things immediately.
608          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
609          */
610         for (i = 0; i < 10; i++) {
611                 udelay(1);
612                 stat = hwif->read_status(hwif);
613
614                 if (OK_STAT(stat, good, bad)) {
615                         *rstat = stat;
616                         return 0;
617                 }
618         }
619         *rstat = stat;
620         return -EFAULT;
621 }
622
623 /*
624  * In case of error returns error value after doing "*startstop = ide_error()".
625  * The caller should return the updated value of "startstop" in this case,
626  * "startstop" is unchanged when the function returns 0.
627  */
628 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
629 {
630         int err;
631         u8 stat;
632
633         /* bail early if we've exceeded max_failures */
634         if (drive->max_failures && (drive->failures > drive->max_failures)) {
635                 *startstop = ide_stopped;
636                 return 1;
637         }
638
639         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
640
641         if (err) {
642                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
643                 *startstop = ide_error(drive, s, stat);
644         }
645
646         return err;
647 }
648
649 EXPORT_SYMBOL(ide_wait_stat);
650
651 /**
652  *      ide_in_drive_list       -       look for drive in black/white list
653  *      @id: drive identifier
654  *      @drive_table: list to inspect
655  *
656  *      Look for a drive in the blacklist and the whitelist tables
657  *      Returns 1 if the drive is found in the table.
658  */
659
660 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
661 {
662         for ( ; drive_table->id_model; drive_table++)
663                 if ((!strcmp(drive_table->id_model, id->model)) &&
664                     (!drive_table->id_firmware ||
665                      strstr(id->fw_rev, drive_table->id_firmware)))
666                         return 1;
667         return 0;
668 }
669
670 EXPORT_SYMBOL_GPL(ide_in_drive_list);
671
672 /*
673  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
674  * We list them here and depend on the device side cable detection for them.
675  *
676  * Some optical devices with the buggy firmwares have the same problem.
677  */
678 static const struct drive_list_entry ivb_list[] = {
679         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
680         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
681         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
682         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
683         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
684         { "TSSTcorp CDDVDW SH-S202H"    , "SB00"        },
685         { "TSSTcorp CDDVDW SH-S202H"    , "SB01"        },
686         { NULL                          , NULL          }
687 };
688
689 /*
690  *  All hosts that use the 80c ribbon must use!
691  *  The name is derived from upper byte of word 93 and the 80c ribbon.
692  */
693 u8 eighty_ninty_three (ide_drive_t *drive)
694 {
695         ide_hwif_t *hwif = drive->hwif;
696         struct hd_driveid *id = drive->id;
697         int ivb = ide_in_drive_list(id, ivb_list);
698
699         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
700                 return 1;
701
702         if (ivb)
703                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
704                                   drive->name);
705
706         if (ide_dev_is_sata(id) && !ivb)
707                 return 1;
708
709         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
710                 goto no_80w;
711
712         /*
713          * FIXME:
714          * - change master/slave IDENTIFY order
715          * - force bit13 (80c cable present) check also for !ivb devices
716          *   (unless the slave device is pre-ATA3)
717          */
718         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
719                 return 1;
720
721 no_80w:
722         if (drive->udma33_warned == 1)
723                 return 0;
724
725         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
726                             "limiting max speed to UDMA33\n",
727                             drive->name,
728                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
729
730         drive->udma33_warned = 1;
731
732         return 0;
733 }
734
735 int ide_driveid_update(ide_drive_t *drive)
736 {
737         ide_hwif_t *hwif = drive->hwif;
738         struct hd_driveid *id;
739         unsigned long timeout, flags;
740         u8 stat;
741
742         /*
743          * Re-read drive->id for possible DMA mode
744          * change (copied from ide-probe.c)
745          */
746
747         SELECT_MASK(drive, 1);
748         hwif->set_irq(hwif, 0);
749         msleep(50);
750         hwif->exec_command(hwif, WIN_IDENTIFY);
751         timeout = jiffies + WAIT_WORSTCASE;
752         do {
753                 if (time_after(jiffies, timeout)) {
754                         SELECT_MASK(drive, 0);
755                         return 0;       /* drive timed-out */
756                 }
757
758                 msleep(50);     /* give drive a breather */
759                 stat = hwif->read_altstatus(hwif);
760         } while (stat & BUSY_STAT);
761
762         msleep(50);     /* wait for IRQ and DRQ_STAT */
763         stat = hwif->read_status(hwif);
764
765         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
766                 SELECT_MASK(drive, 0);
767                 printk("%s: CHECK for good STATUS\n", drive->name);
768                 return 0;
769         }
770         local_irq_save(flags);
771         SELECT_MASK(drive, 0);
772         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
773         if (!id) {
774                 local_irq_restore(flags);
775                 return 0;
776         }
777         hwif->input_data(drive, NULL, id, SECTOR_SIZE);
778         (void)hwif->read_status(hwif);  /* clear drive IRQ */
779         local_irq_enable();
780         local_irq_restore(flags);
781         ide_fix_driveid(id);
782         if (id) {
783                 drive->id->dma_ultra = id->dma_ultra;
784                 drive->id->dma_mword = id->dma_mword;
785                 drive->id->dma_1word = id->dma_1word;
786                 /* anything more ? */
787                 kfree(id);
788
789                 if (drive->using_dma && ide_id_dma_bug(drive))
790                         ide_dma_off(drive);
791         }
792
793         return 1;
794 }
795
796 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
797 {
798         ide_hwif_t *hwif = drive->hwif;
799         int error = 0;
800         u8 stat;
801         ide_task_t task;
802
803 #ifdef CONFIG_BLK_DEV_IDEDMA
804         if (hwif->dma_ops)      /* check if host supports DMA */
805                 hwif->dma_ops->dma_host_set(drive, 0);
806 #endif
807
808         /* Skip setting PIO flow-control modes on pre-EIDE drives */
809         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
810                 goto skip;
811
812         /*
813          * Don't use ide_wait_cmd here - it will
814          * attempt to set_geometry and recalibrate,
815          * but for some reason these don't work at
816          * this point (lost interrupt).
817          */
818         /*
819          * Select the drive, and issue the SETFEATURES command
820          */
821         disable_irq_nosync(hwif->irq);
822         
823         /*
824          *      FIXME: we race against the running IRQ here if
825          *      this is called from non IRQ context. If we use
826          *      disable_irq() we hang on the error path. Work
827          *      is needed.
828          */
829          
830         udelay(1);
831         SELECT_DRIVE(drive);
832         SELECT_MASK(drive, 0);
833         udelay(1);
834         hwif->set_irq(hwif, 0);
835
836         memset(&task, 0, sizeof(task));
837         task.tf_flags = IDE_TFLAG_OUT_FEATURE | IDE_TFLAG_OUT_NSECT;
838         task.tf.feature = SETFEATURES_XFER;
839         task.tf.nsect   = speed;
840
841         hwif->tf_load(drive, &task);
842
843         hwif->exec_command(hwif, WIN_SETFEATURES);
844
845         if (drive->quirk_list == 2)
846                 hwif->set_irq(hwif, 1);
847
848         error = __ide_wait_stat(drive, drive->ready_stat,
849                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
850                                 WAIT_CMD, &stat);
851
852         SELECT_MASK(drive, 0);
853
854         enable_irq(hwif->irq);
855
856         if (error) {
857                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
858                 return error;
859         }
860
861         drive->id->dma_ultra &= ~0xFF00;
862         drive->id->dma_mword &= ~0x0F00;
863         drive->id->dma_1word &= ~0x0F00;
864
865  skip:
866 #ifdef CONFIG_BLK_DEV_IDEDMA
867         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
868             drive->using_dma)
869                 hwif->dma_ops->dma_host_set(drive, 1);
870         else if (hwif->dma_ops) /* check if host supports DMA */
871                 ide_dma_off_quietly(drive);
872 #endif
873
874         switch(speed) {
875                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
876                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
877                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
878                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
879                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
880                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
881                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
882                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
883                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
884                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
885                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
886                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
887                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
888                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
889                 default: break;
890         }
891         if (!drive->init_speed)
892                 drive->init_speed = speed;
893         drive->current_speed = speed;
894         return error;
895 }
896
897 /*
898  * This should get invoked any time we exit the driver to
899  * wait for an interrupt response from a drive.  handler() points
900  * at the appropriate code to handle the next interrupt, and a
901  * timer is started to prevent us from waiting forever in case
902  * something goes wrong (see the ide_timer_expiry() handler later on).
903  *
904  * See also ide_execute_command
905  */
906 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
907                       unsigned int timeout, ide_expiry_t *expiry)
908 {
909         ide_hwgroup_t *hwgroup = HWGROUP(drive);
910
911         BUG_ON(hwgroup->handler);
912         hwgroup->handler        = handler;
913         hwgroup->expiry         = expiry;
914         hwgroup->timer.expires  = jiffies + timeout;
915         hwgroup->req_gen_timer  = hwgroup->req_gen;
916         add_timer(&hwgroup->timer);
917 }
918
919 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
920                       unsigned int timeout, ide_expiry_t *expiry)
921 {
922         unsigned long flags;
923         spin_lock_irqsave(&ide_lock, flags);
924         __ide_set_handler(drive, handler, timeout, expiry);
925         spin_unlock_irqrestore(&ide_lock, flags);
926 }
927
928 EXPORT_SYMBOL(ide_set_handler);
929  
930 /**
931  *      ide_execute_command     -       execute an IDE command
932  *      @drive: IDE drive to issue the command against
933  *      @command: command byte to write
934  *      @handler: handler for next phase
935  *      @timeout: timeout for command
936  *      @expiry:  handler to run on timeout
937  *
938  *      Helper function to issue an IDE command. This handles the
939  *      atomicity requirements, command timing and ensures that the 
940  *      handler and IRQ setup do not race. All IDE command kick off
941  *      should go via this function or do equivalent locking.
942  */
943
944 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
945                          unsigned timeout, ide_expiry_t *expiry)
946 {
947         unsigned long flags;
948         ide_hwif_t *hwif = HWIF(drive);
949
950         spin_lock_irqsave(&ide_lock, flags);
951         __ide_set_handler(drive, handler, timeout, expiry);
952         hwif->exec_command(hwif, cmd);
953         /*
954          * Drive takes 400nS to respond, we must avoid the IRQ being
955          * serviced before that.
956          *
957          * FIXME: we could skip this delay with care on non shared devices
958          */
959         ndelay(400);
960         spin_unlock_irqrestore(&ide_lock, flags);
961 }
962 EXPORT_SYMBOL(ide_execute_command);
963
964 void ide_execute_pkt_cmd(ide_drive_t *drive)
965 {
966         ide_hwif_t *hwif = drive->hwif;
967         unsigned long flags;
968
969         spin_lock_irqsave(&ide_lock, flags);
970         hwif->exec_command(hwif, WIN_PACKETCMD);
971         ndelay(400);
972         spin_unlock_irqrestore(&ide_lock, flags);
973 }
974 EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd);
975
976 static inline void ide_complete_drive_reset(ide_drive_t *drive, int err)
977 {
978         struct request *rq = drive->hwif->hwgroup->rq;
979
980         if (rq && blk_special_request(rq) && rq->cmd[0] == REQ_DRIVE_RESET)
981                 ide_end_request(drive, err ? err : 1, 0);
982 }
983
984 /* needed below */
985 static ide_startstop_t do_reset1 (ide_drive_t *, int);
986
987 /*
988  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
989  * during an atapi drive reset operation. If the drive has not yet responded,
990  * and we have not yet hit our maximum waiting time, then the timer is restarted
991  * for another 50ms.
992  */
993 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
994 {
995         ide_hwif_t *hwif = drive->hwif;
996         ide_hwgroup_t *hwgroup = hwif->hwgroup;
997         u8 stat;
998
999         SELECT_DRIVE(drive);
1000         udelay (10);
1001         stat = hwif->read_status(hwif);
1002
1003         if (OK_STAT(stat, 0, BUSY_STAT))
1004                 printk("%s: ATAPI reset complete\n", drive->name);
1005         else {
1006                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1007                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1008                         /* continue polling */
1009                         return ide_started;
1010                 }
1011                 /* end of polling */
1012                 hwgroup->polling = 0;
1013                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
1014                                 drive->name, stat);
1015                 /* do it the old fashioned way */
1016                 return do_reset1(drive, 1);
1017         }
1018         /* done polling */
1019         hwgroup->polling = 0;
1020         ide_complete_drive_reset(drive, 0);
1021         return ide_stopped;
1022 }
1023
1024 /*
1025  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1026  * during an ide reset operation. If the drives have not yet responded,
1027  * and we have not yet hit our maximum waiting time, then the timer is restarted
1028  * for another 50ms.
1029  */
1030 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1031 {
1032         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
1033         ide_hwif_t *hwif        = HWIF(drive);
1034         const struct ide_port_ops *port_ops = hwif->port_ops;
1035         u8 tmp;
1036         int err = 0;
1037
1038         if (port_ops && port_ops->reset_poll) {
1039                 err = port_ops->reset_poll(drive);
1040                 if (err) {
1041                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1042                                 hwif->name, drive->name);
1043                         goto out;
1044                 }
1045         }
1046
1047         tmp = hwif->read_status(hwif);
1048
1049         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
1050                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1051                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1052                         /* continue polling */
1053                         return ide_started;
1054                 }
1055                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1056                 drive->failures++;
1057                 err = -EIO;
1058         } else  {
1059                 printk("%s: reset: ", hwif->name);
1060                 tmp = ide_read_error(drive);
1061
1062                 if (tmp == 1) {
1063                         printk("success\n");
1064                         drive->failures = 0;
1065                 } else {
1066                         drive->failures++;
1067                         printk("master: ");
1068                         switch (tmp & 0x7f) {
1069                                 case 1: printk("passed");
1070                                         break;
1071                                 case 2: printk("formatter device error");
1072                                         break;
1073                                 case 3: printk("sector buffer error");
1074                                         break;
1075                                 case 4: printk("ECC circuitry error");
1076                                         break;
1077                                 case 5: printk("controlling MPU error");
1078                                         break;
1079                                 default:printk("error (0x%02x?)", tmp);
1080                         }
1081                         if (tmp & 0x80)
1082                                 printk("; slave: failed");
1083                         printk("\n");
1084                         err = -EIO;
1085                 }
1086         }
1087 out:
1088         hwgroup->polling = 0;   /* done polling */
1089         ide_complete_drive_reset(drive, err);
1090         return ide_stopped;
1091 }
1092
1093 static void ide_disk_pre_reset(ide_drive_t *drive)
1094 {
1095         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1096
1097         drive->special.all = 0;
1098         drive->special.b.set_geometry = legacy;
1099         drive->special.b.recalibrate  = legacy;
1100         drive->mult_count = 0;
1101         if (!drive->keep_settings && !drive->using_dma)
1102                 drive->mult_req = 0;
1103         if (drive->mult_req != drive->mult_count)
1104                 drive->special.b.set_multmode = 1;
1105 }
1106
1107 static void pre_reset(ide_drive_t *drive)
1108 {
1109         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
1110
1111         if (drive->media == ide_disk)
1112                 ide_disk_pre_reset(drive);
1113         else
1114                 drive->post_reset = 1;
1115
1116         if (drive->using_dma) {
1117                 if (drive->crc_count)
1118                         ide_check_dma_crc(drive);
1119                 else
1120                         ide_dma_off(drive);
1121         }
1122
1123         if (!drive->keep_settings) {
1124                 if (!drive->using_dma) {
1125                         drive->unmask = 0;
1126                         drive->io_32bit = 0;
1127                 }
1128                 return;
1129         }
1130
1131         if (port_ops && port_ops->pre_reset)
1132                 port_ops->pre_reset(drive);
1133
1134         if (drive->current_speed != 0xff)
1135                 drive->desired_speed = drive->current_speed;
1136         drive->current_speed = 0xff;
1137 }
1138
1139 /*
1140  * do_reset1() attempts to recover a confused drive by resetting it.
1141  * Unfortunately, resetting a disk drive actually resets all devices on
1142  * the same interface, so it can really be thought of as resetting the
1143  * interface rather than resetting the drive.
1144  *
1145  * ATAPI devices have their own reset mechanism which allows them to be
1146  * individually reset without clobbering other devices on the same interface.
1147  *
1148  * Unfortunately, the IDE interface does not generate an interrupt to let
1149  * us know when the reset operation has finished, so we must poll for this.
1150  * Equally poor, though, is the fact that this may a very long time to complete,
1151  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1152  * we set a timer to poll at 50ms intervals.
1153  */
1154 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1155 {
1156         unsigned int unit;
1157         unsigned long flags;
1158         ide_hwif_t *hwif;
1159         ide_hwgroup_t *hwgroup;
1160         struct ide_io_ports *io_ports;
1161         const struct ide_port_ops *port_ops;
1162
1163         spin_lock_irqsave(&ide_lock, flags);
1164         hwif = HWIF(drive);
1165         hwgroup = HWGROUP(drive);
1166
1167         io_ports = &hwif->io_ports;
1168
1169         /* We must not reset with running handlers */
1170         BUG_ON(hwgroup->handler != NULL);
1171
1172         /* For an ATAPI device, first try an ATAPI SRST. */
1173         if (drive->media != ide_disk && !do_not_try_atapi) {
1174                 pre_reset(drive);
1175                 SELECT_DRIVE(drive);
1176                 udelay (20);
1177                 hwif->exec_command(hwif, WIN_SRST);
1178                 ndelay(400);
1179                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1180                 hwgroup->polling = 1;
1181                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1182                 spin_unlock_irqrestore(&ide_lock, flags);
1183                 return ide_started;
1184         }
1185
1186         /*
1187          * First, reset any device state data we were maintaining
1188          * for any of the drives on this interface.
1189          */
1190         for (unit = 0; unit < MAX_DRIVES; ++unit)
1191                 pre_reset(&hwif->drives[unit]);
1192
1193         if (io_ports->ctl_addr == 0) {
1194                 spin_unlock_irqrestore(&ide_lock, flags);
1195                 ide_complete_drive_reset(drive, -ENXIO);
1196                 return ide_stopped;
1197         }
1198
1199         /*
1200          * Note that we also set nIEN while resetting the device,
1201          * to mask unwanted interrupts from the interface during the reset.
1202          * However, due to the design of PC hardware, this will cause an
1203          * immediate interrupt due to the edge transition it produces.
1204          * This single interrupt gives us a "fast poll" for drives that
1205          * recover from reset very quickly, saving us the first 50ms wait time.
1206          *
1207          * TODO: add ->softreset method and stop abusing ->set_irq
1208          */
1209         /* set SRST and nIEN */
1210         hwif->set_irq(hwif, 4);
1211         /* more than enough time */
1212         udelay(10);
1213         /* clear SRST, leave nIEN (unless device is on the quirk list) */
1214         hwif->set_irq(hwif, drive->quirk_list == 2);
1215         /* more than enough time */
1216         udelay(10);
1217         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1218         hwgroup->polling = 1;
1219         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1220
1221         /*
1222          * Some weird controller like resetting themselves to a strange
1223          * state when the disks are reset this way. At least, the Winbond
1224          * 553 documentation says that
1225          */
1226         port_ops = hwif->port_ops;
1227         if (port_ops && port_ops->resetproc)
1228                 port_ops->resetproc(drive);
1229
1230         spin_unlock_irqrestore(&ide_lock, flags);
1231         return ide_started;
1232 }
1233
1234 /*
1235  * ide_do_reset() is the entry point to the drive/interface reset code.
1236  */
1237
1238 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1239 {
1240         return do_reset1(drive, 0);
1241 }
1242
1243 EXPORT_SYMBOL(ide_do_reset);
1244
1245 /*
1246  * ide_wait_not_busy() waits for the currently selected device on the hwif
1247  * to report a non-busy status, see comments in ide_probe_port().
1248  */
1249 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1250 {
1251         u8 stat = 0;
1252
1253         while(timeout--) {
1254                 /*
1255                  * Turn this into a schedule() sleep once I'm sure
1256                  * about locking issues (2.5 work ?).
1257                  */
1258                 mdelay(1);
1259                 stat = hwif->read_status(hwif);
1260                 if ((stat & BUSY_STAT) == 0)
1261                         return 0;
1262                 /*
1263                  * Assume a value of 0xff means nothing is connected to
1264                  * the interface and it doesn't implement the pull-down
1265                  * resistor on D7.
1266                  */
1267                 if (stat == 0xff)
1268                         return -ENODEV;
1269                 touch_softlockup_watchdog();
1270                 touch_nmi_watchdog();
1271         }
1272         return -EBUSY;
1273 }
1274
1275 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1276