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1 /*
2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
4  *
5  */
6
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/string.h>
10 #include <linux/kernel.h>
11 #include <linux/timer.h>
12 #include <linux/mm.h>
13 #include <linux/interrupt.h>
14 #include <linux/major.h>
15 #include <linux/errno.h>
16 #include <linux/genhd.h>
17 #include <linux/blkpg.h>
18 #include <linux/slab.h>
19 #include <linux/pci.h>
20 #include <linux/delay.h>
21 #include <linux/hdreg.h>
22 #include <linux/ide.h>
23 #include <linux/bitops.h>
24 #include <linux/nmi.h>
25
26 #include <asm/byteorder.h>
27 #include <asm/irq.h>
28 #include <asm/uaccess.h>
29 #include <asm/io.h>
30
31 /*
32  *      Conventional PIO operations for ATA devices
33  */
34
35 static u8 ide_inb (unsigned long port)
36 {
37         return (u8) inb(port);
38 }
39
40 static void ide_outb (u8 val, unsigned long port)
41 {
42         outb(val, port);
43 }
44
45 static void ide_outbsync(ide_hwif_t *hwif, u8 addr, unsigned long port)
46 {
47         outb(addr, port);
48 }
49
50 void default_hwif_iops (ide_hwif_t *hwif)
51 {
52         hwif->OUTB      = ide_outb;
53         hwif->OUTBSYNC  = ide_outbsync;
54         hwif->INB       = ide_inb;
55 }
56
57 /*
58  *      MMIO operations, typically used for SATA controllers
59  */
60
61 static u8 ide_mm_inb (unsigned long port)
62 {
63         return (u8) readb((void __iomem *) port);
64 }
65
66 static void ide_mm_outb (u8 value, unsigned long port)
67 {
68         writeb(value, (void __iomem *) port);
69 }
70
71 static void ide_mm_outbsync(ide_hwif_t *hwif, u8 value, unsigned long port)
72 {
73         writeb(value, (void __iomem *) port);
74 }
75
76 void default_hwif_mmiops (ide_hwif_t *hwif)
77 {
78         hwif->OUTB      = ide_mm_outb;
79         /* Most systems will need to override OUTBSYNC, alas however
80            this one is controller specific! */
81         hwif->OUTBSYNC  = ide_mm_outbsync;
82         hwif->INB       = ide_mm_inb;
83 }
84
85 EXPORT_SYMBOL(default_hwif_mmiops);
86
87 void SELECT_DRIVE (ide_drive_t *drive)
88 {
89         ide_hwif_t *hwif = drive->hwif;
90         const struct ide_port_ops *port_ops = hwif->port_ops;
91
92         if (port_ops && port_ops->selectproc)
93                 port_ops->selectproc(drive);
94
95         hwif->OUTB(drive->select.all, hwif->io_ports.device_addr);
96 }
97
98 void SELECT_MASK(ide_drive_t *drive, int mask)
99 {
100         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
101
102         if (port_ops && port_ops->maskproc)
103                 port_ops->maskproc(drive, mask);
104 }
105
106 static void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
107 {
108         if (hwif->host_flags & IDE_HFLAG_MMIO)
109                 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
110         else
111                 outb(cmd, hwif->io_ports.command_addr);
112 }
113
114 static u8 ide_read_status(ide_hwif_t *hwif)
115 {
116         if (hwif->host_flags & IDE_HFLAG_MMIO)
117                 return readb((void __iomem *)hwif->io_ports.status_addr);
118         else
119                 return inb(hwif->io_ports.status_addr);
120 }
121
122 static u8 ide_read_altstatus(ide_hwif_t *hwif)
123 {
124         if (hwif->host_flags & IDE_HFLAG_MMIO)
125                 return readb((void __iomem *)hwif->io_ports.ctl_addr);
126         else
127                 return inb(hwif->io_ports.ctl_addr);
128 }
129
130 static u8 ide_read_sff_dma_status(ide_hwif_t *hwif)
131 {
132         if (hwif->host_flags & IDE_HFLAG_MMIO)
133                 return readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
134         else
135                 return inb(hwif->dma_base + ATA_DMA_STATUS);
136 }
137
138 static void ide_set_irq(ide_hwif_t *hwif, int on)
139 {
140         u8 ctl = ATA_DEVCTL_OBS;
141
142         if (on == 4) { /* hack for SRST */
143                 ctl |= 4;
144                 on &= ~4;
145         }
146
147         ctl |= on ? 0 : 2;
148
149         if (hwif->host_flags & IDE_HFLAG_MMIO)
150                 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
151         else
152                 outb(ctl, hwif->io_ports.ctl_addr);
153 }
154
155 static void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
156 {
157         ide_hwif_t *hwif = drive->hwif;
158         struct ide_io_ports *io_ports = &hwif->io_ports;
159         struct ide_taskfile *tf = &task->tf;
160         void (*tf_outb)(u8 addr, unsigned long port);
161         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
162         u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
163
164         if (mmio)
165                 tf_outb = ide_mm_outb;
166         else
167                 tf_outb = ide_outb;
168
169         if (task->tf_flags & IDE_TFLAG_FLAGGED)
170                 HIHI = 0xFF;
171
172         if (task->tf_flags & IDE_TFLAG_OUT_DATA) {
173                 u16 data = (tf->hob_data << 8) | tf->data;
174
175                 if (mmio)
176                         writew(data, (void __iomem *)io_ports->data_addr);
177                 else
178                         outw(data, io_ports->data_addr);
179         }
180
181         if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
182                 tf_outb(tf->hob_feature, io_ports->feature_addr);
183         if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
184                 tf_outb(tf->hob_nsect, io_ports->nsect_addr);
185         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
186                 tf_outb(tf->hob_lbal, io_ports->lbal_addr);
187         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
188                 tf_outb(tf->hob_lbam, io_ports->lbam_addr);
189         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
190                 tf_outb(tf->hob_lbah, io_ports->lbah_addr);
191
192         if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
193                 tf_outb(tf->feature, io_ports->feature_addr);
194         if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
195                 tf_outb(tf->nsect, io_ports->nsect_addr);
196         if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
197                 tf_outb(tf->lbal, io_ports->lbal_addr);
198         if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
199                 tf_outb(tf->lbam, io_ports->lbam_addr);
200         if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
201                 tf_outb(tf->lbah, io_ports->lbah_addr);
202
203         if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
204                 tf_outb((tf->device & HIHI) | drive->select.all,
205                          io_ports->device_addr);
206 }
207
208 static void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
209 {
210         ide_hwif_t *hwif = drive->hwif;
211         struct ide_io_ports *io_ports = &hwif->io_ports;
212         struct ide_taskfile *tf = &task->tf;
213         void (*tf_outb)(u8 addr, unsigned long port);
214         u8 (*tf_inb)(unsigned long port);
215         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
216
217         if (mmio) {
218                 tf_outb = ide_mm_outb;
219                 tf_inb  = ide_mm_inb;
220         } else {
221                 tf_outb = ide_outb;
222                 tf_inb  = ide_inb;
223         }
224
225         if (task->tf_flags & IDE_TFLAG_IN_DATA) {
226                 u16 data;
227
228                 if (mmio)
229                         data = readw((void __iomem *)io_ports->data_addr);
230                 else
231                         data = inw(io_ports->data_addr);
232
233                 tf->data = data & 0xff;
234                 tf->hob_data = (data >> 8) & 0xff;
235         }
236
237         /* be sure we're looking at the low order bits */
238         tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
239
240         if (task->tf_flags & IDE_TFLAG_IN_NSECT)
241                 tf->nsect  = tf_inb(io_ports->nsect_addr);
242         if (task->tf_flags & IDE_TFLAG_IN_LBAL)
243                 tf->lbal   = tf_inb(io_ports->lbal_addr);
244         if (task->tf_flags & IDE_TFLAG_IN_LBAM)
245                 tf->lbam   = tf_inb(io_ports->lbam_addr);
246         if (task->tf_flags & IDE_TFLAG_IN_LBAH)
247                 tf->lbah   = tf_inb(io_ports->lbah_addr);
248         if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
249                 tf->device = tf_inb(io_ports->device_addr);
250
251         if (task->tf_flags & IDE_TFLAG_LBA48) {
252                 tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
253
254                 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
255                         tf->hob_feature = tf_inb(io_ports->feature_addr);
256                 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
257                         tf->hob_nsect   = tf_inb(io_ports->nsect_addr);
258                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
259                         tf->hob_lbal    = tf_inb(io_ports->lbal_addr);
260                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
261                         tf->hob_lbam    = tf_inb(io_ports->lbam_addr);
262                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
263                         tf->hob_lbah    = tf_inb(io_ports->lbah_addr);
264         }
265 }
266
267 /*
268  * Some localbus EIDE interfaces require a special access sequence
269  * when using 32-bit I/O instructions to transfer data.  We call this
270  * the "vlb_sync" sequence, which consists of three successive reads
271  * of the sector count register location, with interrupts disabled
272  * to ensure that the reads all happen together.
273  */
274 static void ata_vlb_sync(unsigned long port)
275 {
276         (void)inb(port);
277         (void)inb(port);
278         (void)inb(port);
279 }
280
281 /*
282  * This is used for most PIO data transfers *from* the IDE interface
283  *
284  * These routines will round up any request for an odd number of bytes,
285  * so if an odd len is specified, be sure that there's at least one
286  * extra byte allocated for the buffer.
287  */
288 static void ata_input_data(ide_drive_t *drive, struct request *rq,
289                            void *buf, unsigned int len)
290 {
291         ide_hwif_t *hwif = drive->hwif;
292         struct ide_io_ports *io_ports = &hwif->io_ports;
293         unsigned long data_addr = io_ports->data_addr;
294         u8 io_32bit = drive->io_32bit;
295         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
296
297         len++;
298
299         if (io_32bit) {
300                 unsigned long uninitialized_var(flags);
301
302                 if ((io_32bit & 2) && !mmio) {
303                         local_irq_save(flags);
304                         ata_vlb_sync(io_ports->nsect_addr);
305                 }
306
307                 if (mmio)
308                         __ide_mm_insl((void __iomem *)data_addr, buf, len / 4);
309                 else
310                         insl(data_addr, buf, len / 4);
311
312                 if ((io_32bit & 2) && !mmio)
313                         local_irq_restore(flags);
314
315                 if ((len & 3) >= 2) {
316                         if (mmio)
317                                 __ide_mm_insw((void __iomem *)data_addr,
318                                                 (u8 *)buf + (len & ~3), 1);
319                         else
320                                 insw(data_addr, (u8 *)buf + (len & ~3), 1);
321                 }
322         } else {
323                 if (mmio)
324                         __ide_mm_insw((void __iomem *)data_addr, buf, len / 2);
325                 else
326                         insw(data_addr, buf, len / 2);
327         }
328 }
329
330 /*
331  * This is used for most PIO data transfers *to* the IDE interface
332  */
333 static void ata_output_data(ide_drive_t *drive, struct request *rq,
334                             void *buf, unsigned int len)
335 {
336         ide_hwif_t *hwif = drive->hwif;
337         struct ide_io_ports *io_ports = &hwif->io_ports;
338         unsigned long data_addr = io_ports->data_addr;
339         u8 io_32bit = drive->io_32bit;
340         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
341
342         if (io_32bit) {
343                 unsigned long uninitialized_var(flags);
344
345                 if ((io_32bit & 2) && !mmio) {
346                         local_irq_save(flags);
347                         ata_vlb_sync(io_ports->nsect_addr);
348                 }
349
350                 if (mmio)
351                         __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4);
352                 else
353                         outsl(data_addr, buf, len / 4);
354
355                 if ((io_32bit & 2) && !mmio)
356                         local_irq_restore(flags);
357
358                 if ((len & 3) >= 2) {
359                         if (mmio)
360                                 __ide_mm_outsw((void __iomem *)data_addr,
361                                                  (u8 *)buf + (len & ~3), 1);
362                         else
363                                 outsw(data_addr, (u8 *)buf + (len & ~3), 1);
364                 }
365         } else {
366                 if (mmio)
367                         __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2);
368                 else
369                         outsw(data_addr, buf, len / 2);
370         }
371 }
372
373 void default_hwif_transport(ide_hwif_t *hwif)
374 {
375         hwif->exec_command        = ide_exec_command;
376         hwif->read_status         = ide_read_status;
377         hwif->read_altstatus      = ide_read_altstatus;
378         hwif->read_sff_dma_status = ide_read_sff_dma_status;
379
380         hwif->set_irq     = ide_set_irq;
381
382         hwif->tf_load     = ide_tf_load;
383         hwif->tf_read     = ide_tf_read;
384
385         hwif->input_data  = ata_input_data;
386         hwif->output_data = ata_output_data;
387 }
388
389 void ide_fix_driveid (struct hd_driveid *id)
390 {
391 #ifndef __LITTLE_ENDIAN
392 # ifdef __BIG_ENDIAN
393         int i;
394         u16 *stringcast;
395
396         id->config         = __le16_to_cpu(id->config);
397         id->cyls           = __le16_to_cpu(id->cyls);
398         id->reserved2      = __le16_to_cpu(id->reserved2);
399         id->heads          = __le16_to_cpu(id->heads);
400         id->track_bytes    = __le16_to_cpu(id->track_bytes);
401         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
402         id->sectors        = __le16_to_cpu(id->sectors);
403         id->vendor0        = __le16_to_cpu(id->vendor0);
404         id->vendor1        = __le16_to_cpu(id->vendor1);
405         id->vendor2        = __le16_to_cpu(id->vendor2);
406         stringcast = (u16 *)&id->serial_no[0];
407         for (i = 0; i < (20/2); i++)
408                 stringcast[i] = __le16_to_cpu(stringcast[i]);
409         id->buf_type       = __le16_to_cpu(id->buf_type);
410         id->buf_size       = __le16_to_cpu(id->buf_size);
411         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
412         stringcast = (u16 *)&id->fw_rev[0];
413         for (i = 0; i < (8/2); i++)
414                 stringcast[i] = __le16_to_cpu(stringcast[i]);
415         stringcast = (u16 *)&id->model[0];
416         for (i = 0; i < (40/2); i++)
417                 stringcast[i] = __le16_to_cpu(stringcast[i]);
418         id->dword_io       = __le16_to_cpu(id->dword_io);
419         id->reserved50     = __le16_to_cpu(id->reserved50);
420         id->field_valid    = __le16_to_cpu(id->field_valid);
421         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
422         id->cur_heads      = __le16_to_cpu(id->cur_heads);
423         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
424         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
425         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
426         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
427         id->dma_1word      = __le16_to_cpu(id->dma_1word);
428         id->dma_mword      = __le16_to_cpu(id->dma_mword);
429         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
430         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
431         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
432         id->eide_pio       = __le16_to_cpu(id->eide_pio);
433         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
434         for (i = 0; i < 2; ++i)
435                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
436         for (i = 0; i < 4; ++i)
437                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
438         id->queue_depth    = __le16_to_cpu(id->queue_depth);
439         for (i = 0; i < 4; ++i)
440                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
441         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
442         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
443         id->command_set_1  = __le16_to_cpu(id->command_set_1);
444         id->command_set_2  = __le16_to_cpu(id->command_set_2);
445         id->cfsse          = __le16_to_cpu(id->cfsse);
446         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
447         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
448         id->csf_default    = __le16_to_cpu(id->csf_default);
449         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
450         id->trseuc         = __le16_to_cpu(id->trseuc);
451         id->trsEuc         = __le16_to_cpu(id->trsEuc);
452         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
453         id->mprc           = __le16_to_cpu(id->mprc);
454         id->hw_config      = __le16_to_cpu(id->hw_config);
455         id->acoustic       = __le16_to_cpu(id->acoustic);
456         id->msrqs          = __le16_to_cpu(id->msrqs);
457         id->sxfert         = __le16_to_cpu(id->sxfert);
458         id->sal            = __le16_to_cpu(id->sal);
459         id->spg            = __le32_to_cpu(id->spg);
460         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
461         for (i = 0; i < 22; i++)
462                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
463         id->last_lun       = __le16_to_cpu(id->last_lun);
464         id->word127        = __le16_to_cpu(id->word127);
465         id->dlf            = __le16_to_cpu(id->dlf);
466         id->csfo           = __le16_to_cpu(id->csfo);
467         for (i = 0; i < 26; i++)
468                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
469         id->word156        = __le16_to_cpu(id->word156);
470         for (i = 0; i < 3; i++)
471                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
472         id->cfa_power      = __le16_to_cpu(id->cfa_power);
473         for (i = 0; i < 14; i++)
474                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
475         for (i = 0; i < 31; i++)
476                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
477         for (i = 0; i < 48; i++)
478                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
479         id->integrity_word  = __le16_to_cpu(id->integrity_word);
480 # else
481 #  error "Please fix <asm/byteorder.h>"
482 # endif
483 #endif
484 }
485
486 /*
487  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
488  * removing leading/trailing blanks and compressing internal blanks.
489  * It is primarily used to tidy up the model name/number fields as
490  * returned by the WIN_[P]IDENTIFY commands.
491  */
492
493 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
494 {
495         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
496
497         if (byteswap) {
498                 /* convert from big-endian to host byte order */
499                 for (p = end ; p != s;) {
500                         unsigned short *pp = (unsigned short *) (p -= 2);
501                         *pp = ntohs(*pp);
502                 }
503         }
504         /* strip leading blanks */
505         while (s != end && *s == ' ')
506                 ++s;
507         /* compress internal blanks and strip trailing blanks */
508         while (s != end && *s) {
509                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
510                         *p++ = *(s-1);
511         }
512         /* wipe out trailing garbage */
513         while (p != end)
514                 *p++ = '\0';
515 }
516
517 EXPORT_SYMBOL(ide_fixstring);
518
519 /*
520  * Needed for PCI irq sharing
521  */
522 int drive_is_ready (ide_drive_t *drive)
523 {
524         ide_hwif_t *hwif        = HWIF(drive);
525         u8 stat                 = 0;
526
527         if (drive->waiting_for_dma)
528                 return hwif->dma_ops->dma_test_irq(drive);
529
530 #if 0
531         /* need to guarantee 400ns since last command was issued */
532         udelay(1);
533 #endif
534
535         /*
536          * We do a passive status test under shared PCI interrupts on
537          * cards that truly share the ATA side interrupt, but may also share
538          * an interrupt with another pci card/device.  We make no assumptions
539          * about possible isa-pnp and pci-pnp issues yet.
540          */
541         if (hwif->io_ports.ctl_addr)
542                 stat = hwif->read_altstatus(hwif);
543         else
544                 /* Note: this may clear a pending IRQ!! */
545                 stat = hwif->read_status(hwif);
546
547         if (stat & BUSY_STAT)
548                 /* drive busy:  definitely not interrupting */
549                 return 0;
550
551         /* drive ready: *might* be interrupting */
552         return 1;
553 }
554
555 EXPORT_SYMBOL(drive_is_ready);
556
557 /*
558  * This routine busy-waits for the drive status to be not "busy".
559  * It then checks the status for all of the "good" bits and none
560  * of the "bad" bits, and if all is okay it returns 0.  All other
561  * cases return error -- caller may then invoke ide_error().
562  *
563  * This routine should get fixed to not hog the cpu during extra long waits..
564  * That could be done by busy-waiting for the first jiffy or two, and then
565  * setting a timer to wake up at half second intervals thereafter,
566  * until timeout is achieved, before timing out.
567  */
568 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
569 {
570         ide_hwif_t *hwif = drive->hwif;
571         unsigned long flags;
572         int i;
573         u8 stat;
574
575         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
576         stat = hwif->read_status(hwif);
577
578         if (stat & BUSY_STAT) {
579                 local_irq_set(flags);
580                 timeout += jiffies;
581                 while ((stat = hwif->read_status(hwif)) & BUSY_STAT) {
582                         if (time_after(jiffies, timeout)) {
583                                 /*
584                                  * One last read after the timeout in case
585                                  * heavy interrupt load made us not make any
586                                  * progress during the timeout..
587                                  */
588                                 stat = hwif->read_status(hwif);
589                                 if (!(stat & BUSY_STAT))
590                                         break;
591
592                                 local_irq_restore(flags);
593                                 *rstat = stat;
594                                 return -EBUSY;
595                         }
596                 }
597                 local_irq_restore(flags);
598         }
599         /*
600          * Allow status to settle, then read it again.
601          * A few rare drives vastly violate the 400ns spec here,
602          * so we'll wait up to 10usec for a "good" status
603          * rather than expensively fail things immediately.
604          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
605          */
606         for (i = 0; i < 10; i++) {
607                 udelay(1);
608                 stat = hwif->read_status(hwif);
609
610                 if (OK_STAT(stat, good, bad)) {
611                         *rstat = stat;
612                         return 0;
613                 }
614         }
615         *rstat = stat;
616         return -EFAULT;
617 }
618
619 /*
620  * In case of error returns error value after doing "*startstop = ide_error()".
621  * The caller should return the updated value of "startstop" in this case,
622  * "startstop" is unchanged when the function returns 0.
623  */
624 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
625 {
626         int err;
627         u8 stat;
628
629         /* bail early if we've exceeded max_failures */
630         if (drive->max_failures && (drive->failures > drive->max_failures)) {
631                 *startstop = ide_stopped;
632                 return 1;
633         }
634
635         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
636
637         if (err) {
638                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
639                 *startstop = ide_error(drive, s, stat);
640         }
641
642         return err;
643 }
644
645 EXPORT_SYMBOL(ide_wait_stat);
646
647 /**
648  *      ide_in_drive_list       -       look for drive in black/white list
649  *      @id: drive identifier
650  *      @drive_table: list to inspect
651  *
652  *      Look for a drive in the blacklist and the whitelist tables
653  *      Returns 1 if the drive is found in the table.
654  */
655
656 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
657 {
658         for ( ; drive_table->id_model; drive_table++)
659                 if ((!strcmp(drive_table->id_model, id->model)) &&
660                     (!drive_table->id_firmware ||
661                      strstr(id->fw_rev, drive_table->id_firmware)))
662                         return 1;
663         return 0;
664 }
665
666 EXPORT_SYMBOL_GPL(ide_in_drive_list);
667
668 /*
669  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
670  * We list them here and depend on the device side cable detection for them.
671  *
672  * Some optical devices with the buggy firmwares have the same problem.
673  */
674 static const struct drive_list_entry ivb_list[] = {
675         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
676         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
677         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
678         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
679         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
680         { "TSSTcorp CDDVDW SH-S202H"    , "SB00"        },
681         { "TSSTcorp CDDVDW SH-S202H"    , "SB01"        },
682         { NULL                          , NULL          }
683 };
684
685 /*
686  *  All hosts that use the 80c ribbon must use!
687  *  The name is derived from upper byte of word 93 and the 80c ribbon.
688  */
689 u8 eighty_ninty_three (ide_drive_t *drive)
690 {
691         ide_hwif_t *hwif = drive->hwif;
692         struct hd_driveid *id = drive->id;
693         int ivb = ide_in_drive_list(id, ivb_list);
694
695         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
696                 return 1;
697
698         if (ivb)
699                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
700                                   drive->name);
701
702         if (ide_dev_is_sata(id) && !ivb)
703                 return 1;
704
705         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
706                 goto no_80w;
707
708         /*
709          * FIXME:
710          * - change master/slave IDENTIFY order
711          * - force bit13 (80c cable present) check also for !ivb devices
712          *   (unless the slave device is pre-ATA3)
713          */
714         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
715                 return 1;
716
717 no_80w:
718         if (drive->udma33_warned == 1)
719                 return 0;
720
721         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
722                             "limiting max speed to UDMA33\n",
723                             drive->name,
724                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
725
726         drive->udma33_warned = 1;
727
728         return 0;
729 }
730
731 int ide_driveid_update(ide_drive_t *drive)
732 {
733         ide_hwif_t *hwif = drive->hwif;
734         struct hd_driveid *id;
735         unsigned long timeout, flags;
736         u8 stat;
737
738         /*
739          * Re-read drive->id for possible DMA mode
740          * change (copied from ide-probe.c)
741          */
742
743         SELECT_MASK(drive, 1);
744         hwif->set_irq(hwif, 0);
745         msleep(50);
746         hwif->exec_command(hwif, WIN_IDENTIFY);
747         timeout = jiffies + WAIT_WORSTCASE;
748         do {
749                 if (time_after(jiffies, timeout)) {
750                         SELECT_MASK(drive, 0);
751                         return 0;       /* drive timed-out */
752                 }
753
754                 msleep(50);     /* give drive a breather */
755                 stat = hwif->read_altstatus(hwif);
756         } while (stat & BUSY_STAT);
757
758         msleep(50);     /* wait for IRQ and DRQ_STAT */
759         stat = hwif->read_status(hwif);
760
761         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
762                 SELECT_MASK(drive, 0);
763                 printk("%s: CHECK for good STATUS\n", drive->name);
764                 return 0;
765         }
766         local_irq_save(flags);
767         SELECT_MASK(drive, 0);
768         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
769         if (!id) {
770                 local_irq_restore(flags);
771                 return 0;
772         }
773         hwif->input_data(drive, NULL, id, SECTOR_SIZE);
774         (void)hwif->read_status(hwif);  /* clear drive IRQ */
775         local_irq_enable();
776         local_irq_restore(flags);
777         ide_fix_driveid(id);
778         if (id) {
779                 drive->id->dma_ultra = id->dma_ultra;
780                 drive->id->dma_mword = id->dma_mword;
781                 drive->id->dma_1word = id->dma_1word;
782                 /* anything more ? */
783                 kfree(id);
784
785                 if (drive->using_dma && ide_id_dma_bug(drive))
786                         ide_dma_off(drive);
787         }
788
789         return 1;
790 }
791
792 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
793 {
794         ide_hwif_t *hwif = drive->hwif;
795         int error = 0;
796         u8 stat;
797         ide_task_t task;
798
799 #ifdef CONFIG_BLK_DEV_IDEDMA
800         if (hwif->dma_ops)      /* check if host supports DMA */
801                 hwif->dma_ops->dma_host_set(drive, 0);
802 #endif
803
804         /* Skip setting PIO flow-control modes on pre-EIDE drives */
805         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
806                 goto skip;
807
808         /*
809          * Don't use ide_wait_cmd here - it will
810          * attempt to set_geometry and recalibrate,
811          * but for some reason these don't work at
812          * this point (lost interrupt).
813          */
814         /*
815          * Select the drive, and issue the SETFEATURES command
816          */
817         disable_irq_nosync(hwif->irq);
818         
819         /*
820          *      FIXME: we race against the running IRQ here if
821          *      this is called from non IRQ context. If we use
822          *      disable_irq() we hang on the error path. Work
823          *      is needed.
824          */
825          
826         udelay(1);
827         SELECT_DRIVE(drive);
828         SELECT_MASK(drive, 0);
829         udelay(1);
830         hwif->set_irq(hwif, 0);
831
832         memset(&task, 0, sizeof(task));
833         task.tf_flags = IDE_TFLAG_OUT_FEATURE | IDE_TFLAG_OUT_NSECT;
834         task.tf.feature = SETFEATURES_XFER;
835         task.tf.nsect   = speed;
836
837         hwif->tf_load(drive, &task);
838
839         hwif->exec_command(hwif, WIN_SETFEATURES);
840
841         if (drive->quirk_list == 2)
842                 hwif->set_irq(hwif, 1);
843
844         error = __ide_wait_stat(drive, drive->ready_stat,
845                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
846                                 WAIT_CMD, &stat);
847
848         SELECT_MASK(drive, 0);
849
850         enable_irq(hwif->irq);
851
852         if (error) {
853                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
854                 return error;
855         }
856
857         drive->id->dma_ultra &= ~0xFF00;
858         drive->id->dma_mword &= ~0x0F00;
859         drive->id->dma_1word &= ~0x0F00;
860
861  skip:
862 #ifdef CONFIG_BLK_DEV_IDEDMA
863         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
864             drive->using_dma)
865                 hwif->dma_ops->dma_host_set(drive, 1);
866         else if (hwif->dma_ops) /* check if host supports DMA */
867                 ide_dma_off_quietly(drive);
868 #endif
869
870         switch(speed) {
871                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
872                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
873                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
874                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
875                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
876                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
877                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
878                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
879                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
880                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
881                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
882                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
883                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
884                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
885                 default: break;
886         }
887         if (!drive->init_speed)
888                 drive->init_speed = speed;
889         drive->current_speed = speed;
890         return error;
891 }
892
893 /*
894  * This should get invoked any time we exit the driver to
895  * wait for an interrupt response from a drive.  handler() points
896  * at the appropriate code to handle the next interrupt, and a
897  * timer is started to prevent us from waiting forever in case
898  * something goes wrong (see the ide_timer_expiry() handler later on).
899  *
900  * See also ide_execute_command
901  */
902 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
903                       unsigned int timeout, ide_expiry_t *expiry)
904 {
905         ide_hwgroup_t *hwgroup = HWGROUP(drive);
906
907         BUG_ON(hwgroup->handler);
908         hwgroup->handler        = handler;
909         hwgroup->expiry         = expiry;
910         hwgroup->timer.expires  = jiffies + timeout;
911         hwgroup->req_gen_timer  = hwgroup->req_gen;
912         add_timer(&hwgroup->timer);
913 }
914
915 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
916                       unsigned int timeout, ide_expiry_t *expiry)
917 {
918         unsigned long flags;
919         spin_lock_irqsave(&ide_lock, flags);
920         __ide_set_handler(drive, handler, timeout, expiry);
921         spin_unlock_irqrestore(&ide_lock, flags);
922 }
923
924 EXPORT_SYMBOL(ide_set_handler);
925  
926 /**
927  *      ide_execute_command     -       execute an IDE command
928  *      @drive: IDE drive to issue the command against
929  *      @command: command byte to write
930  *      @handler: handler for next phase
931  *      @timeout: timeout for command
932  *      @expiry:  handler to run on timeout
933  *
934  *      Helper function to issue an IDE command. This handles the
935  *      atomicity requirements, command timing and ensures that the 
936  *      handler and IRQ setup do not race. All IDE command kick off
937  *      should go via this function or do equivalent locking.
938  */
939
940 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
941                          unsigned timeout, ide_expiry_t *expiry)
942 {
943         unsigned long flags;
944         ide_hwif_t *hwif = HWIF(drive);
945
946         spin_lock_irqsave(&ide_lock, flags);
947         __ide_set_handler(drive, handler, timeout, expiry);
948         hwif->exec_command(hwif, cmd);
949         /*
950          * Drive takes 400nS to respond, we must avoid the IRQ being
951          * serviced before that.
952          *
953          * FIXME: we could skip this delay with care on non shared devices
954          */
955         ndelay(400);
956         spin_unlock_irqrestore(&ide_lock, flags);
957 }
958 EXPORT_SYMBOL(ide_execute_command);
959
960 void ide_execute_pkt_cmd(ide_drive_t *drive)
961 {
962         ide_hwif_t *hwif = drive->hwif;
963         unsigned long flags;
964
965         spin_lock_irqsave(&ide_lock, flags);
966         hwif->exec_command(hwif, WIN_PACKETCMD);
967         ndelay(400);
968         spin_unlock_irqrestore(&ide_lock, flags);
969 }
970 EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd);
971
972 static inline void ide_complete_drive_reset(ide_drive_t *drive, int err)
973 {
974         struct request *rq = drive->hwif->hwgroup->rq;
975
976         if (rq && blk_special_request(rq) && rq->cmd[0] == REQ_DRIVE_RESET)
977                 ide_end_request(drive, err ? err : 1, 0);
978 }
979
980 /* needed below */
981 static ide_startstop_t do_reset1 (ide_drive_t *, int);
982
983 /*
984  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
985  * during an atapi drive reset operation. If the drive has not yet responded,
986  * and we have not yet hit our maximum waiting time, then the timer is restarted
987  * for another 50ms.
988  */
989 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
990 {
991         ide_hwif_t *hwif = drive->hwif;
992         ide_hwgroup_t *hwgroup = hwif->hwgroup;
993         u8 stat;
994
995         SELECT_DRIVE(drive);
996         udelay (10);
997         stat = hwif->read_status(hwif);
998
999         if (OK_STAT(stat, 0, BUSY_STAT))
1000                 printk("%s: ATAPI reset complete\n", drive->name);
1001         else {
1002                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1003                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1004                         /* continue polling */
1005                         return ide_started;
1006                 }
1007                 /* end of polling */
1008                 hwgroup->polling = 0;
1009                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
1010                                 drive->name, stat);
1011                 /* do it the old fashioned way */
1012                 return do_reset1(drive, 1);
1013         }
1014         /* done polling */
1015         hwgroup->polling = 0;
1016         ide_complete_drive_reset(drive, 0);
1017         return ide_stopped;
1018 }
1019
1020 /*
1021  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1022  * during an ide reset operation. If the drives have not yet responded,
1023  * and we have not yet hit our maximum waiting time, then the timer is restarted
1024  * for another 50ms.
1025  */
1026 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1027 {
1028         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
1029         ide_hwif_t *hwif        = HWIF(drive);
1030         const struct ide_port_ops *port_ops = hwif->port_ops;
1031         u8 tmp;
1032         int err = 0;
1033
1034         if (port_ops && port_ops->reset_poll) {
1035                 err = port_ops->reset_poll(drive);
1036                 if (err) {
1037                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1038                                 hwif->name, drive->name);
1039                         goto out;
1040                 }
1041         }
1042
1043         tmp = hwif->read_status(hwif);
1044
1045         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
1046                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1047                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1048                         /* continue polling */
1049                         return ide_started;
1050                 }
1051                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1052                 drive->failures++;
1053                 err = -EIO;
1054         } else  {
1055                 printk("%s: reset: ", hwif->name);
1056                 tmp = ide_read_error(drive);
1057
1058                 if (tmp == 1) {
1059                         printk("success\n");
1060                         drive->failures = 0;
1061                 } else {
1062                         drive->failures++;
1063                         printk("master: ");
1064                         switch (tmp & 0x7f) {
1065                                 case 1: printk("passed");
1066                                         break;
1067                                 case 2: printk("formatter device error");
1068                                         break;
1069                                 case 3: printk("sector buffer error");
1070                                         break;
1071                                 case 4: printk("ECC circuitry error");
1072                                         break;
1073                                 case 5: printk("controlling MPU error");
1074                                         break;
1075                                 default:printk("error (0x%02x?)", tmp);
1076                         }
1077                         if (tmp & 0x80)
1078                                 printk("; slave: failed");
1079                         printk("\n");
1080                         err = -EIO;
1081                 }
1082         }
1083 out:
1084         hwgroup->polling = 0;   /* done polling */
1085         ide_complete_drive_reset(drive, err);
1086         return ide_stopped;
1087 }
1088
1089 static void ide_disk_pre_reset(ide_drive_t *drive)
1090 {
1091         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1092
1093         drive->special.all = 0;
1094         drive->special.b.set_geometry = legacy;
1095         drive->special.b.recalibrate  = legacy;
1096         drive->mult_count = 0;
1097         if (!drive->keep_settings && !drive->using_dma)
1098                 drive->mult_req = 0;
1099         if (drive->mult_req != drive->mult_count)
1100                 drive->special.b.set_multmode = 1;
1101 }
1102
1103 static void pre_reset(ide_drive_t *drive)
1104 {
1105         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
1106
1107         if (drive->media == ide_disk)
1108                 ide_disk_pre_reset(drive);
1109         else
1110                 drive->post_reset = 1;
1111
1112         if (drive->using_dma) {
1113                 if (drive->crc_count)
1114                         ide_check_dma_crc(drive);
1115                 else
1116                         ide_dma_off(drive);
1117         }
1118
1119         if (!drive->keep_settings) {
1120                 if (!drive->using_dma) {
1121                         drive->unmask = 0;
1122                         drive->io_32bit = 0;
1123                 }
1124                 return;
1125         }
1126
1127         if (port_ops && port_ops->pre_reset)
1128                 port_ops->pre_reset(drive);
1129
1130         if (drive->current_speed != 0xff)
1131                 drive->desired_speed = drive->current_speed;
1132         drive->current_speed = 0xff;
1133 }
1134
1135 /*
1136  * do_reset1() attempts to recover a confused drive by resetting it.
1137  * Unfortunately, resetting a disk drive actually resets all devices on
1138  * the same interface, so it can really be thought of as resetting the
1139  * interface rather than resetting the drive.
1140  *
1141  * ATAPI devices have their own reset mechanism which allows them to be
1142  * individually reset without clobbering other devices on the same interface.
1143  *
1144  * Unfortunately, the IDE interface does not generate an interrupt to let
1145  * us know when the reset operation has finished, so we must poll for this.
1146  * Equally poor, though, is the fact that this may a very long time to complete,
1147  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1148  * we set a timer to poll at 50ms intervals.
1149  */
1150 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1151 {
1152         unsigned int unit;
1153         unsigned long flags;
1154         ide_hwif_t *hwif;
1155         ide_hwgroup_t *hwgroup;
1156         struct ide_io_ports *io_ports;
1157         const struct ide_port_ops *port_ops;
1158
1159         spin_lock_irqsave(&ide_lock, flags);
1160         hwif = HWIF(drive);
1161         hwgroup = HWGROUP(drive);
1162
1163         io_ports = &hwif->io_ports;
1164
1165         /* We must not reset with running handlers */
1166         BUG_ON(hwgroup->handler != NULL);
1167
1168         /* For an ATAPI device, first try an ATAPI SRST. */
1169         if (drive->media != ide_disk && !do_not_try_atapi) {
1170                 pre_reset(drive);
1171                 SELECT_DRIVE(drive);
1172                 udelay (20);
1173                 hwif->exec_command(hwif, WIN_SRST);
1174                 ndelay(400);
1175                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1176                 hwgroup->polling = 1;
1177                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1178                 spin_unlock_irqrestore(&ide_lock, flags);
1179                 return ide_started;
1180         }
1181
1182         /*
1183          * First, reset any device state data we were maintaining
1184          * for any of the drives on this interface.
1185          */
1186         for (unit = 0; unit < MAX_DRIVES; ++unit)
1187                 pre_reset(&hwif->drives[unit]);
1188
1189         if (io_ports->ctl_addr == 0) {
1190                 spin_unlock_irqrestore(&ide_lock, flags);
1191                 ide_complete_drive_reset(drive, -ENXIO);
1192                 return ide_stopped;
1193         }
1194
1195         /*
1196          * Note that we also set nIEN while resetting the device,
1197          * to mask unwanted interrupts from the interface during the reset.
1198          * However, due to the design of PC hardware, this will cause an
1199          * immediate interrupt due to the edge transition it produces.
1200          * This single interrupt gives us a "fast poll" for drives that
1201          * recover from reset very quickly, saving us the first 50ms wait time.
1202          *
1203          * TODO: add ->softreset method and stop abusing ->set_irq
1204          */
1205         /* set SRST and nIEN */
1206         hwif->set_irq(hwif, 4);
1207         /* more than enough time */
1208         udelay(10);
1209         /* clear SRST, leave nIEN (unless device is on the quirk list) */
1210         hwif->set_irq(hwif, drive->quirk_list == 2);
1211         /* more than enough time */
1212         udelay(10);
1213         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1214         hwgroup->polling = 1;
1215         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1216
1217         /*
1218          * Some weird controller like resetting themselves to a strange
1219          * state when the disks are reset this way. At least, the Winbond
1220          * 553 documentation says that
1221          */
1222         port_ops = hwif->port_ops;
1223         if (port_ops && port_ops->resetproc)
1224                 port_ops->resetproc(drive);
1225
1226         spin_unlock_irqrestore(&ide_lock, flags);
1227         return ide_started;
1228 }
1229
1230 /*
1231  * ide_do_reset() is the entry point to the drive/interface reset code.
1232  */
1233
1234 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1235 {
1236         return do_reset1(drive, 0);
1237 }
1238
1239 EXPORT_SYMBOL(ide_do_reset);
1240
1241 /*
1242  * ide_wait_not_busy() waits for the currently selected device on the hwif
1243  * to report a non-busy status, see comments in ide_probe_port().
1244  */
1245 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1246 {
1247         u8 stat = 0;
1248
1249         while(timeout--) {
1250                 /*
1251                  * Turn this into a schedule() sleep once I'm sure
1252                  * about locking issues (2.5 work ?).
1253                  */
1254                 mdelay(1);
1255                 stat = hwif->read_status(hwif);
1256                 if ((stat & BUSY_STAT) == 0)
1257                         return 0;
1258                 /*
1259                  * Assume a value of 0xff means nothing is connected to
1260                  * the interface and it doesn't implement the pull-down
1261                  * resistor on D7.
1262                  */
1263                 if (stat == 0xff)
1264                         return -ENODEV;
1265                 touch_softlockup_watchdog();
1266                 touch_nmi_watchdog();
1267         }
1268         return -EBUSY;
1269 }
1270
1271 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1272