drivers/ide/ide-iops.c

   1 /*
   2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   4  *
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/types.h>
   9 #include <linux/string.h>
  10 #include <linux/kernel.h>
  11 #include <linux/timer.h>
  12 #include <linux/mm.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/major.h>
  15 #include <linux/errno.h>
  16 #include <linux/genhd.h>
  17 #include <linux/blkpg.h>
  18 #include <linux/slab.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/hdreg.h>
  22 #include <linux/ide.h>
  23 #include <linux/bitops.h>
  24 #include <linux/nmi.h>
  25
  26 #include <asm/byteorder.h>
  27 #include <asm/irq.h>
  28 #include <asm/uaccess.h>
  29 #include <asm/io.h>
  30
  31 /*
  32  *      Conventional PIO operations for ATA devices
  33  */
  34
  35 static u8 ide_inb (unsigned long port)
  36 {
  37         return (u8) inb(port);
  38 }
  39
  40 static u16 ide_inw (unsigned long port)
  41 {
  42         return (u16) inw(port);
  43 }
  44
  45 static void ide_outb (u8 val, unsigned long port)
  46 {
  47         outb(val, port);
  48 }
  49
  50 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
  51 {
  52         outb(addr, port);
  53 }
  54
  55 static void ide_outw (u16 val, unsigned long port)
  56 {
  57         outw(val, port);
  58 }
  59
  60 void default_hwif_iops (ide_hwif_t *hwif)
  61 {
  62         hwif->OUTB      = ide_outb;
  63         hwif->OUTBSYNC  = ide_outbsync;
  64         hwif->OUTW      = ide_outw;
  65         hwif->INB       = ide_inb;
  66         hwif->INW       = ide_inw;
  67 }
  68
  69 /*
  70  *      MMIO operations, typically used for SATA controllers
  71  */
  72
  73 static u8 ide_mm_inb (unsigned long port)
  74 {
  75         return (u8) readb((void __iomem *) port);
  76 }
  77
  78 static u16 ide_mm_inw (unsigned long port)
  79 {
  80         return (u16) readw((void __iomem *) port);
  81 }
  82
  83 static void ide_mm_outb (u8 value, unsigned long port)
  84 {
  85         writeb(value, (void __iomem *) port);
  86 }
  87
  88 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
  89 {
  90         writeb(value, (void __iomem *) port);
  91 }
  92
  93 static void ide_mm_outw (u16 value, unsigned long port)
  94 {
  95         writew(value, (void __iomem *) port);
  96 }
  97
  98 void default_hwif_mmiops (ide_hwif_t *hwif)
  99 {
 100         hwif->OUTB      = ide_mm_outb;
 101         /* Most systems will need to override OUTBSYNC, alas however
 102            this one is controller specific! */
 103         hwif->OUTBSYNC  = ide_mm_outbsync;
 104         hwif->OUTW      = ide_mm_outw;
 105         hwif->INB       = ide_mm_inb;
 106         hwif->INW       = ide_mm_inw;
 107 }
 108
 109 EXPORT_SYMBOL(default_hwif_mmiops);
 110
 111 void SELECT_DRIVE (ide_drive_t *drive)
 112 {
 113         ide_hwif_t *hwif = drive->hwif;
 114         const struct ide_port_ops *port_ops = hwif->port_ops;
 115
 116         if (port_ops && port_ops->selectproc)
 117                 port_ops->selectproc(drive);
 118
 119         hwif->OUTB(drive->select.all, hwif->io_ports.device_addr);
 120 }
 121
 122 void SELECT_MASK (ide_drive_t *drive, int mask)
 123 {
 124         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
 125
 126         if (port_ops && port_ops->maskproc)
 127                 port_ops->maskproc(drive, mask);
 128 }
 129
 130 void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
 131 {
 132         ide_hwif_t *hwif = drive->hwif;
 133         struct ide_io_ports *io_ports = &hwif->io_ports;
 134         struct ide_taskfile *tf = &task->tf;
 135         u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
 136
 137         if (task->tf_flags & IDE_TFLAG_FLAGGED)
 138                 HIHI = 0xFF;
 139
 140         ide_set_irq(drive, 1);
 141
 142         if ((task->tf_flags & IDE_TFLAG_NO_SELECT_MASK) == 0)
 143                 SELECT_MASK(drive, 0);
 144
 145         if (task->tf_flags & IDE_TFLAG_OUT_DATA)
 146                 hwif->OUTW((tf->hob_data << 8) | tf->data, io_ports->data_addr);
 147
 148         if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
 149                 hwif->OUTB(tf->hob_feature, io_ports->feature_addr);
 150         if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
 151                 hwif->OUTB(tf->hob_nsect, io_ports->nsect_addr);
 152         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
 153                 hwif->OUTB(tf->hob_lbal, io_ports->lbal_addr);
 154         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
 155                 hwif->OUTB(tf->hob_lbam, io_ports->lbam_addr);
 156         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
 157                 hwif->OUTB(tf->hob_lbah, io_ports->lbah_addr);
 158
 159         if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
 160                 hwif->OUTB(tf->feature, io_ports->feature_addr);
 161         if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
 162                 hwif->OUTB(tf->nsect, io_ports->nsect_addr);
 163         if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
 164                 hwif->OUTB(tf->lbal, io_ports->lbal_addr);
 165         if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
 166                 hwif->OUTB(tf->lbam, io_ports->lbam_addr);
 167         if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
 168                 hwif->OUTB(tf->lbah, io_ports->lbah_addr);
 169
 170         if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
 171                 hwif->OUTB((tf->device & HIHI) | drive->select.all,
 172                            io_ports->device_addr);
 173 }
 174
 175 void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
 176 {
 177         ide_hwif_t *hwif = drive->hwif;
 178         struct ide_io_ports *io_ports = &hwif->io_ports;
 179         struct ide_taskfile *tf = &task->tf;
 180
 181         if (task->tf_flags & IDE_TFLAG_IN_DATA) {
 182                 u16 data = hwif->INW(io_ports->data_addr);
 183
 184                 tf->data = data & 0xff;
 185                 tf->hob_data = (data >> 8) & 0xff;
 186         }
 187
 188         /* be sure we're looking at the low order bits */
 189         hwif->OUTB(drive->ctl & ~0x80, io_ports->ctl_addr);
 190
 191         if (task->tf_flags & IDE_TFLAG_IN_NSECT)
 192                 tf->nsect  = hwif->INB(io_ports->nsect_addr);
 193         if (task->tf_flags & IDE_TFLAG_IN_LBAL)
 194                 tf->lbal   = hwif->INB(io_ports->lbal_addr);
 195         if (task->tf_flags & IDE_TFLAG_IN_LBAM)
 196                 tf->lbam   = hwif->INB(io_ports->lbam_addr);
 197         if (task->tf_flags & IDE_TFLAG_IN_LBAH)
 198                 tf->lbah   = hwif->INB(io_ports->lbah_addr);
 199         if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
 200                 tf->device = hwif->INB(io_ports->device_addr);
 201
 202         if (task->tf_flags & IDE_TFLAG_LBA48) {
 203                 hwif->OUTB(drive->ctl | 0x80, io_ports->ctl_addr);
 204
 205                 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
 206                         tf->hob_feature = hwif->INB(io_ports->feature_addr);
 207                 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
 208                         tf->hob_nsect   = hwif->INB(io_ports->nsect_addr);
 209                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
 210                         tf->hob_lbal    = hwif->INB(io_ports->lbal_addr);
 211                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
 212                         tf->hob_lbam    = hwif->INB(io_ports->lbam_addr);
 213                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
 214                         tf->hob_lbah    = hwif->INB(io_ports->lbah_addr);
 215         }
 216 }
 217
 218 /*
 219  * Some localbus EIDE interfaces require a special access sequence
 220  * when using 32-bit I/O instructions to transfer data.  We call this
 221  * the "vlb_sync" sequence, which consists of three successive reads
 222  * of the sector count register location, with interrupts disabled
 223  * to ensure that the reads all happen together.
 224  */
 225 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
 226 {
 227         (void) HWIF(drive)->INB(port);
 228         (void) HWIF(drive)->INB(port);
 229         (void) HWIF(drive)->INB(port);
 230 }
 231
 232 /*
 233  * This is used for most PIO data transfers *from* the IDE interface
 234  *
 235  * These routines will round up any request for an odd number of bytes,
 236  * so if an odd len is specified, be sure that there's at least one
 237  * extra byte allocated for the buffer.
 238  */
 239 static void ata_input_data(ide_drive_t *drive, struct request *rq,
 240                            void *buf, unsigned int len)
 241 {
 242         ide_hwif_t *hwif = drive->hwif;
 243         struct ide_io_ports *io_ports = &hwif->io_ports;
 244         unsigned long data_addr = io_ports->data_addr;
 245         u8 io_32bit = drive->io_32bit;
 246         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 247
 248         len++;
 249
 250         if (io_32bit) {
 251                 unsigned long uninitialized_var(flags);
 252
 253                 if (io_32bit & 2) {
 254                         local_irq_save(flags);
 255                         ata_vlb_sync(drive, io_ports->nsect_addr);
 256                 }
 257
 258                 if (mmio)
 259                         __ide_mm_insl((void __iomem *)data_addr, buf, len / 4);
 260                 else
 261                         insl(data_addr, buf, len / 4);
 262
 263                 if (io_32bit & 2)
 264                         local_irq_restore(flags);
 265
 266                 if ((len & 3) >= 2) {
 267                         if (mmio)
 268                                 __ide_mm_insw((void __iomem *)data_addr,
 269                                                 (u8 *)buf + (len & ~3), 1);
 270                         else
 271                                 insw(data_addr, (u8 *)buf + (len & ~3), 1);
 272                 }
 273         } else {
 274                 if (mmio)
 275                         __ide_mm_insw((void __iomem *)data_addr, buf, len / 2);
 276                 else
 277                         insw(data_addr, buf, len / 2);
 278         }
 279 }
 280
 281 /*
 282  * This is used for most PIO data transfers *to* the IDE interface
 283  */
 284 static void ata_output_data(ide_drive_t *drive, struct request *rq,
 285                             void *buf, unsigned int len)
 286 {
 287         ide_hwif_t *hwif = drive->hwif;
 288         struct ide_io_ports *io_ports = &hwif->io_ports;
 289         unsigned long data_addr = io_ports->data_addr;
 290         u8 io_32bit = drive->io_32bit;
 291         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 292
 293         if (io_32bit) {
 294                 unsigned long uninitialized_var(flags);
 295
 296                 if (io_32bit & 2) {
 297                         local_irq_save(flags);
 298                         ata_vlb_sync(drive, io_ports->nsect_addr);
 299                 }
 300
 301                 if (mmio)
 302                         __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4);
 303                 else
 304                         outsl(data_addr, buf, len / 4);
 305
 306                 if (io_32bit & 2)
 307                         local_irq_restore(flags);
 308
 309                 if ((len & 3) >= 2) {
 310                         if (mmio)
 311                                 __ide_mm_outsw((void __iomem *)data_addr,
 312                                                  (u8 *)buf + (len & ~3), 1);
 313                         else
 314                                 outsw(data_addr, (u8 *)buf + (len & ~3), 1);
 315                 }
 316         } else {
 317                 if (mmio)
 318                         __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2);
 319                 else
 320                         outsw(data_addr, buf, len / 2);
 321         }
 322 }
 323
 324 void default_hwif_transport(ide_hwif_t *hwif)
 325 {
 326         hwif->input_data  = ata_input_data;
 327         hwif->output_data = ata_output_data;
 328 }
 329
 330 void ide_fix_driveid (struct hd_driveid *id)
 331 {
 332 #ifndef __LITTLE_ENDIAN
 333 # ifdef __BIG_ENDIAN
 334         int i;
 335         u16 *stringcast;
 336
 337         id->config         = __le16_to_cpu(id->config);
 338         id->cyls           = __le16_to_cpu(id->cyls);
 339         id->reserved2      = __le16_to_cpu(id->reserved2);
 340         id->heads          = __le16_to_cpu(id->heads);
 341         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 342         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 343         id->sectors        = __le16_to_cpu(id->sectors);
 344         id->vendor0        = __le16_to_cpu(id->vendor0);
 345         id->vendor1        = __le16_to_cpu(id->vendor1);
 346         id->vendor2        = __le16_to_cpu(id->vendor2);
 347         stringcast = (u16 *)&id->serial_no[0];
 348         for (i = 0; i < (20/2); i++)
 349                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 350         id->buf_type       = __le16_to_cpu(id->buf_type);
 351         id->buf_size       = __le16_to_cpu(id->buf_size);
 352         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 353         stringcast = (u16 *)&id->fw_rev[0];
 354         for (i = 0; i < (8/2); i++)
 355                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 356         stringcast = (u16 *)&id->model[0];
 357         for (i = 0; i < (40/2); i++)
 358                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 359         id->dword_io       = __le16_to_cpu(id->dword_io);
 360         id->reserved50     = __le16_to_cpu(id->reserved50);
 361         id->field_valid    = __le16_to_cpu(id->field_valid);
 362         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 363         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 364         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 365         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 366         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 367         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 368         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 369         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 370         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 371         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 372         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 373         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 374         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 375         for (i = 0; i < 2; ++i)
 376                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 377         for (i = 0; i < 4; ++i)
 378                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 379         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 380         for (i = 0; i < 4; ++i)
 381                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 382         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 383         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 384         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 385         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 386         id->cfsse          = __le16_to_cpu(id->cfsse);
 387         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 388         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 389         id->csf_default    = __le16_to_cpu(id->csf_default);
 390         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 391         id->trseuc         = __le16_to_cpu(id->trseuc);
 392         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 393         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 394         id->mprc           = __le16_to_cpu(id->mprc);
 395         id->hw_config      = __le16_to_cpu(id->hw_config);
 396         id->acoustic       = __le16_to_cpu(id->acoustic);
 397         id->msrqs          = __le16_to_cpu(id->msrqs);
 398         id->sxfert         = __le16_to_cpu(id->sxfert);
 399         id->sal            = __le16_to_cpu(id->sal);
 400         id->spg            = __le32_to_cpu(id->spg);
 401         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 402         for (i = 0; i < 22; i++)
 403                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 404         id->last_lun       = __le16_to_cpu(id->last_lun);
 405         id->word127        = __le16_to_cpu(id->word127);
 406         id->dlf            = __le16_to_cpu(id->dlf);
 407         id->csfo           = __le16_to_cpu(id->csfo);
 408         for (i = 0; i < 26; i++)
 409                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 410         id->word156        = __le16_to_cpu(id->word156);
 411         for (i = 0; i < 3; i++)
 412                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 413         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 414         for (i = 0; i < 14; i++)
 415                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 416         for (i = 0; i < 31; i++)
 417                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 418         for (i = 0; i < 48; i++)
 419                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 420         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 421 # else
 422 #  error "Please fix <asm/byteorder.h>"
 423 # endif
 424 #endif
 425 }
 426
 427 /*
 428  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
 429  * removing leading/trailing blanks and compressing internal blanks.
 430  * It is primarily used to tidy up the model name/number fields as
 431  * returned by the WIN_[P]IDENTIFY commands.
 432  */
 433
 434 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 435 {
 436         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 437
 438         if (byteswap) {
 439                 /* convert from big-endian to host byte order */
 440                 for (p = end ; p != s;) {
 441                         unsigned short *pp = (unsigned short *) (p -= 2);
 442                         *pp = ntohs(*pp);
 443                 }
 444         }
 445         /* strip leading blanks */
 446         while (s != end && *s == ' ')
 447                 ++s;
 448         /* compress internal blanks and strip trailing blanks */
 449         while (s != end && *s) {
 450                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 451                         *p++ = *(s-1);
 452         }
 453         /* wipe out trailing garbage */
 454         while (p != end)
 455                 *p++ = '\0';
 456 }
 457
 458 EXPORT_SYMBOL(ide_fixstring);
 459
 460 /*
 461  * Needed for PCI irq sharing
 462  */
 463 int drive_is_ready (ide_drive_t *drive)
 464 {
 465         ide_hwif_t *hwif        = HWIF(drive);
 466         u8 stat                 = 0;
 467
 468         if (drive->waiting_for_dma)
 469                 return hwif->dma_ops->dma_test_irq(drive);
 470
 471 #if 0
 472         /* need to guarantee 400ns since last command was issued */
 473         udelay(1);
 474 #endif
 475
 476         /*
 477          * We do a passive status test under shared PCI interrupts on
 478          * cards that truly share the ATA side interrupt, but may also share
 479          * an interrupt with another pci card/device.  We make no assumptions
 480          * about possible isa-pnp and pci-pnp issues yet.
 481          */
 482         if (hwif->io_ports.ctl_addr)
 483                 stat = ide_read_altstatus(drive);
 484         else
 485                 /* Note: this may clear a pending IRQ!! */
 486                 stat = ide_read_status(drive);
 487
 488         if (stat & BUSY_STAT)
 489                 /* drive busy:  definitely not interrupting */
 490                 return 0;
 491
 492         /* drive ready: *might* be interrupting */
 493         return 1;
 494 }
 495
 496 EXPORT_SYMBOL(drive_is_ready);
 497
 498 /*
 499  * This routine busy-waits for the drive status to be not "busy".
 500  * It then checks the status for all of the "good" bits and none
 501  * of the "bad" bits, and if all is okay it returns 0.  All other
 502  * cases return error -- caller may then invoke ide_error().
 503  *
 504  * This routine should get fixed to not hog the cpu during extra long waits..
 505  * That could be done by busy-waiting for the first jiffy or two, and then
 506  * setting a timer to wake up at half second intervals thereafter,
 507  * until timeout is achieved, before timing out.
 508  */
 509 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
 510 {
 511         unsigned long flags;
 512         int i;
 513         u8 stat;
 514
 515         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 516         stat = ide_read_status(drive);
 517
 518         if (stat & BUSY_STAT) {
 519                 local_irq_set(flags);
 520                 timeout += jiffies;
 521                 while ((stat = ide_read_status(drive)) & BUSY_STAT) {
 522                         if (time_after(jiffies, timeout)) {
 523                                 /*
 524                                  * One last read after the timeout in case
 525                                  * heavy interrupt load made us not make any
 526                                  * progress during the timeout..
 527                                  */
 528                                 stat = ide_read_status(drive);
 529                                 if (!(stat & BUSY_STAT))
 530                                         break;
 531
 532                                 local_irq_restore(flags);
 533                                 *rstat = stat;
 534                                 return -EBUSY;
 535                         }
 536                 }
 537                 local_irq_restore(flags);
 538         }
 539         /*
 540          * Allow status to settle, then read it again.
 541          * A few rare drives vastly violate the 400ns spec here,
 542          * so we'll wait up to 10usec for a "good" status
 543          * rather than expensively fail things immediately.
 544          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 545          */
 546         for (i = 0; i < 10; i++) {
 547                 udelay(1);
 548                 stat = ide_read_status(drive);
 549
 550                 if (OK_STAT(stat, good, bad)) {
 551                         *rstat = stat;
 552                         return 0;
 553                 }
 554         }
 555         *rstat = stat;
 556         return -EFAULT;
 557 }
 558
 559 /*
 560  * In case of error returns error value after doing "*startstop = ide_error()".
 561  * The caller should return the updated value of "startstop" in this case,
 562  * "startstop" is unchanged when the function returns 0.
 563  */
 564 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 565 {
 566         int err;
 567         u8 stat;
 568
 569         /* bail early if we've exceeded max_failures */
 570         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 571                 *startstop = ide_stopped;
 572                 return 1;
 573         }
 574
 575         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
 576
 577         if (err) {
 578                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
 579                 *startstop = ide_error(drive, s, stat);
 580         }
 581
 582         return err;
 583 }
 584
 585 EXPORT_SYMBOL(ide_wait_stat);
 586
 587 /**
 588  *      ide_in_drive_list       -       look for drive in black/white list
 589  *      @id: drive identifier
 590  *      @drive_table: list to inspect
 591  *
 592  *      Look for a drive in the blacklist and the whitelist tables
 593  *      Returns 1 if the drive is found in the table.
 594  */
 595
 596 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 597 {
 598         for ( ; drive_table->id_model; drive_table++)
 599                 if ((!strcmp(drive_table->id_model, id->model)) &&
 600                     (!drive_table->id_firmware ||
 601                      strstr(id->fw_rev, drive_table->id_firmware)))
 602                         return 1;
 603         return 0;
 604 }
 605
 606 EXPORT_SYMBOL_GPL(ide_in_drive_list);
 607
 608 /*
 609  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
 610  * We list them here and depend on the device side cable detection for them.
 611  *
 612  * Some optical devices with the buggy firmwares have the same problem.
 613  */
 614 static const struct drive_list_entry ivb_list[] = {
 615         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
 616         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
 617         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
 618         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
 619         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
 620         { NULL                          , NULL          }
 621 };
 622
 623 /*
 624  *  All hosts that use the 80c ribbon must use!
 625  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 626  */
 627 u8 eighty_ninty_three (ide_drive_t *drive)
 628 {
 629         ide_hwif_t *hwif = drive->hwif;
 630         struct hd_driveid *id = drive->id;
 631         int ivb = ide_in_drive_list(id, ivb_list);
 632
 633         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
 634                 return 1;
 635
 636         if (ivb)
 637                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
 638                                   drive->name);
 639
 640         if (ide_dev_is_sata(id) && !ivb)
 641                 return 1;
 642
 643         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
 644                 goto no_80w;
 645
 646         /*
 647          * FIXME:
 648          * - change master/slave IDENTIFY order
 649          * - force bit13 (80c cable present) check also for !ivb devices
 650          *   (unless the slave device is pre-ATA3)
 651          */
 652         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
 653                 return 1;
 654
 655 no_80w:
 656         if (drive->udma33_warned == 1)
 657                 return 0;
 658
 659         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
 660                             "limiting max speed to UDMA33\n",
 661                             drive->name,
 662                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
 663
 664         drive->udma33_warned = 1;
 665
 666         return 0;
 667 }
 668
 669 int ide_driveid_update(ide_drive_t *drive)
 670 {
 671         ide_hwif_t *hwif = drive->hwif;
 672         struct hd_driveid *id;
 673         unsigned long timeout, flags;
 674         u8 stat;
 675
 676         /*
 677          * Re-read drive->id for possible DMA mode
 678          * change (copied from ide-probe.c)
 679          */
 680
 681         SELECT_MASK(drive, 1);
 682         ide_set_irq(drive, 1);
 683         msleep(50);
 684         hwif->OUTBSYNC(drive, WIN_IDENTIFY, hwif->io_ports.command_addr);
 685         timeout = jiffies + WAIT_WORSTCASE;
 686         do {
 687                 if (time_after(jiffies, timeout)) {
 688                         SELECT_MASK(drive, 0);
 689                         return 0;       /* drive timed-out */
 690                 }
 691
 692                 msleep(50);     /* give drive a breather */
 693                 stat = ide_read_altstatus(drive);
 694         } while (stat & BUSY_STAT);
 695
 696         msleep(50);     /* wait for IRQ and DRQ_STAT */
 697         stat = ide_read_status(drive);
 698
 699         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
 700                 SELECT_MASK(drive, 0);
 701                 printk("%s: CHECK for good STATUS\n", drive->name);
 702                 return 0;
 703         }
 704         local_irq_save(flags);
 705         SELECT_MASK(drive, 0);
 706         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 707         if (!id) {
 708                 local_irq_restore(flags);
 709                 return 0;
 710         }
 711         hwif->input_data(drive, NULL, id, SECTOR_SIZE);
 712         (void)ide_read_status(drive);   /* clear drive IRQ */
 713         local_irq_enable();
 714         local_irq_restore(flags);
 715         ide_fix_driveid(id);
 716         if (id) {
 717                 drive->id->dma_ultra = id->dma_ultra;
 718                 drive->id->dma_mword = id->dma_mword;
 719                 drive->id->dma_1word = id->dma_1word;
 720                 /* anything more ? */
 721                 kfree(id);
 722
 723                 if (drive->using_dma && ide_id_dma_bug(drive))
 724                         ide_dma_off(drive);
 725         }
 726
 727         return 1;
 728 }
 729
 730 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
 731 {
 732         ide_hwif_t *hwif = drive->hwif;
 733         struct ide_io_ports *io_ports = &hwif->io_ports;
 734         int error = 0;
 735         u8 stat;
 736
 737 //      while (HWGROUP(drive)->busy)
 738 //              msleep(50);
 739
 740 #ifdef CONFIG_BLK_DEV_IDEDMA
 741         if (hwif->dma_ops)      /* check if host supports DMA */
 742                 hwif->dma_ops->dma_host_set(drive, 0);
 743 #endif
 744
 745         /* Skip setting PIO flow-control modes on pre-EIDE drives */
 746         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
 747                 goto skip;
 748
 749         /*
 750          * Don't use ide_wait_cmd here - it will
 751          * attempt to set_geometry and recalibrate,
 752          * but for some reason these don't work at
 753          * this point (lost interrupt).
 754          */
 755         /*
 756          * Select the drive, and issue the SETFEATURES command
 757          */
 758         disable_irq_nosync(hwif->irq);
 759
 760         /*
 761          *      FIXME: we race against the running IRQ here if
 762          *      this is called from non IRQ context. If we use
 763          *      disable_irq() we hang on the error path. Work
 764          *      is needed.
 765          */
 766
 767         udelay(1);
 768         SELECT_DRIVE(drive);
 769         SELECT_MASK(drive, 0);
 770         udelay(1);
 771         ide_set_irq(drive, 0);
 772         hwif->OUTB(speed, io_ports->nsect_addr);
 773         hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr);
 774         hwif->OUTBSYNC(drive, WIN_SETFEATURES, io_ports->command_addr);
 775         if (drive->quirk_list == 2)
 776                 ide_set_irq(drive, 1);
 777
 778         error = __ide_wait_stat(drive, drive->ready_stat,
 779                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
 780                                 WAIT_CMD, &stat);
 781
 782         SELECT_MASK(drive, 0);
 783
 784         enable_irq(hwif->irq);
 785
 786         if (error) {
 787                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 788                 return error;
 789         }
 790
 791         drive->id->dma_ultra &= ~0xFF00;
 792         drive->id->dma_mword &= ~0x0F00;
 793         drive->id->dma_1word &= ~0x0F00;
 794
 795  skip:
 796 #ifdef CONFIG_BLK_DEV_IDEDMA
 797         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
 798             drive->using_dma)
 799                 hwif->dma_ops->dma_host_set(drive, 1);
 800         else if (hwif->dma_ops) /* check if host supports DMA */
 801                 ide_dma_off_quietly(drive);
 802 #endif
 803
 804         switch(speed) {
 805                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 806                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 807                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 808                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 809                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 810                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 811                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 812                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 813                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 814                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 815                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 816                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 817                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 818                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 819                 default: break;
 820         }
 821         if (!drive->init_speed)
 822                 drive->init_speed = speed;
 823         drive->current_speed = speed;
 824         return error;
 825 }
 826
 827 /*
 828  * This should get invoked any time we exit the driver to
 829  * wait for an interrupt response from a drive.  handler() points
 830  * at the appropriate code to handle the next interrupt, and a
 831  * timer is started to prevent us from waiting forever in case
 832  * something goes wrong (see the ide_timer_expiry() handler later on).
 833  *
 834  * See also ide_execute_command
 835  */
 836 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 837                       unsigned int timeout, ide_expiry_t *expiry)
 838 {
 839         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 840
 841         BUG_ON(hwgroup->handler);
 842         hwgroup->handler        = handler;
 843         hwgroup->expiry         = expiry;
 844         hwgroup->timer.expires  = jiffies + timeout;
 845         hwgroup->req_gen_timer  = hwgroup->req_gen;
 846         add_timer(&hwgroup->timer);
 847 }
 848
 849 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 850                       unsigned int timeout, ide_expiry_t *expiry)
 851 {
 852         unsigned long flags;
 853         spin_lock_irqsave(&ide_lock, flags);
 854         __ide_set_handler(drive, handler, timeout, expiry);
 855         spin_unlock_irqrestore(&ide_lock, flags);
 856 }
 857
 858 EXPORT_SYMBOL(ide_set_handler);
 859
 860 /**
 861  *      ide_execute_command     -       execute an IDE command
 862  *      @drive: IDE drive to issue the command against
 863  *      @command: command byte to write
 864  *      @handler: handler for next phase
 865  *      @timeout: timeout for command
 866  *      @expiry:  handler to run on timeout
 867  *
 868  *      Helper function to issue an IDE command. This handles the
 869  *      atomicity requirements, command timing and ensures that the
 870  *      handler and IRQ setup do not race. All IDE command kick off
 871  *      should go via this function or do equivalent locking.
 872  */
 873
 874 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
 875                          unsigned timeout, ide_expiry_t *expiry)
 876 {
 877         unsigned long flags;
 878         ide_hwif_t *hwif = HWIF(drive);
 879
 880         spin_lock_irqsave(&ide_lock, flags);
 881         __ide_set_handler(drive, handler, timeout, expiry);
 882         hwif->OUTBSYNC(drive, cmd, hwif->io_ports.command_addr);
 883         /*
 884          * Drive takes 400nS to respond, we must avoid the IRQ being
 885          * serviced before that.
 886          *
 887          * FIXME: we could skip this delay with care on non shared devices
 888          */
 889         ndelay(400);
 890         spin_unlock_irqrestore(&ide_lock, flags);
 891 }
 892 EXPORT_SYMBOL(ide_execute_command);
 893
 894 void ide_execute_pkt_cmd(ide_drive_t *drive)
 895 {
 896         ide_hwif_t *hwif = drive->hwif;
 897         unsigned long flags;
 898
 899         spin_lock_irqsave(&ide_lock, flags);
 900         hwif->OUTBSYNC(drive, WIN_PACKETCMD, hwif->io_ports.command_addr);
 901         ndelay(400);
 902         spin_unlock_irqrestore(&ide_lock, flags);
 903 }
 904 EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd);
 905
 906 /* needed below */
 907 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 908
 909 /*
 910  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 911  * during an atapi drive reset operation. If the drive has not yet responded,
 912  * and we have not yet hit our maximum waiting time, then the timer is restarted
 913  * for another 50ms.
 914  */
 915 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 916 {
 917         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 918         u8 stat;
 919
 920         SELECT_DRIVE(drive);
 921         udelay (10);
 922         stat = ide_read_status(drive);
 923
 924         if (OK_STAT(stat, 0, BUSY_STAT))
 925                 printk("%s: ATAPI reset complete\n", drive->name);
 926         else {
 927                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 928                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
 929                         /* continue polling */
 930                         return ide_started;
 931                 }
 932                 /* end of polling */
 933                 hwgroup->polling = 0;
 934                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
 935                                 drive->name, stat);
 936                 /* do it the old fashioned way */
 937                 return do_reset1(drive, 1);
 938         }
 939         /* done polling */
 940         hwgroup->polling = 0;
 941         hwgroup->resetting = 0;
 942         return ide_stopped;
 943 }
 944
 945 /*
 946  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 947  * during an ide reset operation. If the drives have not yet responded,
 948  * and we have not yet hit our maximum waiting time, then the timer is restarted
 949  * for another 50ms.
 950  */
 951 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
 952 {
 953         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 954         ide_hwif_t *hwif        = HWIF(drive);
 955         const struct ide_port_ops *port_ops = hwif->port_ops;
 956         u8 tmp;
 957
 958         if (port_ops && port_ops->reset_poll) {
 959                 if (port_ops->reset_poll(drive)) {
 960                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
 961                                 hwif->name, drive->name);
 962                         return ide_stopped;
 963                 }
 964         }
 965
 966         tmp = ide_read_status(drive);
 967
 968         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
 969                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 970                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
 971                         /* continue polling */
 972                         return ide_started;
 973                 }
 974                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
 975                 drive->failures++;
 976         } else  {
 977                 printk("%s: reset: ", hwif->name);
 978                 tmp = ide_read_error(drive);
 979
 980                 if (tmp == 1) {
 981                         printk("success\n");
 982                         drive->failures = 0;
 983                 } else {
 984                         drive->failures++;
 985                         printk("master: ");
 986                         switch (tmp & 0x7f) {
 987                                 case 1: printk("passed");
 988                                         break;
 989                                 case 2: printk("formatter device error");
 990                                         break;
 991                                 case 3: printk("sector buffer error");
 992                                         break;
 993                                 case 4: printk("ECC circuitry error");
 994                                         break;
 995                                 case 5: printk("controlling MPU error");
 996                                         break;
 997                                 default:printk("error (0x%02x?)", tmp);
 998                         }
 999                         if (tmp & 0x80)
1000                                 printk("; slave: failed");
1001                         printk("\n");
1002                 }
1003         }
1004         hwgroup->polling = 0;   /* done polling */
1005         hwgroup->resetting = 0; /* done reset attempt */
1006         return ide_stopped;
1007 }
1008
1009 static void ide_disk_pre_reset(ide_drive_t *drive)
1010 {
1011         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1012
1013         drive->special.all = 0;
1014         drive->special.b.set_geometry = legacy;
1015         drive->special.b.recalibrate  = legacy;
1016         drive->mult_count = 0;
1017         if (!drive->keep_settings && !drive->using_dma)
1018                 drive->mult_req = 0;
1019         if (drive->mult_req != drive->mult_count)
1020                 drive->special.b.set_multmode = 1;
1021 }
1022
1023 static void pre_reset(ide_drive_t *drive)
1024 {
1025         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
1026
1027         if (drive->media == ide_disk)
1028                 ide_disk_pre_reset(drive);
1029         else
1030                 drive->post_reset = 1;
1031
1032         if (drive->using_dma) {
1033                 if (drive->crc_count)
1034                         ide_check_dma_crc(drive);
1035                 else
1036                         ide_dma_off(drive);
1037         }
1038
1039         if (!drive->keep_settings) {
1040                 if (!drive->using_dma) {
1041                         drive->unmask = 0;
1042                         drive->io_32bit = 0;
1043                 }
1044                 return;
1045         }
1046
1047         if (port_ops && port_ops->pre_reset)
1048                 port_ops->pre_reset(drive);
1049
1050         if (drive->current_speed != 0xff)
1051                 drive->desired_speed = drive->current_speed;
1052         drive->current_speed = 0xff;
1053 }
1054
1055 /*
1056  * do_reset1() attempts to recover a confused drive by resetting it.
1057  * Unfortunately, resetting a disk drive actually resets all devices on
1058  * the same interface, so it can really be thought of as resetting the
1059  * interface rather than resetting the drive.
1060  *
1061  * ATAPI devices have their own reset mechanism which allows them to be
1062  * individually reset without clobbering other devices on the same interface.
1063  *
1064  * Unfortunately, the IDE interface does not generate an interrupt to let
1065  * us know when the reset operation has finished, so we must poll for this.
1066  * Equally poor, though, is the fact that this may a very long time to complete,
1067  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1068  * we set a timer to poll at 50ms intervals.
1069  */
1070 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1071 {
1072         unsigned int unit;
1073         unsigned long flags;
1074         ide_hwif_t *hwif;
1075         ide_hwgroup_t *hwgroup;
1076         struct ide_io_ports *io_ports;
1077         const struct ide_port_ops *port_ops;
1078         u8 ctl;
1079
1080         spin_lock_irqsave(&ide_lock, flags);
1081         hwif = HWIF(drive);
1082         hwgroup = HWGROUP(drive);
1083
1084         io_ports = &hwif->io_ports;
1085
1086         /* We must not reset with running handlers */
1087         BUG_ON(hwgroup->handler != NULL);
1088
1089         /* For an ATAPI device, first try an ATAPI SRST. */
1090         if (drive->media != ide_disk && !do_not_try_atapi) {
1091                 hwgroup->resetting = 1;
1092                 pre_reset(drive);
1093                 SELECT_DRIVE(drive);
1094                 udelay (20);
1095                 hwif->OUTBSYNC(drive, WIN_SRST, io_ports->command_addr);
1096                 ndelay(400);
1097                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1098                 hwgroup->polling = 1;
1099                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1100                 spin_unlock_irqrestore(&ide_lock, flags);
1101                 return ide_started;
1102         }
1103
1104         /*
1105          * First, reset any device state data we were maintaining
1106          * for any of the drives on this interface.
1107          */
1108         for (unit = 0; unit < MAX_DRIVES; ++unit)
1109                 pre_reset(&hwif->drives[unit]);
1110
1111         if (io_ports->ctl_addr == 0) {
1112                 spin_unlock_irqrestore(&ide_lock, flags);
1113                 return ide_stopped;
1114         }
1115
1116         hwgroup->resetting = 1;
1117         /*
1118          * Note that we also set nIEN while resetting the device,
1119          * to mask unwanted interrupts from the interface during the reset.
1120          * However, due to the design of PC hardware, this will cause an
1121          * immediate interrupt due to the edge transition it produces.
1122          * This single interrupt gives us a "fast poll" for drives that
1123          * recover from reset very quickly, saving us the first 50ms wait time.
1124          */
1125         /* set SRST and nIEN */
1126         hwif->OUTBSYNC(drive, drive->ctl|6, io_ports->ctl_addr);
1127         /* more than enough time */
1128         udelay(10);
1129         if (drive->quirk_list == 2)
1130                 ctl = drive->ctl;       /* clear SRST and nIEN */
1131         else
1132                 ctl = drive->ctl | 2;   /* clear SRST, leave nIEN */
1133         hwif->OUTBSYNC(drive, ctl, io_ports->ctl_addr);
1134         /* more than enough time */
1135         udelay(10);
1136         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1137         hwgroup->polling = 1;
1138         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1139
1140         /*
1141          * Some weird controller like resetting themselves to a strange
1142          * state when the disks are reset this way. At least, the Winbond
1143          * 553 documentation says that
1144          */
1145         port_ops = hwif->port_ops;
1146         if (port_ops && port_ops->resetproc)
1147                 port_ops->resetproc(drive);
1148
1149         spin_unlock_irqrestore(&ide_lock, flags);
1150         return ide_started;
1151 }
1152
1153 /*
1154  * ide_do_reset() is the entry point to the drive/interface reset code.
1155  */
1156
1157 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1158 {
1159         return do_reset1(drive, 0);
1160 }
1161
1162 EXPORT_SYMBOL(ide_do_reset);
1163
1164 /*
1165  * ide_wait_not_busy() waits for the currently selected device on the hwif
1166  * to report a non-busy status, see comments in ide_probe_port().
1167  */
1168 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1169 {
1170         u8 stat = 0;
1171
1172         while(timeout--) {
1173                 /*
1174                  * Turn this into a schedule() sleep once I'm sure
1175                  * about locking issues (2.5 work ?).
1176                  */
1177                 mdelay(1);
1178                 stat = hwif->INB(hwif->io_ports.status_addr);
1179                 if ((stat & BUSY_STAT) == 0)
1180                         return 0;
1181                 /*
1182                  * Assume a value of 0xff means nothing is connected to
1183                  * the interface and it doesn't implement the pull-down
1184                  * resistor on D7.
1185                  */
1186                 if (stat == 0xff)
1187                         return -ENODEV;
1188                 touch_softlockup_watchdog();
1189                 touch_nmi_watchdog();
1190         }
1191         return -EBUSY;
1192 }
1193
1194 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1195